Claims
- 1. A random access memory cell comprising:a trench capacitor, said trench capacitor formed beneath a major surface of a silicon substrate; a transistor comprising gate, source and drain regions, wherein said drain region of said transistor is electrically coupled to said trench capacitor; and a raised shallow trench isolation (RSTI), said RSTI having a top surface that is above the major surface of the silicon substrate wherein the amount that the top surface is raised is sufficient to prevent a divot that is subsequently formed from extending below the substrate surface.
Parent Case Info
This is a divisional of application Ser. No. 08/873,100 filed Jun. 11, 1997, now U.S. Pat. No. 6,100,131.
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