Patent Application
20160077999
1. Field of the Invention
Embodiments of the present invention relate to implementation of remote memory ring buffers in data processing systems. More specifically, embodiments of the present invention relate to implementing a remote memory ring buffer in a cluster of data processing nodes such as fabric-attached Server on a Chip (SoC) nodes.
2. Description of Related Art
A ring buffer is a memory structure (i.e., an array). A first element in a ring buffer is followed by the last. In this regard, a ring buffer can be envisioned as being circular.
In the context of SoC nodes, it is known to implement one or more shared memory ring buffers in a manner whereby different data processing cores of a single SoC node can perform GET actions and/or PUT actions (i.e., GET/PUT actions) to a common ring buffer in shared memory (i.e., GET/PUT functionality via shared memory ring buffer). A memory controller of the single SoC node ensures that GET/PUT actions of one of the data processing cores are completed without interruption by other GET/PUT actions of the same of a different one of the data processing cores. The implementation of a shared memory ring buffer in this manner enables the different data processing cores of the single SoC node to store and retrieve information from the shared memory ring buffer.
In such a single SoC node implementation of a shared memory ring buffer, shared memory GET/PUT functionality is supported in hardware (HW) between different data processing cores of the SoC node. Furthermore, such a single SoC node implementation of a remote memory ring buffer is undesirably limiting in that it does not accommodate remote memory GET/PUT functionality by a traditional cluster of shared-nothing, network connected nodes.
Accordingly, implementing remote memory GET/PUT functionality via one or more remote memory ring buffers by a cluster of fabric-attached SoC nodes without involvement of an OS kernel of the SoC nodes would be advantageous, useful and desirable.
Embodiments of the present invention are directed to ring buffers shared by a plurality of server on a chip (SoC) nodes (i.e., data processing nodes) that are not connected with shared memory. More specifically, embodiments of the present invention are directed to implementing remote memory GET/PUT functionality via one or more ring buffers that are shared by a cluster of SoC nodes that are attached through a fabric (i.e., a switched interconnect fabric). Advantageously, the remote memory GET/PUT functionality is implemented using hardware (HW) supported GET/PUT contexts that can be mapped into address space of user level processes. By virtue of the hardware (HW) supported GET/PUT contexts being mapped into address space of user level processes, SoC nodes configured in accordance with the present invention can implement remote memory GET/PUT functionality using one or more remote memory ring buffers and without involvement of an OS kernel of any one of the SoC nodes.
In one embodiment, a data processing node comprises an inter-node messaging module including a plurality of sets of registers each defining an instance of a GET/PUT context and a plurality of data processing cores each coupled to the inter-node messaging module. Each one of the data processing cores includes a mapping function for mapping each one of a plurality of user level processes thereof to a different one of the sets of registers and thereby to a respective GET/PUT context instance. Mapping each one of the user level processes to the different one of the sets of registers enables a particular one of the user level processes to utilize the respective GET/PUT context instance thereof for performing a GET/PUT action to a ring buffer of a different data processing node coupled to the data processing node through a fabric without involvement of an operating system (OS) of any one of the data processing cores.
In another embodiment, a data processing system comprises a target node including a ring buffer in local memory thereof and a plurality of initiator nodes attached to each other and to the target node through a fabric. Each one of the initiator nodes comprises an inter-node messaging module and a plurality of data processing cores each coupled to the inter-node messaging module. The inter-node messaging module includes a plurality of sets of registers each having an instance of a GET/PUT context defined therein. Each one of the data processing cores includes a mapping function for mapping each one of a plurality of user level processes thereof to a different one of the sets of registers and thereby to a respective GET/PUT context instance. Mapping each one of the user level processes to the respective GET/PUT context instance enables a particular one of the user level processes to utilize the respective GET/PUT context instance mapped thereto for performing GET/PUT actions to the ring buffer of the target node through the fabric without involvement of an operating system (OS) of any one of the data processing cores. Mapping each one of the user level processes to the respective GET/PUT context instance includes modifying a memory management unit page table for the particular one of the user level processes to include a virtual address page that maps to a physical address page for the respective GET/PUT context instance.
In another embodiment, a method for performing remote memory GET/PUT functionality between data processing nodes interconnected through a fabric includes a plurality of operations. An operation is performed for mapping a user level process of a first data processing node to a particular set of a plurality of sets of registers of an inter-node messaging module of the first data processing node. Each one of the sets of registers defines an instance of a GET/PUT context such that the user level process is mapped to a respective GET/PUT context instance. Mapping the user level processes to the respective GET/PUT context instance includes modifying a memory management unit page table for the user level process to include a virtual address page that maps to a physical address page for the respective GET/PUT context instance. The user level process performs an operation for assessing a status of a previous GET/PUT action to a ring buffer in local memory of a second data processing node. The previous GET/PUT action used the respective GET/PUT context instance. The user level process performs an operation for populating fields of the respective GET/PUT context instance with information for a current GET/PUT action to the ring buffer in response to determining that the previous GET/PUT action is completed. The inter-node messaging module of the first data processing node performs an operation for causing a GET/PUT request to be transmitted for reception by a second data processing node in response to the inter-node messaging module creating the GET/PUT request using the information populating the fields of the respective GET/PUT context instance. The information populating the fields of the respective GET/PUT context instance includes an identifier for the second data processing node and a ring buffer identifier.
These and other objects, embodiments, advantages and/or distinctions of the present invention will become readily apparent upon further review of the following specification, associated drawings and appended claims.
Embodiments of the present invention are directed to implementing GET/PUT functionality via one or more ring buffers that are shared by a cluster of SoC nodes (i.e., remote memory GET/PUT functionality) that are attached through a fabric (i.e., a switched interconnect fabric). Remote memory ring buffers are circular buffers implemented in local memory of a particular node of a cluster of nodes, which can be accessed by other nodes of the cluster. Nodes that initiate a GET action or a PUT action (i.e., GET/PUT action) are referred to herein as an initiator node and a node that is the target of such a GET/PUT action is referred to herein as a target node. These GET/PUT actions may be initiated directly by user-level applications without involvement of the OS kernel. Server on a chip (SoC) nodes that are interconnected within a fabric via a respective fabric switch are examples of data processing nodes that can serve as an initiator and target nodes in the context of the present invention. However, the present invention is not unnecessarily limited to any particular type, configuration, or application of data processing node.
Referring now to
The remote memory ring buffer 125 contains a plurality of ring elements. The ring elements can be of variable size. An element length field of the shared ring element format specifies a length of the payload words (including the element length field). Using the element length field, hardware implementing remote memory GET/PUT functionality in accordance with the present invention is able to return a complete variable sized ring element at the head of the ring buffer in response to a GET action.
When implementing remote memory GET/PUT functionality in accordance with the present invention, a PUT action that encounters a remote memory ring buffer that is full will fail at the target node. There are a number of approaches for responding to the remote memory ring buffer being full. One approach for responding to the remote memory ring buffer being full includes an error status being sent back to the application on the initiator node that initiated the PUT action (i.e., the initiating application). Optionally, in response to receiving the error status, the initiating application can choose to retry the PUT action at a later point in time. Another approach for responding to the remote memory ring buffer being full includes overwriting the oldest entry in the remote memory ring buffer and not returning an error status.
As previously disclosed, remote memory GET/PUT functionality in accordance with embodiments of the present invention are implemented using hardware (HW) supported GET/PUT contexts that can be mapped into address space of user level processes. A user level process (i.e., an application) can initiate a PUT or GET action by performing a series of stores to its allocated GET/PUT context. Only a single PUT or GET action may be outstanding on a given context. In other words, an application must poll for completion before reusing the same context to issue another GET or PUT action. Multiple GET/PUT actions (even to the same ring) may be outstanding across the different contexts.
The GET/PUT context defines the hardware-software interface for remote memory ring buffer operations. In one preferred embodiment, these hardware supported GET/PUT contexts are HW registers that are mapped into the address space of user level processes. In this regard, the HW implements multiple GET/PUT contexts (i.e. there are multiple copies of the registers). Each GET/PUT context is mapped to a different physical page in the address space of an initiator node so that it can be mapped to the address space of a user-level process. This allows the operating system (OS) of the initiator node to map each GET/PUT context to a different user process. If two GET/PUT contexts were located within the same page, it would not be possible for the OS to assign them to different processes since virtual memory is allocated on a page granularity. By virtue of the HW supported GET/PUT contexts being mapped into address space of user level processes, initiator nodes of a node cluster configured in accordance with the present invention can implement remote memory GET/PUT functionality using one or more remote memory ring buffers of a target node of the node cluster and without involvement of an OS kernel of any one of the nodes of the node cluster.
The DRAM 205 is divided into kernel address space (i.e., kernel memory) 207 and user process address space (i.e., user memory) 209 by an operating system (OS) of the data processing node 200. In the case where the data processing node is serving as a target node, one or more remote memory ring buffers 222 can be allocated out of the kernel memory 207 or user memory 209. A memory management unit 218 of each one of the data processing cores 210 has a corresponding page table 240 within the kernel memory 207. The memory management unit 218 is a hardware unit in each one of the data processing cores 210, which has a pointer to a corresponding memory management unit page table 240 in the DRAM 205. The pointer provides mapping from virtual addresses to physical addresses.
The IMM 215 includes a remote memory ring buffer GET/PUT engine (ring buffer GET/PUT engine 224) and a plurality of sets of hardware registers 225 in combination with (e.g., within) the ring buffer GET/PUT engine 224. Each one of the sets of hardware registers 225 defines a respective instance of a GET/PUT context (i.e., the respective GET/PUT context 230). Each respective GET/PUT a context instance is mapped directly into the virtual address space of a corresponding user-level processes 235 such as by a mapping function of a particular one of the data processing cores 210. For example, the memory management unit 218 of the particular one of the data processing cores 210 can perform this mapping. In this regard, each one of a plurality of user level processes is mapped to a different one of the sets of hardware registers 225 and thereby to the respective GET/PUT context instance. Mapping each one of the user level processes to the different one of the sets of registers enables the particular one of the user level processes to utilize the respective GET/PUT context instance thereof for performing a GET/PUT action to a ring buffer of a target node (e.g., the target node 115 discussed above in reference to
As previously disclosed, remote memory GET/PUT functionality in accordance with the present invention is advantageously implemented using hardware supported GET/PUT contexts. This hardware-supported implementation of remote memory GET/PUT functionality presents several distinguishing functionalities. One such functionality is that each one of the user processes 235 directly access context registers (i.e., a respective GET/PUT context instance 230) mapped to user virtual address space to initiate remote GET/PUT actions. Another such functionality is that, when the ring buffer GET/PUT engine 224 needs to send a packet associated with a GET/PUT action to another node on a fabric to which the data processing node 200 is attached, it sends this packet directly from within the IMM 215 through the fabric switch 220 into the fabric. Still another such functionality is that the ring GET/PUT Engine directly reads and stores data to/from client-side buffers 236 in user processes in association with performing GET/PUT action for the client-side user processes 236. As a target node, the ring GET/PUT engine 224 reads/writes to the one or more remote memory ring buffers 222 within the DRAM 205.
Referring now to
The method 300 begins with an initiator node performing an operation 302 for mapping a plurality of GET/PUT contexts to respective sets of registers within an inter-node messaging module of the initiator node (e.g., the IMM 215 of the data processing node 200 discussed above in reference to
In one specific example of mapping the plurality of GET/PUT contexts to respective sets of registers, there are four GET/PUT context instances are mapped to four sets of registers. Each set of registers includes 8 registers that define a GET/PUT context instance. A first GET/PUT context (i.e., GET/PUT context 0) is mapped to 8 registers at physical address BASE+0, a first GET/PUT context (i.e., GET/PUT context 1) is mapped to 8 registers at physical address BASE+64 KB, a third GET/PUT context (i.e., GET/PUT context 2) is mapped to 8 registers at physical address BASE+128 KB, and a fourth GET/PUT context (i.e., GET/PUT context 3) is mapped to 8 registers at physical address BASE+192 KB.
At some point in time after for mapping of the GET/PUT contexts and allocating the local memory as the remote memory ring buffer, the initiator node (e.g., a ring buffer GET/PUT engine thereof) performs an operation 306 for initiating a GET/PUT action for a particular user-level process running on a data processing core of the initiator node, an operation 308 for allocating a particular one of the GET/PUT context instances to the particular user-level process (i.e., one that is not currently allocated to another user-level process) and an operation 310 for mapping the particular one of the GET/PUT context instances to the particular user-level process.
In one specific example of initiating the GET/PUT action for the particular user-level process, the particular user-level process makes some call into a kernel memory space of the initiator node's DRAM (e.g., by opening a device via a device driver) that indicates that it wants to access a GET/PUT engine of the initiator node. In one specific example allocating the particular one of the GET/PUT context instances and mapping the particular one of the GET/PUT context instances, the kernel level driver will then allocate the particular one of the GET/PUT context instances to the particular user-level process and will map the particular one of the GET/PUT context instances to the particular user-level process such as by a MMU table for the particular user-level process being modified to have a virtual address page that maps to a physical address page for the particular one of the GET/PUT context instances. The kernel will set up a mapping in the particular user-level process to a first one of the Get/Put Context instances (e.g., Context 2) to some arbitrary virtual address in the particular user-level process (e.g., VA1) and can setup a mapping in another user-level process to a second one of the GET/PUT content instances (e.g., Context 3) to some arbitrary virtual address in other user-level process (say VA2). In this regard, the kernel maps the pages to VA1 and VA2 in the two user-level processes. It should be noted, however, that VA1 and VA2 are virtual addresses in the process address space for respective user-level processes and that they are not kernel virtual addresses. Accordingly, the particular user-level process is associated with the 8 registers at Context 2 that show up at address VA1 whereby the particular user-level process writes registers at the VA1 address page. The MMU of the data processing core handling the particular user-level process translates those virtual addresses to the BASE+128 KB physical address (i.e., for VA1). But, because the particular user level process is using Context 2, these addresses are translated to BASE+128 KB. VA1 maps to BASE+128 KB and then the address of each one of the registers in the particular one of the GET/PUT context instances is an offset that is added to base virtual (VA1) or physical address (BASE+128 KB). Internal communication components of the initiator node route that physical address to its IMM for allowing the IMM to decode the physical address as belonging to the ring buffer GET/PUT engine (i.e., the BASE+128 KB physical address is what is later used by the IMM in transmitting a GET/PUT request derived from the particular one of the GET/PUT context instances to the remote target.
Next, the initiator node performs an operation 312 for determining that the particular one of the GET/PUT context instances is ready for being instantiated in accordance with the GET/PUT action. For example, the particular user-level process can poll a status field of the particular one of the GET/PUT context instances to check whether a previously initiated GET/PUT action is completed. This operation is performed because only a single GET action or PUT action (i.e., universally referred to herein as a GET/PUT action) can be outstanding for a given context, although multiple GET/PUT actions can be outstanding across different GET/PUT context instances. In view of the GET/PUT context instances all being the same, a unique context number is provided in a respective field of each one of the GET/PUT context instances to enable operations issued by one GET/PUT context instance from another to be differentiated.
After determining that the particular one of the GET/PUT context instances is ready for being instantiated in accordance with the GET/PUT action, the initiator node performs an operation 314 for populating fields of the particular one of the GET/PUT context instances with information defining the GET/PUT action. The initiator node then performs an operation 316 for creating a GET/PUT Request (i.e., a packet) defined by information within the particular one of the GET/PUT context instances, followed by performing an operation 318 for transmitting the GET/PUT request for reception by the target node. In the case of the initiator node and the target node being SoC nodes, the GET/PUT request is transmitted over a fabric connected between the initiator node and the target node.
An embodiment of a GET Request packet 400 configured in accordance with an embodiment of the present invention is shown in
An embodiment of a PUT Request packet 405 configured in accordance with an embodiment of the present invention is shown in
In response to the target node successfully performing an operation 320 for receiving the GET/PUT request, the target node performs an operation 322 for identifying a GET/PUT index (e.g., a Producer index in the case of a PUT action and a Consumer index in the case of a GET action) for the remote memory ring buffer using a ring identifier specified in or derived from information in the GET/PUT request. The target node then performs an operation 324 for performing the GET/PUT action (i.e., retrieving data from within the remote memory ring buffer or storing data within the remote memory ring buffer) at an address defined by the GET/PUT index. After the GET/PUT action is successfully completed, the target node performs an operation 326 for altering the GET/PUT index to reflect completion of the GET/PUT action. One embodiment of altering the GET/PUT index to reflect completion of the GET/PUT action includes incrementing and wrapping the GET/PUT index.
Next, the target node performs an operation 328 for creating a GET/PUT Response (i.e., a packet) defined by information within the GET/PUT request and information associated with completion of the GET/PUT action, followed by performing an operation 330 for transmitting the GET/PUT response for reception by the initiator node. In the case of the initiator node and the target node being SoC nodes, the GET/PUT response is transmitted over a fabric connected between the initiator node and the target node.
An embodiment of a GET Response packet 410 configured in accordance with an embodiment of the present invention is shown in
An embodiment of a PUT Response packet 415 configured in accordance with an embodiment of the present invention is shown in
In response to the initiator node successfully performing an operation 332 for receiving the GET/PUT response, the initiator node performs an operation 334 for updating the particular one of the GET/PUT context instances as being ready for a next GET/PUT action. In the case of the GET/PUT action having been a GET action, the initiator node also performs an operation for writing retrieved data into the local virtual address specified in the particular one of the GET/PUT context instances and based on the context number in the GET response packet.
It is disclosed herein that a PUT request configured in accordance with an embodiment of the present invention can include timestamp information. For example, as disclosed above, the GET/PUT context 170 discussed in reference to
The timestamp information is based on a time that is synchronized between, the initiator node, the target node and any other node(s) connected thereto (i.e., all nodes within a cluster of nodes). In preferred embodiments, this synchronized time is provided via a hardware-implemented service (e.g., implemented within hardware floating-point computation processors of each one of the nodes) Implementing the time synchronization as a hardware-implemented service is advantageous because a hardware implementation enables a very high rate of time sync packet exchanges to be sustained, which results in the nodes of the fabric (i.e., a node cluster) converging to a common time much faster than when time synchronization is provided as a software-implemented service. Further details of implementing the time synchronization as a hardware-implemented service are described in U.S. Non-Provisional patent application Ser. No. 13/899,751 filed on May 22, 2013 and entitled “TIME SYNCHRONIZATION BETWEEN NODES OF A SWITCHED INTERCONNECT FABRIC”, which is incorporated herein in its entirety by reference.
It is disclosed herein that remote memory GET/PUT functionality in accordance with embodiments of the present invention can use security keys to create a trusted collection of getters/putters to a given remote memory ring buffer. When a particular remote memory ring buffer is created by a target node, the target node creates a remote node security key (i.e., R Key) for provides an authentication mechanism to allow initiator nodes to have access to the particular remote memory ring buffer. As disclosed above, the GET/PUT context 170 discussed in reference to
It is disclosed herein that, in view of the disclosure made herein, a skilled person will appreciate that remote memory GET/PUT functionality in accordance with embodiments of the present invention can be utilized for implementing continuous cluster level tracing. To this end, remote memory GET/PUT functionality in accordance with embodiments of the present invention provide a means of effectively, efficiently, and reliably emitting time-stamped events into hardware-managed remote memory ring buffers (i.e., remote memory ring buffers) to provide a cluster-wide debug and performance tuning buffer. These hardware-managed remote memory ring buffers, which are implemented in the local memory of a node of a cluster of nodes (i.e., the target node), can be accessed by other nodes of the cluster (e.g., initiator nodes) and used as an append or intent log.
In view of the disclosures made herein, a skilled person will appreciate that a system on a chip (SoC) refers to integration of one or more processors, one or more memory controllers, and one or more I/O controllers onto a single silicon chip. Furthermore, in view of the disclosures made herein, the skilled person will also appreciate that a SoC configured in accordance with the present invention can be specifically implemented in a manner to provide functionalities definitive of a server. In such implementations, a SoC in accordance with the present invention can be referred to as a server on a chip. In view of the disclosures made herein, the skilled person will appreciate that a server on a chip configured in accordance with the present invention can include a server memory subsystem, a server I/O controllers, and a server node interconnect. In one specific embodiment, this server on a chip will include a multi-core CPU, one or more memory controllers that support ECC, and one or more volume server I/O controllers that minimally include Ethernet and SATA controllers. The server on a chip can be structured as a plurality of interconnected subsystems, including a CPU subsystem, a peripherals subsystem, a system interconnect subsystem, and a management subsystem.
An exemplary embodiment of a server on a chip (i.e. a SoC unit) that is configured in accordance with the present invention is the ECX-1000 Series server on a chip offered by Calxeda incorporated. The ECX-1000 Series server on a chip includes a SoC architecture that provides reduced power consumption and reduced space requirements. The ECX-1000 Series server on a chip is well suited for computing environments such as, for example, scalable analytics, webserving, media streaming, infrastructure, cloud computing and cloud storage. A node card configured in accordance with the present invention can include a node card substrate having a plurality of the ECX-1000 Series server on a chip instances (i.e., each a server on a chip unit) mounted on the node card substrate and connected to electrical circuitry of the node card substrate. An electrical connector of the node card enables communication of signals between the node card and one or more other instances of the node card.
The ECX-1000 Series server on a chip includes a CPU subsystem (i.e., a processor complex) that uses a plurality of ARM brand processing cores (e.g., four ARM Cortex brand processing cores), which offer the ability to seamlessly turn on-and-off up to several times per second. The CPU subsystem is implemented with server-class workloads in mind and comes with a ECC L2 cache to enhance performance and reduce energy consumption by reducing cache misses. Complementing the ARM brand processing cores is a host of high-performance server-class I/O controllers via standard interfaces such as SATA and PCI Express interfaces. Table 7 below shows technical specification for a specific example of the ECX-1000 Series server on a chip.
While the foregoing has been with reference to a particular embodiment of the invention, it will be appreciated by those skilled in the art that changes in this embodiment may be made without departing from the principles and spirit of the disclosure, the scope of which is defined by the appended claims.
This application is a Continuation of U.S. application Ser. No. 13/959,428, filed Aug. 5, 2013, incorporated herein by reference in its entirety.
| Number | Date | Country | |
|---|---|---|---|
| Parent | 13959428 | Aug 2013 | US |
| Child | 14950017 | US |
