The present disclosure relates to the field of semiconductor technology, and more particularly to resonant tunneling diodes and manufacturing methods thereof.
Terahertz technology, as a new science and technology, has important application prospects in security detection, material identification, secure communication, space exploration, high-precision radar, tissue biopsy, transient spectrum research and so on. A resonant tunneling diode, as a dual-terminal device, can produce negative differential resistance by using resonant tunneling phenomenon, which is configured to prepare terahertz radiation source, resulting in a wide range of concerns.
At present, a mature resonant tunneling diode (RTD) is mainly a GaAs-based material, due to inherent performance limitations of GaAs-based materials, a power of RTD merely reaches an order of micro watts. GaN-based resonant tunneling diodes have advantages of group III nitride semiconductor materials, such as, high electron rate, high breakdown field strength, large band gap adjustable range and radiation resistance. With this configuration, it is expected to realize terahertz high-power emission at room temperature.
However, at present, nitride-based resonant tunneling diodes face problems of a poor device stability and a low peak-to-valley current ratio, which greatly limits its practical application.
An object of the present disclosure is to provide a resonant tunneling diode and a manufacturing method thereof, so as to improve a device stability and a peak-to-valley current ratio.
To achieve the above object, a first aspect of the present disclosure provides a resonant tunneling diode, including:
a first barrier layer; a second barrier layer; and a potential well layer between the first barrier layer and the second barrier layer, where a material of the first barrier layer is AlxInyN1-x-y, 1>x>0, 1>y>0, and/or a material of the second barrier layer is AlmInnN1-m-n, 1>m>0, 1>n>0, and a material of the potential well layer includes a gallium element.
In some embodiments, the material of the potential well layer include at least one of InGaN, GaN, or AlInGaN.
In some embodiments, the material of the first barrier layer is AlxInyN1-x-y, y≤45%, and/or the material of the second barrier layer is AlmInnN1-m-n, n≤45%.
In some embodiments, the material of the first barrier layer is AlxInyN1-x-y, y≤30%; the material of the second barrier layer is AlmInnN1-m-n, n≤30%.
In some embodiments, a first isolation layer is disposed between the first barrier layer and the potential well layer; and/or a second isolation layer is disposed between the second barrier layer and the potential well layer.
In some embodiments, a material of the first isolation layer and/or a material of the second isolation layer includes AlN.
In some embodiments, a thickness of the first isolation layer ranges from 0.1 nm to 2 nm; and/or a thickness of the second isolation layer ranges from 0.1 nm to 2 nm.
In some embodiments, the resonant tunneling diode further includes a collector electrode and an emitter, the collector electrode close to the first barrier layer, the emitter close the second barrier layer; a third isolation layer between the collector electrode and the first barrier layer; and/or a fourth isolation layer between the emitter and the second barrier layer.
In some embodiments, a material of the collector electrode and a material of the emitter include a GaN-based material.
In some embodiments, a material of the third isolation layer and/or a material of a fourth isolation layer include AlN.
A second aspect of the present disclosure provides a method of manufacturing a resonant tunneling diode, including:
epitaxially growing a first barrier layer, a potential well layer, and a second barrier layer; where a material of the first barrier layer is AlxInyN1-x-y, 1>x>0, 1>y>0, and/or a material of the second barrier layer is AlmInnN1-m-n, 1>m>0, 1>n>0, and a material of the potential well layer including a gallium element.
In some embodiments, the material of the potential well layer include at least one of InGaN, GaN, or AlInGaN.
In some embodiments, the material of the first barrier layer is AlxInyN1-x-y, y≤30%; and/or the material of the second barrier layer is AlmInnN1-m-n, n≤30%.
In some embodiments, if the material of the first barrier layer is AlxInyN1-x-y, a temperature of epitaxially growing the first barrier layer ranges from 600° C. to 900° C.; and if the material of the second barrier layer is AlmInnN1-m-n, a temperature of epitaxially growing the second barrier layer ranges from 600° C. to 900° C.
In some embodiments, the method of manufacturing the resonant tunneling diode further includes: before epitaxially growing the potential well layer, epitaxially growing a first isolation layer on the first barrier layer; and/or before epitaxially growing the second barrier layer, epitaxially growing a second isolation layer on the potential well layer.
In some embodiments, epitaxially growing a collector electrode on a side of the first barrier layer away from the potential well layer; or before epitaxially growing the first barrier layer, epitaxially growing the collector electrode; and epitaxially growing an emitter on a side of the second barrier layer away from the potential well layer.
In some embodiments, the method of manufacturing the resonant tunneling diode further includes: before epitaxially growing the collector electrode on the side of the first barrier layer away from the potential well layer, epitaxially growing a third isolation layer on the side of the first barrier layer away from the potential well layer; or after epitaxially growing the collector electrode and before epitaxially growing the first barrier layer, epitaxially growing the third isolation layer;
and/or before epitaxially growing the emitter on the side of the second barrier layer away from the potential well layer, epitaxially growing a fourth isolation layer on the side of the second barrier layer away from the potential well layer.
In some embodiments, a material of the collector electrode and a material of the emitter include a GaN-based material.
In some embodiments, a material of the first isolation layer and/or a material of the second isolation layer includes AlN.
In some embodiments, a thickness of the first isolation layer ranges from 0.1 nm to 2 nm; and/or a thickness of the second isolation layer ranges from 0.1 nm to 2 nm.
Compared with the related art, the present disclosure has the following beneficial effects:
In the present disclosure, AlN-based material including indium element is used as the first barrier layer and/or the second barrier layer, and thus temperatures of growing the first barrier layer and the second barrier layer are correspondingly decreased, thereby avoiding a high temperature process. The absence of the high temperature process can prevent gallium atoms in the potential well layer from diffusing to the first barrier layer and the second barrier layer due to a high temperature, ensuring that compositions of the first barrier layer and the second barrier layer are uniform, preventing an effective thickness from thinning, thereby improving a device stability and a peak-to-valley current ratio.
Meanwhile, the first isolation layer and the second isolation layer can prevent gallium atoms in the potential well layer from diffusing to the first barrier layer and the second barrier layer, ensuring that compositions of the first barrier layer and the second barrier layer are uniform, preventing an effective thickness from thinning, thereby improving a device stability and a peak-to-valley current ratio.
To facilitate the understanding of the present disclosure, all reference numerals appearing in the present disclosure are listed below:
To make the above objects, features and advantages of the present disclosure more apparent and understandable, embodiments of the present disclosure will be described in detail below with reference to accompanying drawings.
First, referring to step S1 in
In this embodiment, the first barrier layer 11 can be epitaxially grown on the substrate 10.
A material of the substrate 10 can include at least one of sapphire, silicon carbide, silicon, or Silicon-On-Insulator (SOI) substrate; or at least one of sapphire, silicon carbide, silicon, or SOI substrate, and the group III nitride material; which is not limited in this embodiment.
The epitaxial growth processes of the first barrier layer 11, potential well layer 13 and the second barrier layer 12 can include: atomic layer deposition (ALD), chemical vapor deposition (CVD), molecular beam epitaxy (MBE), plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), or metal-organic chemical vapor deposition (MOCVD), or a combination thereof.
In some embodiments, the material of the first barrier layer 11 includes AlGaN, if an MOCVD epitaxial growth method is adopted, a temperature of epitaxially growing the first barrier layer 11 ranges from 900° C. to 1300° C.
In this embodiment, it is noted that a chemical element represents a certain material, but molar ratios of respective chemical elements in a material are not limited. For example, an AlGaN material includes aluminum, gallium and nitrogen elements, but respective molar ratios of the three elements are not limited.
A band gap width of the potential well layer 13 is less than a band gap width of the first barrier layer 11.
The material of the potential well layer 13 includes GaN, a band gap width of the potential well layer 13 is 3.4 eV. If an MOCVD epitaxial growth method is adopted, a temperature of epitaxially growing the potential well layer 13 ranges from 800° C. to 1200° C.
The material of the second barrier layer 12 can be AlmInnN1-m-n, m is a percentage of a mass for an aluminum element to a sum of masses for the aluminum element, an indium element and a nitrogen element, and n is a percentage of a mass for the indium element to a sum of masses for the aluminum element, the indium element and the nitrogen element. The higher a temperature of epitaxially growing the second barrier layer 12 is, the smaller the n is; the lower a temperature of epitaxially growing the second barrier layer 12 is, the greater the n is. The lower the temperature of epitaxially growing the second barrier layer 12 is, the more it can avoid a diffusion of gallium atoms in the potential well layer 13 to the first barrier layer 11 and the second barrier layer 12, respectively.
A band gap width of the second barrier layer 12 is greater than a band gap width of the potential well layer 13.
A band gap width of AlN is 6.2 eV, the higher an amount of an indium element in an AlInN material is, the smaller a band gap width of the AlInN material is. If n≤45%, the second barrier layer 12 and the potential well layer 13 which is made of a GaN material can form a quantum well with a high tunneling efficiency. If an MOCVD epitaxial growth method is adopted and if n≤45%, a temperature of epitaxially growing the second barrier layer 12 ranges from 600° C. to 900° C.; if 30%<n≤45%, the temperature of epitaxially growing the second barrier layer 12 ranges from 600° C. to 800° C.; and if n≤30%, the temperature of epitaxially growing the second barrier layer 12 ranges from 700° C. to 900° C.
However, the lower the temperature of epitaxially growing the second barrier layer 12 is, the more lattice defects are. Thus, in some embodiments, n≤30%.
In other embodiments, the material of the potential well layer 13 includes InGaN or AlInGaN, and a band gap width of InGaN is between 0.7 eV to 3.4 eV. A band gap width of AlInGaN is between 0.7 eV to 6.2 eV. The material of the second barrier layer 12 is AlmInnN1-m-n, n≤45%, the second barrier layer 12 and the potential well layer 13 which is made of an InGaN material can form a quantum well with a higher tunneling efficiency. In some embodiments, n≤30%.
Using an AlN-based material including an indium element as the second barrier layer 12 can reduce a temperature of growing the second barrier layer 12, thereby avoiding a high temperature process, and avoiding a diffusion of gallium atoms in the potential well layer 13 to the first barrier layer 11 and the second barrier layer 12 respectively due to the high temperature, ensuring that compositions of the first barrier layer 11 and the second barrier layer 12 are uniform, and preventing an effective thickness from thinning, and thereby improving device stability and a peak-to-valley current ratio.
Thereafter, referring to
The substrate 10 can be removed by laser stripping or chemical etching.
In some embodiments, the substrate 10 can be not removed. In other words, the substrate 10 remains in the resonant tunneling diode 1.
Referring to
a first barrier layer 11; a second barrier layer 12; and a potential well layer 13 between the first barrier layer 11 and the second barrier layer 12, a material of the first barrier layer 11 including AlGaN, a material of the potential well layer 13 including a gallium (Ga) element, and a material of the second barrier layer 12 being AlmInnN1-m-n, 1>m>0, 1>n>0.
The first barrier layer 11, the potential well layer 13, and the second barrier layer 12 form a dual barrier quantum well structure. A band gap width of the potential well layer 13 is less than a band gap width of the first barrier layer 11 and a band gap width of the second barrier layer 12. In some embodiments, the material of the potential well layer 13 includes GaN. The material of the second barrier layer 12 is AlmInnN1-m-n, n≤45%, the second barrier layer 12 and the well layer 13 which is made of a GaN material can form a quantum well with a higher tunneling efficiency. In some embodiments, n≤30%.
In other embodiments, the material of the well layer 13 includes InGaN or AlInGaN. The material of the second barrier layer 12 is AlmInnN1-m-n, n≤45%, the second barrier layer 12 and the potential well layer 13 which is made of an InGaN material can form a quantum well with a higher tunneling efficiency. In some embodiments, n≤30%.
A material of the second barrier layer 12 can include AlGaN. The material of the potential well layer 13 can include at least one of InGaN, GaN, or AlInGaN.
The material of the first barrier layer 11 is AlxInyN1-x-y, x is a percentage of a mass for an aluminum element to a sum of masses for the aluminum element, an indium element and a nitrogen element, and y is a percentage of a mass for the indium element to a sum of masses for the aluminum element, the indium element and the nitrogen element. The higher a temperature of epitaxially growing the first barrier layer 11 is, the smaller the y is; the lower the temperature of epitaxially growing the first barrier layer 11 is, the greater the y is. The lower the temperature of epitaxially growing the first barrier layer 11 is, the more it can avoid a diffusion of gallium atoms in the potential well layer 13 to the first barrier layer 11 and the second barrier layer 12, respectively.
If y≤45%, the first barrier layer 11 and the potential well layer 13 which is made of a GaN material can form a quantum well with a high tunneling efficiency. If an MOCVD epitaxial growth method is adopted and if y≤45%, the temperature of epitaxially growing the first barrier layer 11 ranges from 600° C. to 900° C.; if 30%<y<45%, the temperature of epitaxially growing the first barrier layer 11 ranges from 600° C. to 800° C.; and if y≤30%, the temperature of epitaxially growing the first barrier layer 11 ranges from 700° C. to 900° C. However, the lower the temperature of epitaxially growing the first barrier layer 11 is, the more lattice defects are. Thus, in some embodiments, y≤30%.
Using an indium-including AlN-based material as the first barrier layer 11 can reduce the temperature of growing the first barrier layer 11, so as to avoid a high temperature process, and avoid a diffusion of gallium atoms in the potential well layer 13 to the first barrier layer 11 and the second barrier layer 12 respectively due to the high temperature, so as to ensure that compositions of the first barrier layer 11 and the second barrier layer 12 are uniform, and prevent an effective thickness from thinning, and thereby a device stability and a peak-to-valley current ratio is improved.
In the resonant tunneling diode in the second embodiment of the present disclosure, the material of the first barrier layer 11 is AlxInyN1-x-y, 1>x>0, 1>y>0.
In some embodiments, the material of the potential well layer 13 includes GaN. The material of the first barrier layer 11 is AlxInyN1-x-y, y≤45%, the first barrier layer 11 and the well layer 13 which is made of a GaN material can form a quantum well with a higher tunneling efficiency. In some embodiments, y≤30%.
In other embodiments, the material of the well layer 13 includes InGaN or AlInGaN. The material of the first barrier layer 11 is AlxInyN1-x-y, y≤45%, the first barrier layer 11 and the well layer 13 which is made of an InGaN material can form a quantum well with a higher tunneling efficiency. In some embodiments, y≤30%.
In some embodiments, the material of the second barrier layer 12, which is epitaxially grown on the substrate 10, can be AlmInnN1-m-n, 1>m>0, 1>n>0; or the material of the first barrier layer 11, which is epitaxially grown on the substrate 10, is AlxInyN1-x-y, 1>x>0, 1>y>0.
Referring to
The arrangement of the first isolation layer 14 can prevent gallium atoms in the potential well layer 13 from diffusing to the first barrier layer 11, ensuring that compositions of the first barrier layer 11 are uniform, preventing an effective thickness from thinning, thereby improving a device stability and a peak-to-valley current ratio of the resonant tunneling diode 1. A material of the first isolation layer 14 can include AlN.
A thickness of the first isolation layer 14 can range from 0.1 nm to 2 nm.
The arrangement of the second isolation layer 15 can prevent gallium atoms in the potential well layer 13 from diffusing to the second barrier layer 12, ensuring that compositions of the second barrier layer 12 are uniform, preventing an effective thickness from thinning, thereby improving a device stability and a peak-to-valley current ratio of the resonant tunneling diode 1. A material of the second isolation layer 15 can include AlN.
A thickness of the second isolation layer 15 can range from 0.1 nm to 2 nm.
Correspondingly, a method of manufacturing the resonant tunneling diode 2 in the third embodiment is substantially the same as the method of manufacturing the resonant tunneling diode 1 in the first embodiment and the second embodiment, except that, before the potential well layer 13 is epitaxially grown, a first isolation layer 14 is epitaxially grown on the first barrier layer 11, before the second barrier layer 12 is epitaxially grown, a second isolation layer 15 is epitaxially grown on the potential well layer 13.
The epitaxial growth processes of the first isolation layer 14 and the second barrier layer 15 can refer to the epitaxial growth processes of the first barrier layer 11, the potential well layer 13, and the second barrier layer 12.
Referring to
Referring to
Referring to
A material of the collector electrode 20 and a material of the emitter electrode 30 both include a group III nitride, for example, a GaN-based material, and more particularly, GaN.
Correspondingly, a manufacturing method in the present embodiment is substantially the same as the manufacturing methods in the previous embodiments, except that step S1 is followed by step S2, the collector electrode 20 is epitaxially grown on a side of the first barrier layer 11 away from the potential well layer 13, the emitter electrode 30 is epitaxially grown on a side of the second barrier layer 12 away from the potential well layer 13.
A material of the collector electrode 20 and a material of the emitter electrode 30 both include a group III nitride.
A difference between the manufacturing method in the present embodiment and the manufacturing method in the previous embodiment is that at step S1: before the first barrier layer 11 is epitaxially grown, the collector electrode 20 is epitaxially grown on the substrate 10; and/or before the substrate 10 is removed, the emitter electrode 30 is epitaxially grown on the second barrier layer 12.
The epitaxial growth processes of the collector electrode 20 and the emitter electrode 30 can refer to the epitaxial growth processes of the first barrier layer 11, the potential well layer 13, and the second barrier layer 12.
Referring to
The third isolation layer 16 can prevent gallium atoms in the collector electrode 20 from diffusing to the first barrier layer 11. The fourth isolation layer 17 can prevent gallium atoms in the emitter electrode 30 from diffusing to the second barrier layer 12.
A material of the third isolation layer 16 and a material of the fourth isolation layer 17 both can include AlN.
A thickness of the third isolation layer 16 can range from 0.1 nm to 2 nm. A thickness of the fourth isolation layer 17 can range from 0.1 nm to 2 nm.
In some embodiments, any one of the third isolation layer 16 and the fourth isolation layer 17 can be disposed.
Correspondingly, the manufacturing method in the present embodiment is substantially the same as the manufacturing method in the previous embodiment, except that at step S1: before the collector electrode 20 is epitaxially grown on a side of the first barrier layer 11 away from the potential well layer 13, the third isolation layer 16 is epitaxially grown on the side of the first barrier layer 11 away from the potential well layer 13; or after the collector electrode 20 is epitaxially grown on the substrate 10 and before the first barrier layer 11 is epitaxially grown, the third isolation layer 16 is epitaxially grown;
and/or at step S1: before the emitter electrode 30 is epitaxially grown on a side of the second barrier layer 12 away from the potential well layer 13, the fourth isolation layer 17 is epitaxially grown on the side of the second barrier layer 12 away from the potential well layer 13.
The epitaxial growth processes of the third isolation layer 16 and the fourth isolation layer 17 can refer to epitaxial growth processes of the first isolation layer 14 and the second isolation layer 15.
Although the present application is disclosed above, the present disclosure is not limited thereto. One of ordinary skill in the art can make various variants and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure should be set forth by the appended claims.
This application is a U.S. National Phase of PCT Application No. PCT/CN2021/079264 (filed 5 Mar. 2021), the entire contents of which are incorporated herein by reference.
Filing Document | Filing Date | Country | Kind |
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PCT/CN2021/079264 | 3/5/2021 | WO |