Claims
- 1. A semiconductor wafer resistant to thermal shock, comprising:
- a non-polycrystalline wafer; and
- a ring, loop or closed figure of polycrystalline material formed around an edge of said wafer.
- 2. A device according to claim 1 including a second ring, loop or closed figure of polycrystalline material formed inside of said ring loop, or closed figure of polycrystalline material formed around said edge of said wafer.
- 3. A device according to claim 2 including any other combination of closed lines or closed figures of polycrystalline material formed inside of said second ring, loop or closed figure.
- 4. A semiconductor wafer resistant to thermal shock, comprising: a non-polycrystalline wafer, said wafer having a bottom surface, a device surface opposite said bottom surface, an edge; and
- a ring, loop or closed figure of polycrystalline material formed around said edge of said wafer.
- 5. A device according to claim 4 wherein said ring, loop, or closed figure of polycrystalline material formed around said edge of said wafer extends between said bottom surface and said device surface.
- 6. A device according to claim 4 wherein said ring, loop, or closed figure of polycrystalline material formed around said edge of said wafer extends between and includes said bottom and device surfaces.
- 7. A device according to claim 4 including at least a second ring, loop or closed figure of polycrystalline material formed inside of said ring, loop, or closed figure of polycrystalline material formed around said edge of said wafer.
- 8. A device according to claim 7 wherein said second ring, loop or closed figure of polycrystalline material extends from said bottom surface toward, but does not include, said device surface.
- 9. A semiconductor wafer resistant to cracking or breakage caused by device fabrication processes, comprising:
- a non-polycrystalline wafer, said wafer having a bottom surface, a device surface opposite said bottom surface, an edge; and
- a ring, loop or closed figure of polycrystalline material formed within said wafer, extending from said bottom surface toward, but not including, said device surface.
- 10. A device according to claim 9 wherein said ring, loop, or closed figure of polycrystalline material is formed around the edge of said wafer.
- 11. A device according to claim 9 wherein said ring, loop or closed figure of polycrystalline material is formed within the edge of said wafer.
- 12. A device according to claim 11 including a ring of polycrystalline material formed around said edge of said wafer.
- 13. A device according to claim 12 wherein said ring of polycrystalline material formed around said edge of said wafer extends between said bottom surface and said device surface.
- 14. A device according to claim 12 wherein said ring of polycrystalline material formed around said edge of said wafer extends between and includes said bottom and device surfaces.
- 15. A device according to claim 10 including a second ring, loop or closed figure of polycrystalline material formed inside of said ring, loop, or closed figure or polycrystalline material.
- 16. A device according to claim 11 including a second ring, loop or closed figure of polycrystalline material formed inside of said ring, loop, or closed figure of polycrystalline material.
- 17. A device according to claim 15 including at least one additional combination of closed lines or closed figures of polycrystalline material formed inside said second ring, loop or closed figure.
- 18. A device according to claim 16 including at least one additional combination of closed lines or closed figures of polycrystalline material formed inside said second ring, loop or closed figure.
Parent Case Info
This is a division, of application Ser. No. 07/636,314, filed Dec. 31, 1990, now U.S. Pat. No. 5,149,675.
US Referenced Citations (4)
Divisions (1)
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Number |
Date |
Country |
Parent |
636314 |
Dec 1990 |
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