1. Field of the Invention
The present invention relates to image scaling of a video display device such as a liquid crystal display (LCD) television or an LCD monitor, and more particularly, to a scaling filter and a method thereof.
2. Description of the Prior Art
A video display device such as a liquid crystal display (LCD) television or an LCD monitor usually includes a scaling filter, which is also referred to as a scalar for simplicity, for performing image scaling of video data to be displayed. The display dimension of the video display device can be very large, so a zoom (zoom in) operation on the video data is usually required. In addition, in most cases, certain useful functionality such as PIP/POP needs both the zoom operation mentioned above and a shrink operation. As a result, the scaling filter plays an important role in the video display device.
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It is therefore an objective of the present invention to provide a scaling filter and a method thereof to solve the above-mentioned problem.
The present invention provides a scaling filter including: a plurality of line buffers for buffering a plurality of pixel values corresponding to a plurality of source pixels, respectively; (N+1) multiplexers coupled to the line buffers for multiplexing the pixel values to output (N+1) intermediate values, respectively, wherein N is an integer; N multipliers coupled to N corresponding multiplexers out of the (N+1) multiplexers, respectively, each of the multipliers multiplying a specific intermediate value outputted by a specific multiplexer by a specific factor to generate a multiplied value; and a summation circuit coupled to a 1st multiplexer out of the (N+1) multiplexers and the N multipliers for summing the intermediate value generated by the 1st multiplexer and the multiplied values generated by the multipliers to generate a new pixel value.
While the scaling filter mentioned above is disclosed, the present invention correspondingly provides a scaling filtering method including: buffering a plurality of pixel values corresponding to a plurality of source pixels, respectively; multiplexing the pixel values to output (N+1) intermediate values, respectively, wherein N is an integer; multiplying N corresponding intermediate values out of the (N+1) intermediate values by specific factors to generate N multiplied values, respectively; and summing a 1st intermediate value out of the (N+1) intermediate values and the N multiplied values to generate a new pixel value.
According to an embodiment of the present invention, a scaling filter is further disclosed. The scaling filter includes: two line buffers for buffering a plurality of pixel values corresponding to a plurality of source pixels, respectively; (N+1) multiplexers coupled to the line buffers for multiplexing the pixel values to output (N+1) intermediate values, respectively, wherein N is an integer; N bit shifters coupled to N corresponding multiplexers out of the (N+1) multiplexers, respectively, each of the bit shifters bit-shifting a specific intermediate value outputted by a specific multiplexer to generate a shifted value; and a summation circuit coupled to a 1st multiplexer out of the (N+1) multiplexers and the bit shifters for summing the intermediate value generated by the 1st multiplexer and the shifted values generated by the bit shifters to generate a new pixel value.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
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According to this embodiment, the scaling filter 200 is implemented utilizing only two line buffers 210-1 and 210-2. The line buffers 210-1 and 210-2 buffer a plurality of pixel values 208-1 and 208-2 corresponding to a plurality of source pixels, respectively, and output the pixel values 208-1 and 208-2 as output data 212-1 and 212-2 of the line buffers 210-1 and 210-2. Implementation of line buffers 210-1 and 210-2 and operation thereof are well known in the art and will not be described here.
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According to the present invention, each of the N multipliers mentioned above multiplies a specific intermediate value outputted by a specific multiplexer by a specific factor to generate a multiplied value. In this embodiment, the N multipliers can be implemented utilizing the bit shifters 224-1, 224-2, . . . , 224-N as shown in
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In contrast to the prior art, the scaling filter 200 of the present invention and the method thereof may utilize only two line buffers so implementing the scaling filter 200 requires less material costs. In addition, the multipliers of the scaling filter 200 can be simply implemented utilizing bit shifters 224-1, 224-2, . . . , 224-N as mentioned above. Therefore, the operation of the scaling filter 200 of the present invention is simple and fast.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.