Patent Application
20230163000
The present disclosure relates to a semiconductor apparatus, a temperature compensation system, and an alarm system.
Some semiconductor apparatuses have a temperature sensor equipped inside a device to measure the internal temperature of the device. In this type of semiconductor apparatus, manufacturing variation and the like sometimes causes fluctuations in the temperature measurements by the temperature sensor. Such a fluctuation in individual devices is corrected by bringing a pad electrode in contact with a thermocouple to measure the device’s temperature and using the obtained measurement results to compensate for the temperature measured by the temperature sensor (e.g., see Patent Document 1).
Patent Document 1: Japanese Patent Application Laid-Open No. 2019-134318
The temperature compensation mentioned above has a challenge caused by fluctuations in the in-plane temperatures of a wafer. The temperature measurement and compensation in the temperature sensor are thus required to be performed for each semiconductor chip. The traditional technique disclosed in Patent Document 1 measures the in-plane temperature of the wafer by bringing the pad electrode in contact with the thermocouple. This traditional technique, however, fails to recognize the actual temperature for each semiconductor chip while driving the device.
Thus, the present disclosure is intended to provide a semiconductor apparatus capable of recognizing the actual temperature for each semiconductor chip even while driving the device, a temperature compensation system of the semiconductor apparatus, and an alarm system using the temperature compensation system.
A semiconductor apparatus of the present disclosure for achieving the above object includes:
Furthermore, a temperature compensation system of the present disclosure for achieving the above object includes:
In addition, an alarm system of the present disclosure for achieving the above object includes:
Hereinbelow, modes for implementing the technology according to the present disclosure (hereinafter, referred to as “embodiments”) are described in detail using the drawings. The technology according to the present disclosure is not limited to the embodiments, and various numerical values and the like in the embodiments are examples. In the following description, the same reference numerals are used for the same elements or elements having the same functions, and a repeated description is omitted. Note that the description is given in the following order.
In a semiconductor apparatus, a temperature compensation system, and an alarm system according to present disclosure, an impedance element can be configured as a temperature-dependent element, preferably, a resistance element.
Furthermore, in the semiconductor apparatus of the present disclosure including the above-described preferable configuration, the semiconductor chip may be equipped with a temperature sensor configured to measure a temperature inside a device.
In the semiconductor apparatus of the present disclosure including the above-described preferable configuration, the at least two pad electrodes connected with the impedance element may be larger in size than another pad electrode. Alternatively, the at least two pad electrodes connected with the impedance element may be smaller in size than another pad electrode.
Furthermore, in the semiconductor apparatus of the present disclosure including the above-described preferable configuration, the at least two pad electrodes connected with the impedance element may be provided such that another pad electrode is sandwiched between the at least two pad electrodes. Alternatively, the at least two pad electrodes connected with the impedance element each may include multiple pad electrodes that are adjacent and electrically connected to each other.
Furthermore, in the semiconductor apparatus of the present disclosure including the above-described preferable configuration, the pad electrodes connected with the impedance element may be three or more pad electrodes. In addition, the three or more pad electrodes may be electrically connected with the impedance element using wiring that is set such that a conductor length, conductor material, a wire diameter, and electrical resistance are equal.
Furthermore, in the semiconductor apparatus of the present disclosure including the above-described preferable configuration, the semiconductor apparatus may be an image capturing apparatus with a stacked structure semiconductor chip in which a first semiconductor chip and a second semiconductor chip are stacked and electrically connected to each other. At this time, a pixel array section in which a pixel is arranged may be formed on the first semiconductor chip, and a peripheral circuit section of the pixel array section may be formed on the second semiconductor chip. Then, the impedance element is provided in the first semiconductor chip, and the at least two pad electrodes connected with the impedance element may be provided in the second semiconductor chip.
The temperature compensation system and the alarm system having the above-mentioned preferable configuration of the present disclosure include the temperature measuring unit. This temperature measuring unit can apply a certain voltage to a resistance element to calculate the temperature of the semiconductor chip from a value of the current flowing through the resistance element. Alternatively, this temperature measuring unit can cause a certain current to flow through the resistance element to calculate the temperature of the semiconductor chip from a value of the voltage across the resistance element.
An example of the semiconductor apparatus to which the technology according to the present disclosure is applied can include an image capturing apparatus. The description is now given, as an example of the image capturing apparatus, of a complementary-metal-oxide semiconductor (CMOS) image sensor, which is a kind of the image capturing apparatus using an X-Y address scheme. The CMOS image sensor is produced by applying or partially using a CMOS process.
The CMOS image sensor 1 according to this example has a pixel array section 11 and a peripheral circuit section around the pixel array section 11 that are integrated on a semiconductor chip (semiconductor substrate) 10. The pixel array section 11 includes a pixel 20 arranged in a two-dimensional array in the row and column directions, that is, in a matrix. The pixel 20 includes a photoelectric transducer that generates a photo-charge having the amount of charge corresponding to the amount of incident light. Herein, the row direction refers to the arrangement direction of the pixels 20 in the pixel row, that is, the direction along the pixel row (so-called horizontal direction), and the column direction refers to the arrangement direction of the pixels 20 in the pixel column, that is, the direction along the pixel column (so-called vertical direction).
The peripheral circuit section around the pixel array section 11 has circuit units including, for example, such as a row selection unit 12, a column processing unit 13, a logic circuit unit 14, and a timing control unit 15. The description is given below for the function of each component of the row selection unit 12, the column processing unit 13, the logic circuit unit 14, the timing control unit 15, and the like.
The row selection unit 12 includes a shift register, an address decoder, and the like and controls the scanning of the pixel row and the address of the pixel row upon selecting each pixel 20 of the pixel array section 11. Although the detailed configuration of the row selection unit 12 is not illustrated, it typically has two scanning systems, a read scanning system and a sweep scanning system.
The read scanning system selectively scans the pixels 20 in the pixel array section 11 in sequence row by row to read a pixel signal from the pixel 20. The pixel signal that is read from the pixel 20 is an analog signal. The sweep scanning system performs sweep scanning on the read row that has been subjected to the read scanning by the read scanning system. The sweep scanning system performs the sweep scanning, preceding the read scanning by the time taken for the shutter speed.
The sweep scanning by the sweep scanning system causes unnecessary charges to be swept out from a photoelectric converter of the pixel 20 in the read row, resetting the photoelectric converter. Then, the sweeping out (resetting) of unnecessary charges by the sweeping scanning system operates so-called an electronic shutter mode. The electronic shutter mode herein refers to an operation of discarding the photo-charge of the photoelectric converter and newly starting an exposure (starting photo-charge accumulation).
The pixel signal read from each pixel 20 in the pixel row selected by the row selection unit 12 is supplied to the column processing unit 13 in each pixel column. The column processing unit 13 has, for example, an analog-digital converter (ADC) or the like that converts an analog pixel signal output from the pixel 20 into a digital pixel signal.
An example of the analog-to-digital converter of the column processing unit 13 can include a single-slope analog-digital converter that is one example of a reference signal comparison analog-to-digital converter. Examples of the analog-to-digital converter are, however, not limited to the single-slope analog-to-digital converter, and they can include a sequential comparison analog-to-digital converter, a delta-sigma modulation (Δ∑ modulation) analog-digital converter, or the like.
The logic circuit unit 14 has, for example, an arithmetic processing function or the like and executes predetermined signal processing on the pixel signal that is read through the column processing unit 13 from each pixel 20 of the pixel array section 11 for outputting.
The timing control unit 15 generates various timing signals, clock signals, control signals, and the like to control the driving of the row selection unit 12, the column processing unit 13, the logic circuit unit 14, and the like on the basis of the generated signals.
The image capturing apparatus that is a typical example of the CMOS image sensor 1 having the configuration mentioned above is equipped with a temperature sensor 16 in the device to sense the internal temperature of the device. The temperature sensor 16 is configured to generate the temperature inside the device by, for example, using a technique similar to that used in the bandgap voltage reference circuit known in the art.
The temperature sensor 16 that senses the internal temperature of the device is preferably formed in the region where the peripheral circuit section of the pixel array section 11 is formed. The part where the temperature rises during the operation of the device in the CMOS image sensor 1 seems to be, for example, the column processing unit 13 among components in the peripheral circuit section. Thus, in this example, the temperature sensor 16 is formed in the region where the column processing unit 13 is formed.
Moreover, herein, this example employs an N-channel MOS field effect transistor (FET) as four transistors of transfer transistor 22, reset transistor 23, amplification transistor 24, and selection transistor 25. However, the combination of the conductive types of these four transistors 22 to 25 exemplified herein is only illustrative and is not limited to the combinations described or illustrated.
The row selection unit 12 described above appropriately supplies the pixel 20 with a transfer signal TRG, a reset signal RST, and a selection signal SEL.
The photodiode 21 has an anode electrode connected to a low-potential side power supply (e.g., ground) and photoelectrically converts the received light into a photo-charge having the amount of charge corresponding to the amount of the received light (a photoelectron in this example) for accumulation of the photo-charge. The photodiode 21 has a cathode electrode electrically connected to a gate electrode of the amplification transistor 24 via the transfer transistor 22. Herein, the electrical connecting region with the gate electrode of the amplification transistor 24 becomes a floating diffusion (FD) region (or impurity diffusion region). The floating diffusion FD is a charge-voltage converter that converts an electric charge into a voltage.
The transfer signal TRG in which a high level (e.g., level of VDD) is active is supplied from the row selection unit 12 to the gate electrode of the transfer transistor 22. The transfer transistor 22 then responds to the transfer signal TRG to be conductive. The transfer transistor 22 transfers the photo-charge, which is photoelectrically converted by the photodiode 21 and accumulated in the photodiode 21, to the floating diffusion FD.
The reset transistor 23 is connected between a node of the high-potential side power supply voltage VDD and the floating diffusion FD. The reset signal RST in which a high level is active is supplied from the row selection unit 12 to a gate electrode of the reset transistor 23. The reset transistor 23 then responds to the reset signal RST to be conductive. The reset transistor 23 ejects the charge of the floating diffusion FD to the node of the voltage VDD, resetting the floating diffusion FD.
The amplification transistor 24 has the gate electrode connected to the floating diffusion FD and a drain electrode connected to the node of the high-potential side power supply voltage VDD. The amplification transistor 24 functions as an input unit for a source follower that reads out a signal obtained by photoelectric conversion in the photodiode 21. In other words, the amplification transistor 24 has a source electrode connected to a vertical signal line VSL via the selection transistor 25. Then, the amplification transistor 24 and a current source I constitute a source follower that converts the voltage of the floating diffusion FD into the potential of the vertical signal line VSL. The current source I is connected to one end of the vertical signal line VSL.
The selection transistor 25 has a drain electrode connected to the source electrode of the amplification transistor 24 and a source electrode connected to the vertical signal line VSL. The selection signal SEL in which a high level is active is supplied from the row selection unit 12 to the gate electrode of the selection transistor 25. The selection transistor 25 then responds to the selection signal SEL to be conductive, which causes the pixel 20 to be the selection state, and delivers the signal being output from the amplification transistor 24 to the vertical signal line VSL.
Moreover, this example exemplifies, as a pixel circuit in the pixel 20, the 4-Tr configuration including the transfer transistor 22, the reset transistor 23, the amplification transistor 24, and the selection transistor 25, that is, four transistors (Tr). The pixel circuit is not limited to the configuration in this example. In one example, the 3-Tr configuration in which the selection transistor 25 is omitted and the amplification transistor 24 is caused to have the function of the selection transistor 25 can be employed. The configuration of 5-Tr or more having the increased number of transistors can be employed as necessary.
The semiconductor chip of the CMOS image sensor 1 described above has so-called a flat plane structure, as is apparent from
The semiconductor chip structure of the CMOS image sensor 1 is not limited to the flat plane structure and can be so-called a stacked structure. The stacked structure is a chip structure in which the peripheral circuit section of the pixel array section 11 is formed on at least one semiconductor substrate different from the semiconductor substrate on which the pixel array section 11 is formed. Such a stacked structure allows the size (area) of the first-placed layer semiconductor substrate to be sufficient to form the pixel array section 11, which reduces the first-placed layer semiconductor substrate and even the size of the entire chip. Furthermore, a process suitable for manufacturing the pixel 20 is applicable to the first-placed semiconductor substrate and a process suitable for manufacturing the circuit portion is applicable to the other semiconductor substrate. This allows an advantage of obtaining the optimization of processes in manufacturing the CMOS image sensor 1.
In addition, application examples of the image capturing apparatus represented by the CMOS image sensor can include, for example, an in-vehicle image sensor mounted on a vehicle for capturing an image or the like of the outside of the vehicle. However, the in-vehicle image sensor is illustrative and is not limited to the in-vehicle use application.
The in-vehicle image sensor is equipped with a temperature sensor (thermometer) inside the device to stop the operation of a system upon reaching the upper limit temperature as the safety performance. The temperature sensor requires a high sensing accuracy of ±1 degree, particularly in the high temperature range. Thus, the fluctuations in an individual device are corrected by bringing a wafer 102 on which the semiconductor chip 101 is arranged as illustrated in
The challenge caused by this temperature compensation is fluctuations in the in-plane temperatures of a wafer. Therefore, it is necessary to measure the temperature for each semiconductor chip and compensate for the temperature measured by the temperature sensor for each semiconductor chip, however, in the above-described traditional technique to measure the in-plane temperature of the wafer by bringing the pad electrode in contact with the thermocouple, it is not possible to recognize the actual temperature for each semiconductor chip while driving the device. For this reason, the difference between the temperature set in the wafer prober and the actual temperature is a temperature compensation error, which makes it difficult to achieve an accuracy of ±1 degree, especially in a high temperature range. Moreover,
The image capturing apparatus is an example of the semiconductor apparatus according to the first embodiment of the present disclosure. The CMOS image sensor 1, a specific example of the image capturing apparatus, is equipped inside the device with the temperature sensor 16. The temperature sensor 16 for sensing the internal temperature of the device is capable of recognizing (measuring) the actual temperature in units of semiconductor chips (hereinafter can be simply referred to as “in chip units”) while driving the device.
The CMOS image sensor 1 according to the present embodiment has a configuration in which an impedance element is electrically connected between at least two pad electrodes among a plurality of pad electrodes formed in the semiconductor chip 10, allowing recognition of the actual temperature in chip units. In addition, upon measuring the actual temperature of the semiconductor chip 10, a certain electrical signal (certain voltage or current) is applied between the at least two pad electrodes connected with the impedance element from the outside of the semiconductor chip 10.
An example usable as the impedance element implemented in the semiconductor chip 10 can include a temperature-dependent element, for example, a resistance element 31, as illustrated in
Moreover, the resistance element is herein exemplified as a component for temperature measurement to be implemented inside the semiconductor chip 10. The temperature measuring component is not limited to the resistance element and can include an impedance element such as a diode in addition to the resistance element. In addition, a pad electrode 32_3 is supplied with a clock, a voltage, or the like through a probe needle 33_3.
The resistance element 31, one example implemented in the semiconductor chip 10 for temperature measurement, is applied with the certain electrical signal (certain voltage or current) from the outside of the semiconductor chip 10, as described above. This makes it possible to measure the current or voltage proportional to the actual temperature of the semiconductor chip 10, measuring the actual temperature in chip units while driving the device. Furthermore, using the resistance element 31 implemented in the semiconductor chip 10 as a sensor makes it possible to sense the actual temperature of the semiconductor chip 10 even for the assembly component of the CMOS image sensor 1.
The description is now given for a specific example of implementing the resistance element 31 as an impedance element in the semiconductor chip 10 and measuring the actual temperature of the semiconductor chip 10 in chip units.
Example 1 is an example of applying a certain voltage to the resistance element 31 to measure the actual temperature of the semiconductor chip 10.
As illustrated in
The temperature measurement according to Example 1 applies the certain voltage Vin to the resistance element 31, allowing the measurement of the current value Imeas that reflects the properties of the resistive material of the temperature-dependent resistance element 31, as described above. This measured current value Imeas enables the calculation of the internal temperature of the semiconductor chip 10. The calculated temperature is then usable as a compensating temperature to compensate for the temperature sensed by the temperature sensor 16 (see
Example 2 is an example of causing a certain current to flow through the resistance element 31 to measure the actual temperature of the semiconductor chip 10.
The temperature measurement according to Example 2 as illustrated in
The temperature measurement according to Example 2 causes the certain current Iforce to flow through the resistance element 31, allowing the measurement of the voltage value Vmeas that reflects the properties of the resistive material of the temperature-dependent resistance element 31, as described above. This measured voltage value Vmeas enables the calculation of the internal temperature of the semiconductor chip 10. The calculated temperature is then usable as a compensating temperature to compensate for the temperature sensed by the temperature sensor 16.
Example 3 is a modification of Example 1 and illustrates an example in which a referenced resistance element is provided in the measurement system.
The temperature measurement according to Example 3 uses a configuration having a reference resistance element 46 connected between the pad electrodes 32_1 and 32_2 as illustrated in
The temperature measurement according to Example 3 described above has the same basic configuration as the temperature measurement according to Example 1. Thus, it is possible to measure the current value Imeas, which reflects the properties of the resistive material of the temperature-dependent resistance element 31, and calculate the internal temperature of the semiconductor chip 10 using the measured current value Imeas. In particular, the temperature measurement according to Example 3 is provided with the reference resistance element 46, thus allowing the calculation of the resistance value of the resistance component 45 of the measurement system while performing the measurement considering the presence of the resistance component 45.
Example 4 is an example of the arrangement structure of the pad electrodes connected with the resistance element 31.
As illustrated in
The arrangement structure of the pad electrodes according to Example 4 uses the pad electrodes of the pad electrode group 17A as the two pad electrodes 32_1 and 32_2, but instead thereof, the pad electrodes of the pad electrode group 17B can be used. The pad electrodes are not limited to the pad electrodes at the end of the pad electrode groups 17A and 17B and can use pad electrodes in the middle of the pad electrode groups. In addition, although the number of pad electrodes connected with the resistance element 31 is exemplified as two, the number is not limited to two as long as they are electrically connected between the pad electrodes. The number of pad electrodes is optional.
Example 5, which is a modification of Example 4, is an example of the two pad electrodes connected with the resistance element having a size larger than that of another pad electrode.
In the pad electrode arrangement structure according to Example 5 illustrated in
Making the size of the two pad electrodes 32_1 and 32_2 connected with the resistance element 31 larger than that of the other pad electrode as described above makes it possible to lower the resistance value of the two pad electrodes 32_1 and 32_2 than that of the other pad electrode depending on the reduced size.
Example 6, which is a modification of Example 4, includes the two pad electrodes connected with resistance element 31 having a size smaller than another pad electrode.
In the pad electrode arrangement structure according to Example 6 illustrated in
Making the size of the two pad electrodes 32_1 and 32_2 connected with the resistance element 31 smaller than that of the other pad electrode as described above makes it possible to compact the area occupied by the two pad electrodes 32_1 and 32_2 in the region where the pad electrode group 17A is formed.
Example 7, which is a modification of Example 4, is an example of sandwiching another pad electrode between two pad electrodes connected with a resistance element.
In the pad electrode arrangement structure according to Example 7 illustrated in
Sandwiching another pad electrode of the pad electrode group 17A between the two pad electrodes 32_1 and 32_2 connected with the resistance element 31 as described above makes it possible to separate the two pad electrodes 32_1 and 32_2 to increase the distance between them. This enables the measurement of temperatures over a broader range than if they were arranged adjacently. This example illustrates that the number of pad electrodes sandwiched between the two pad electrodes 32_1 and 32_2 is set to two, but this number is illustrative and is not limited to two.
Example 8, which is a modification of Example 4, is an example in which each of two pad electrodes connected with resistance element includes multiple pad electrodes.
In the pad electrode arrangement structure according to Example 8 illustrated in
In this example, in the pad electrode group 17A, the pad electrodes 32_1 and 32_4, which are adjacent and electrically connected to each other, are used as one of the two pad electrodes (32_1, 32_2) connected with the resistance element 31. In addition, the pad electrodes 32_2 and 32_5, which are adjacent and electrically connected to each other, are used as the other of the two pad electrodes connected with the resistance element 31.
Note that in the present example, the two respective pad electrodes connected with the resistance element 31 include two pad electrodes adjacent and electrically connected to each other in the pad electrode group 17A, however, the present invention is not limited thereto, and the number of pad electrodes is arbitrary.
The two respective pad electrodes 32_1 and 32_2 connected with the resistance element 31 include multiple pad electrodes as described above. This has a similar effect to the increased size of each pad electrode. It is possible to lower the resistance values of the two respective pad electrodes 32_1 and 32_2 than in the case of a pad electrode including one pad electrode. In addition, increasing the number of pad electrodes makes it possible to cancel the influence of the conductor resistance other than the resistance element 31, improving the accuracy of temperature measurement.
Example 9, which is a modification of Example 8, is an example of three or more pad electrodes connected with resistance element.
In the pad electrode arrangement structure according to Example 9 illustrated in
The three or more pad electrodes, for example, three pad electrodes 32_1, 32_2, and 32_6 and the resistance element 31 are electrically connected by wiring. The wiring is set such that the conductor length (L_1, L_2, L_3), conductor material, wire diameter, and electrical resistance are equal (e.g., for the conductor length, L_1 = L_2 = L_3) using, for example, meander wiring or the like. The term “equal” herein means not only a case of exact equality but also a case of substantial equality, and the existence of various variations caused in design or manufacturing is tolerant.
The wirings that electrically connect the three pad electrodes 32_1, 32_2, and 32_6 with the resistance element 31, having the conductor length, conductor material, wire diameter, and electrical resistance being equal, makes it possible to cancel the influence of the conductor resistance, improving the accuracy of temperature measurement.
Example 10 is an application example of two pad electrodes connected with a resistance element. The above description for Examples 1 to 9 is given about the case where the two pad electrodes 32_1 and 32_2 connected with the resistance element 31 employ the pad electrode dedicated to temperature measurement of the semiconductor chip 10 of the CMOS image sensor 1 to improve the sensing accuracy of the temperature sensor 16.
The description for Example 10 is given on an application example in which the two pad electrodes 32_1 and 32_2 are used for other intended uses other than the pad electrode dedicated to temperature measurement.
The application example (first application example) illustrated in
The application example (second application example) illustrated in
Hereinabove, the technology according to the present disclosure is described on the basis of preferred embodiments; however, the technology according to the present disclosure is not limited to the embodiments. The configurations and structures of the image capturing apparatus described in the above first embodiment are examples and may be altered as appropriate.
In one example, the above-mentioned first embodiment uses the two pad electrodes A and B as the two pad electrodes 32_1 and 32_2 for temperature measurement connected with the resistance element 31. The two pad electrodes A and B are located in the lower end portion of the pad electrode group 17A of the pad electrode groups 17A and 17B. The number and location of the pad electrodes for temperature measurement are not limited to a particular number or location. In one example, as illustrated in
The semiconductor chip structure of the CMOS image sensor 1 can be a flat plane structure or a stacked structure. The description is now given for a case where the semiconductor chip structure of the CMOS image sensor 1 has a stacked structure.
As illustrated in
Moreover, in this example, pad electrode groups 17C and 17D are also provided at both ends in the column direction, in addition to the pad electrode groups 17A and 17B being provided at both ends in the row direction of the semiconductor chip 10. The pad electrode group 17A includes a pad electrode group 17A_1 on the upper chip side and a pad electrode group 17A_2 on the lower chip side. The pad electrode group 17B includes a pad electrode group 17B_1 on the upper chip side and a pad electrode group 17B_2 on the lower chip side. Similarly, the pad electrode group 17C includes a pad electrode group 17C_1 on the upper chip side and a pad electrode group 17C_2 on the lower chip side. The pad electrode group 17D includes a pad electrode group 17D_1 on the upper chip side and a pad electrode group 17D_2 on the lower chip side.
In the above-mentioned stacked structure, the resistance element 31 for temperature measurement is provided on the first semiconductor chip 10A, which is the upper chip. The two pad electrodes 32_1 and 32_2 are provided on the second semiconductor chip 10B, which is the lower chip. Specifically, the two pad electrodes A and B at the ends of the pad electrode group 17D_2 on the lower chip side are used as the two pad electrodes 32_1 and 32_2.
The resistance element 31 and the two pad electrodes 32_1 and 32_2 are then electrically connected by a connection portion 10C that electrically connects the first semiconductor chip 10A and the second semiconductor chip 10B.
The semiconductor chip 10 has the stacked structure in which the first semiconductor chip 10A and the second semiconductor chip 10B are stacked as described above. In this semiconductor chip 10, the resistance element 31 provided on the first semiconductor chip 10A allows for measuring the temperature of the first semiconductor chip 10A having the pixel array section 11 formed thereon. This pixel array section 11 has the pixels 20 arranged in a matrix.
A temperature compensation system according to a second embodiment of the present disclosure is a system that compensates for the temperature sensed by the temperature sensor 16 equipped in the semiconductor chip 10 of the semiconductor apparatus according to the first embodiment having the configuration described above, that is, the CMOS image sensor 1.
The temperature compensation system according to the second embodiment of the present disclosure includes a temperature measuring unit 60 in addition to the CMOS image sensor 1 having the above-mentioned configuration in which the temperature sensor 16 is mounted on the semiconductor chip 10.
In the semiconductor chip 10, the temperature measuring unit 60 applies a certain electrical signal (certain voltage or current) between the pad electrodes 32_1 and 32_2 connected with the resistance element 31 to measure the current or voltage proportional to the actual temperature of the semiconductor chip 10, thus measuring the actual temperature of the semiconductor chip 10. In one example, the temperature measuring unit 60 calculates the actual temperature of the semiconductor chip 10 from the value of the current flowing through the resistance element 31 when the certain voltage is applied to the resistance element 31. Alternatively, the temperature measuring unit 60 calculates the actual temperature of the semiconductor chip 10 from the value of voltage across the resistance element 31 when the certain current flows through the resistance element 31.
In the CMOS image sensor 1, the temperature information sensed by the temperature sensor 16 is supplied to the logic circuit unit 14 via the analog-digital converter 50 provided in the column processing unit 13. Examples of the analog-digital converter 50 can include a single-slope analog-to-digital converter that is one example of a reference signal comparison analog-to-digital converter, a sequential comparison analog-to-digital converter, a delta-sigma modulation (Δ∑ modulation) analog-digital converter, or the like.
This example illustrates a case where a single-slope analog-digital converter is used as the analog-to-digital converter 50. The single-slope analog-digital converter 50 includes, for example, a reference signal generation unit 501, a comparator 502, and a counter 503.
The reference signal generation unit 501 is constituted by, for example, a digital-to-analog conversion (DAC) circuit. The reference signal generation unit 501 generates so-called a ramp wave reference signal in which its level (voltage) decreases monotonically with time as a reference signal for analog-to-digital conversion.
The comparator 502 uses an analog pixel signal that is read from the pixel 20 as a comparison input and uses a reference signal that is generated by the reference signal generation unit 501 as a reference input, and compares both signals. Then, the comparator 502 has, for example, an output that becomes in the first state (e.g., high level) when the reference signal is larger than the pixel signal and that becomes in the second state (e.g., low level) when the reference signal is equal to or less than the pixel signal. This configuration allows the comparator 502 to output a pulse signal having a pulse width corresponding to the magnitude of the signal level of the pixel signal as a comparison result.
The counter 503 is supplied with a clock signal from the timing control unit 15 at the same timing as the supply start timing of the reference signal to the comparator 502. The counter 503 then performs its counting operation in synchronization with the clock signal to measure the period of the pulse width of the output pulse of the comparator 502, that is, the period from the start to the end of the comparison operation. The result (count value) counted by the comparator 502 becomes a digital value obtained by digitizing an analog pixel signal.
The temperature information sensed by the temperature sensor 16 is supplied for the logic circuit unit 14 via the single-slope analog-digital converter 50 having the configuration mentioned above. The logic circuit unit 14 includes a signal processing unit 141, a temperature compensation unit 142, and the like.
The signal processing unit 141 executes predetermined signal processing on the pixel signal read from each pixel 20 of the pixel array section 11 through the column processing unit 13 and outputs the resulting signal through a pad electrode 32_13.
The temperature compensation unit 142 compensates for the temperature, which is sensed by the temperature sensor 16 and supplied through the single-slope type analog-digital converter 50, thus correcting fluctuations in the individual device. Upon such temperature compensation, individual temperature measurement for each semiconductor chip 10 and individual temperature compensation of the temperature sensor for each semiconductor chip 10 are necessary not to be affected due to the temperature fluctuations in the wafer surface.
Therefore, in the present temperature compensation system, the temperature measuring unit 60 applies a certain electrical signal (certain voltage or current) between the pad electrodes 32_1 and 32_2 connected with the resistance element 31 to measure the current or voltage proportional to the actual temperature of the semiconductor chip 10, thus measuring the actual temperature of the semiconductor chip 10. The temperature information of the semiconductor chip 10 measured by the temperature measuring unit 60 is supplied for the temperature compensation unit 142 through a pad electrode 32_11.
The temperature compensation unit 142 compensates for the temperature sensed by the temperature sensor 16 on the basis of the temperature of the semiconductor chip 10 measured by the temperature measuring unit 60. The temperature information, which is sensed by the temperature sensor 16 and compensated for by the temperature compensation unit 142, is output to the outside of the semiconductor chip 10 through a pad electrode 32_12.
In this way, the use of the impedance element (the resistance element 31 in this example) individually provided for each semiconductor chip 10 allows the actual temperature of each semiconductor chip 10 to be measured, also reflecting the measurement to the compensation of the temperature sensed by the temperature sensor 16. Thus, it is possible to individually compensate for the temperature measured by the temperature sensor 16 for each semiconductor chip 10 without being affected by the temperature fluctuations in the wafer surface.
The alarm system according to the third embodiment of the present disclosure is a system that issues an alarm upon detecting an abnormal temperature measured by the temperature sensor 16 equipped in the semiconductor chip 10 of the semiconductor apparatus according to the first embodiment having the configuration described above, that is, the CMOS image sensor 1.
The alarm system according to the third embodiment of the present disclosure includes the CMOS image sensor 1 provided with the temperature compensation system according to the second embodiment. The temperature compensation system according to the second embodiment has the configuration in which the temperature measuring unit 60 is equipped outside the semiconductor chip 10, and the temperature compensation unit 142 is equipped inside the semiconductor chip 10. In addition to such a CMOS image sensor, the alarm system includes an alarm unit 70 that detects whether the compensated temperature that is sensed by the temperature sensor 16 exceeds a predetermined reference temperature and, if so, issues an alarm.
The alarm unit 70 issues an alarm providing notification of the occurrence of the abnormality if the temperature sensed by the temperature sensor 16 equipped in the semiconductor chip 10 indicates an abnormal temperature. In one example, the alarm unit 70 issues the alarm in the case of detecting that the temperature information, which is sensed by the temperature sensor 16, compensated for by the temperature compensation unit 142, and output through a pad electrode 32_12, exceeds a predetermined reference temperature (e.g., the upper limit temperature of the system). Examples of a method of issuing an alarm can include a visual way (alarm display using a display), an auditory way (alarm sound), or a way using a combination of both.
As described above, in the CMOS image sensor 1 that includes the temperature sensor 16 equipped in the semiconductor chip 10, an alarm to be issued when the temperature sensed by the temperature sensor 16 is abnormal allows rapid response to abnormal occurrences. An example of such a response is stopping the operation of the system. This configuration makes it possible to protect the circuit elements and the like on the semiconductor chip 10 from thermal destruction or the like due to temperatures. In addition, it is possible to detect an abnormality in the temperature sensor 16 itself. Moreover, the temperature measuring unit 60 outside the semiconductor chip 10 is used for correcting the value sensed by the temperature sensor 16 in the individual adjustment before shipping the semiconductor chip 10.
The technology according to the present disclosure (present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as an image capturing apparatus mounted on any type of mobile body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, a robot, a construction machine, and an agricultural machine (tractor).
The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. In the example illustrated in
The driving system control unit 12010 controls the operation of devices related to the driving system of the vehicle in accordance with various kinds of programs. For example, the driving system control unit 12010 functions as a control device for a driving force generating device for generating the driving force of the vehicle, such as an internal combustion engine, a driving motor, or the like, a driving force transmitting mechanism for transmitting the driving force to wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating the braking force of the vehicle, and the like.
The body system control unit 12020 controls the operation of various kinds of devices provided to a vehicle body in accordance with various kinds of programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various kinds of lamps such as a headlamp, a backup lamp, a brake lamp, a turn signal, a fog lamp, or the like. In this case, radio waves transmitted from a mobile device as an alternative to a key or signals of various kinds of switches can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls a door lock device, the power window device, the lamps, or the like of the vehicle.
The outside-vehicle information detecting unit 12030 detects information about the outside of the vehicle including the vehicle control system 12000. For example, the outside-vehicle information detecting unit 12030 is connected with an imaging unit 12031. The outside-vehicle information detecting unit 12030 makes the imaging unit 12031 image an image of the outside of the vehicle, and receives the imaged image. On the basis of the received image, the outside-vehicle information detecting unit 12030 may perform processing of detecting an object such as a human, a vehicle, an obstacle, a sign, a character on a road surface, or the like, or processing of detecting a distance thereto.
The imaging unit 12031 is an optical sensor that receives light, and which outputs an electrical signal corresponding to a received light amount of the light. The imaging unit 12031 can output the electrical signal as an image, or can output the electrical signal as information about a measured distance. In addition, the light received by the imaging unit 12031 may be visible light, or may be invisible light such as infrared rays or the like.
The in-vehicle information detecting unit 12040 detects information about the inside of the vehicle. The in-vehicle information detecting unit 12040 is, for example, connected with a driver state detecting section 12041 that detects the state of a driver. The driver state detecting section 12041, for example, includes a camera that images the driver. On the basis of detection information input from the driver state detecting section 12041, the in-vehicle information detecting unit 12040 may calculate a degree of fatigue of the driver or a degree of concentration of the driver, or may determine whether the driver is dozing.
The microcomputer 12051 can calculate a control target value for the driving force generating device, the steering mechanism, or the braking device on the basis of the information about the inside or outside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040, and output a control command to the driving system control unit 12010. For example, the microcomputer 12051 may perform cooperative control intended to implement functions of an advanced driver assistance system (ADAS) which functions include collision avoidance or shock mitigation for the vehicle, following driving based on a following distance, vehicle speed maintaining driving, a warning of collision of the vehicle, a warning of deviation of the vehicle from a lane, or the like.
In addition, the microcomputer 12051 can perform cooperative control intended for automated driving, which makes the vehicle to travel autonomously without depending on the operation of the driver, or the like, by controlling the driving force generating device, the steering mechanism, the braking device, or the like on the basis of the information about the outside or inside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040.
In addition, the microcomputer 12051 can output a control command to the body system control unit 12020 on the basis of the information about the outside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030. For example, the microcomputer 12051 can perform cooperative control intended to prevent a glare by controlling the headlamp so as to change from a high beam to a low beam, for example, in accordance with the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detecting unit 12030.
The sound/image output section 12052 transmits an output signal of at least one of a sound or an image to an output device capable of visually or auditorily notifying an occupant of the vehicle or the outside of the vehicle of information. In the example of
In
The imaging units 12101, 12102, 12103, 12104, and 12105 are, for example, disposed at positions on a front nose, sideview mirrors, a rear bumper, and a back door of the vehicle 12100 as well as a position on an upper portion of a windshield within the interior of the vehicle, and the like. The imaging unit 12101 provided to the front nose and the imaging unit 12105 provided to the upper portion of the windshield within the interior of the vehicle obtain mainly an image of the front of the vehicle 12100. The imaging units 12102 and 12103 provided to the sideview mirrors obtain mainly an image of the sides of the vehicle 12100. The imaging unit 12104 provided to the rear bumper or the back door obtains mainly an image of the rear of the vehicle 12100. An image of the front obtained by the imaging units 12101 and 12105 is used mainly to detect a preceding vehicle, a pedestrian, an obstacle, a signal, a traffic sign, a lane, or the like.
Incidentally,
At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera constituted of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.
For example, the microcomputer 12051 can determine a distance to each three-dimensional object within the imaging ranges 12111 to 12114 and a temporal change in the distance (relative speed with respect to the vehicle 12100) on the basis of the distance information obtained from the imaging units 12101 to 12104, and thereby extract, as a preceding vehicle, a nearest three-dimensional object in particular that is present on a traveling path of the vehicle 12100 and which travels in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, equal to or more than 0 km/hour). Furthermore, the microcomputer 12051 can set a following distance to be maintained in front of a preceding vehicle in advance, and perform automatic brake control (including following stop control), automatic acceleration control (including following start control), or the like. It is thus possible to perform cooperative control intended for automated driving that makes the vehicle travel autonomously without depending on the operation of the driver or the like.
For example, the microcomputer 12051 can classify three-dimensional object data on three-dimensional objects into three-dimensional object data of a two-wheeled vehicle, a standard-sized vehicle, a large-sized vehicle, a pedestrian, a utility pole, and other three-dimensional objects on the basis of the distance information obtained from the imaging units 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic avoidance of an obstacle. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can recognize visually and obstacles that are difficult for the driver of the vehicle 12100 to recognize visually. Then, the microcomputer 12051 determines a collision risk indicating a risk of collision with each obstacle. In a situation in which the collision risk is equal to or higher than a set value and there is thus a possibility of collision, the microcomputer 12051 outputs an alarm to the driver via the audio speaker 12061 or the display section 12062, and performs forced deceleration or avoidance steering via the driving system control unit 12010. The microcomputer 12051 can thereby assist in driving to avoid collision.
At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 can, for example, recognize a pedestrian by determining whether or not there is a pedestrian in captured images of the imaging units 12101 to 12104. Such recognition of a pedestrian is, for example, performed by a procedure of extracting characteristic points in the captured images of the imaging units 12101 to 12104 as infrared cameras and a procedure of determining whether or not it is the pedestrian by performing pattern matching processing on a series of characteristic points representing the contour of the object. When the microcomputer 12051 determines that there is a pedestrian in the captured images of the imaging units 12101 to 12104, and thus recognizes the pedestrian, the sound/image output section 12052 controls the display section 12062 so that a square contour line for emphasis is displayed so as to be superimposed on the recognized pedestrian. Furthermore, the sound/image output section 12052 may also control the display section 12062 so that an icon or the like representing the pedestrian is displayed at a desired position.
Hereinabove, an example of a vehicle control system to which the technology according to the present disclosure can be applied is described. In the technology according to the present disclosure, for example, the CMOS image sensor according to the first embodiment in which the temperature sensor 16 is mounted on the semiconductor chip 10 can be used as the imaging unit 12031 among the configurations described above.
A CMOS image sensor mounted on a vehicle includes, as safety performance, a temperature sensor 16 inside a device in order to stop a function when a system reaches an upper limit temperature. In particular, in a high temperature range, the temperature sensor 16 is required to have high measurement accuracy of ± 1 degree. Therefore, by providing the temperature compensation system according to the second embodiment, high measurement accuracy of the temperature sensor 16 can be maintained. Furthermore, by providing the alarm according to the third embodiment, it is possible to issue an alarm for maintaining safety performance when an abnormality such as the system reaching the upper limit temperature occurs.
Note that the present disclosure may have the following configurations.
[A-1] A semiconductor apparatus including:
[A The semiconductor apparatus according to [A-1], in which
the impedance element is a temperature-dependent element.
[A The semiconductor apparatus according to [A-2], in which
the impedance element is a resistance element.
[A The semiconductor apparatus according to any one of [A-1] to [A-3], in which
the semiconductor chip is equipped with a temperature sensor that measures a temperature inside a device.
[A The semiconductor apparatus according to any one of [A-1] to [A-4], in which
the size of the at least two pad electrodes connected with the impedance element is larger than the size of another pad electrode.
[A The semiconductor apparatus according to any one of [A-1] to [A-4], in which
the size of the at least two pad electrodes connected with the impedance element is smaller than the size of another pad electrode.
[A The semiconductor apparatus according to any one of [A-1] to [A-4], in which
the at least two pad electrodes connected with the impedance element are provided such that another pad electrode is sandwiched between the at least two pad electrodes.
[A The semiconductor apparatus according to any one of [A-1] to [A-4], in which
the at least two pad electrodes connected with the impedance element each include multiple pad electrodes that are electrically connected to each other.
[A The semiconductor apparatus according to any one of [A-1] to [A-4], in which
[A The semiconductor apparatus according to any one of [A-1] to [A-9], in which
[B-1] A temperature compensation system including:
[B The temperature compensation system according to [B-1], in which
the impedance element is a temperature-dependent element.
[B The temperature compensation system according to [B-2], in which
the impedance element is a resistance element.
[B The temperature compensation system according to [B-3], in which
the temperature measuring unit applies a certain voltage to the resistance element and calculates the temperature of the semiconductor chip from a value of current flowing through the resistance element.
[B The temperature compensation system according to [B-3], in which
the temperature measuring unit causes a certain current to flow through the resistance element and calculates the temperature of the semiconductor chip from a value of voltage across the resistance element.
[C-1] An alarm system including:
[C The alarm system according to [C-1], in which
the impedance element is a temperature-dependent element.
[C The alarm system according to [C-2], in which the impedance element is a resistance element.
[C The alarm system according to [C-3], in which the impedance element is a resistance element.
[C The alarm system according to [C-4], in which
the temperature measuring unit applies a certain voltage to the resistance element and calculates the temperature of the semiconductor chip from a value of current flowing through the resistance element.
[C The alarm system according to [C-4], in which
the temperature measuring unit causes a certain current to flow through the resistance element and calculates the temperature of the semiconductor chip from a value of voltage across the resistance element.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2020-085503 | May 2020 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2021/015579 | 4/15/2021 | WO |
