An embodiment of the present invention will be described with reference to the drawings.
In a substrate 11 made of silicon, a first region 11A and a second region 11B which are isolated from each other by an isolation region 12 are formed. An n-channel MOS transistor 31 is formed in the first region 11A.
The n-channel MOS transistor 31 has a first gate insulating film 32 made of hafnium dioxide (HfO2) formed on the substrate 11 and a first gate electrode 33 comprising sidewalls 34. In the portions of the first region 11A which are located on both sides of the first gate electrode 33, n-type source/drain regions 35 are formed individually. The first gate electrode 33 in the semiconductor device according to the present embodiment is a metal gate electrode comprised of a metal film 14a made of TaN and a silicide film 26a made of platinum silicide which are successively stacked in layers in an ascending order, in which the metal film 14a is formed in contact with the first gate insulating film 32. In the present embodiment, the metal gate electrode is defined as a gate electrode formed such that a film made of a metal or a metal compound having a metallic conductivity is deposited in contact with a gate insulating film. It is assumed that the metal film in the metal gate electrode includes not only a film made of a metal but also a film made of a metal compound having a metallic conductivity.
A p-channel MOS transistor 41 has a second gate insulating film 42 made of HfO2 formed on the substrate 11 and a second gate electrode 43 comprising sidewalls 44. In the portions of the second region 11B which are located on both sides of the second gate electrode 43, p-type source/drain regions 45 are formed individually. The second gate electrode 43 is a fully-silicided gate electrode in which a silicide film 26b is formed on the second gate insulating film 42. The fully-silicided gate is a gate electrode formed by depositing a polysilicon film on a gate insulating film and then completely siliciding the deposited polysilicon film to the interface with the gate insulating film.
The n-channel MOS transistor 31 and the p-channel MOS transistor 41 are covered with interlayer insulating films 24 and 27 formed in succession. In the interlayer insulating films 24 and 27, contact plugs 28 electrically connected individually to the first gate electrode 33, the n-type source/drain regions 35, the second gate electrode 43, and the p-type source/drain regions 45 are formed.
In the semiconductor device according to the present embodiment, the n-channel MOS transistor 31 has the first gate electrode 33 which is the metal gate electrode made of TaN and the p-channel MOS transistor 41 has the second gate electrode 43 which is the fully-silicided gate electrode. Thus, the gate electrodes having different work functions are formed individually in the n-channel MOS transistor 31 and the p-channel MOS transistor 41. As a result, in either of the n-channel MOS transistor 31 and the p-channel MOS transistor 41, a leakage current and a threshold voltage can be reduced.
In the semiconductor device according to the present embodiment, the fully-silicided gate electrode is formed in the p-channel MOS transistor 41. As a result, the peeling off of the gate electrode from the gate insulating film can be suppressed more reliably than in the case where a metal gate electrode using platinum (Pt) or the like is formed. In addition, the gate electrode can be formed more easily than in the case where the metal gate electrode is formed by etching Pt or the like.
Unlike in the case where the fully-silicided gate electrode is formed in each of the n-channel MOS transistor 31 and the p-channel MOS transistor 41, full silicidation can be performed under conditions which are optimal for the p-channel MOS transistor 41.
Instead of the HfO2 film, a high dielectric constant film such as a hafnium silicate (HfSiO) film or a hafnium silicon oxynitride (HfSiON) film can be used as each of the first and second gate insulating films 32 and 42. Instead, a high dielectric constant film made of a material containing at least one of silicon (Si), hafnium (Hf), zirconium (Zr), titanium (Ti), tantalum (Ta), aluminum (Al), and rare earth metals such as scandium (Sc), yttrium (Y), lantern (La), and other lanthanoids may also be used. The first and second gate insulating films 32 and 43 may also be formed of different materials. Instead of the high dielectric constant film, a SiO2 film may also be used. In this case also, the merit of allowing the prevention of the depletion of the first gate electrode 33 and allowing the obtention of a transistor with a large driving current is offered.
The metal film 14a of the first gate electrode 33 may also be made of, instead of TaN, a material selected from the group consisting of tantalum (Ta), tantalum silicon (TaSi), tantalum silicon nitride (TaSiN), tantalum aluminum (TaAl), tantalum aluminum nitride (TaAlN), tantalum aluminum silicon (TaAlSi), tantalum aluminum silicon nitride (TaAlSiN), tantalum carbide (TaC), tantalum carbide nitride (TaCN), and the like. The metal film 14a may also be a multilayer film made of at least two materials selected from the group listed above. In this case, the work function is preferably adjusted to be not less than 4.2 eV and not more than 4.5 eV. In the case where the metal film 14a is made of a nitride, the composition of nitrogen is preferably not more than 50%.
The second gate electrode 43 may be made of, instead of platinum silicide, any of nickel silicide, cobalt silicide, and the like.
Although the semiconductor device according to the present embodiment has formed the first gate electrode 33 by using a multilayer film of the metal film 14a and the silicide film 26a to provide easy connection between the contact plug 28 and the first gate electrode 33 and reduce the resistance value of the first gate electrode 33, it is also possible to form the first gate electrode 33 by using only the metal film 14a without providing the silicide film 26a.
Referring to the drawings, a method for fabricating the semiconductor device according to the present embodiment will be described herein below.
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The formation of the HfO2 film may be performed appropriately by depositing a metal film made of Hf or the like by using a DC sputtering method or the like and then oxidizing the metal film. The method for depositing the metal film may also be a physical vapor deposition (PVD) method, a vacuum vapor deposition method, an electron beam deposition method, a laser deposition method, a chemical vapor deposition (CVD) method, a metal organic vapor deposition method, an atomic layer deposition method, or the like. Instead of the metal oxide film, there may also be formed a metal silicate film such as HfSiO4 film, a metal nitride-silicate film such as a HfSiON film, or the like. After the removal of the native oxide film, it is also possible to form an oxide film, a nitride film, or the like on the upper surface of the substrate 11 as necessary.
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Likewise, when the metal film 14 is made of TaSi, TaAl, TaAlSi, TaC, or the like, the film may be formed appropriately by sputtering the corresponding metal target in an argon atmosphere or in a gas mixture of argon and nitrogen.
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The thickness of the second insulating film 16 may be the same as that of the first insulating film 13. However, as will be described later, the thickness of the first insulating film 13 is preferably adjusted to be larger than that of the second insulating film 16.
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The present embodiment has removed the first insulating film 13 and the metal film 14 from the second region 11B in order to prevent the degradation of the quality of the gate insulating film of the p-channel MOS transistor 41. However, it is also possible to leave the first insulating film 13 as it is in the second region 11B and use it as a replacement for the second insulating film 16. In this case, the merit of allowing the omission of the step of forming the second insulating film 16 and thereby allowing the simplification of the steps is offered.
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Thereafter, an n-type impurity is implanted into the first region 11A and a p-type impurity is implanted into the second region 11B, each by using an ion implantation technology, so that extension regions (not shown) are formed individually.
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Subsequently, a metal film 23 made of nickel is deposited over the entire surface of the substrate 11 and then subjected to a thermal process at a temperature of 500° C. so that the n-type source/drain regions 35 and the p-type source/drain regions 45 are silicided.
Since the polysilicon film 18a of the first gate electrode 33 and the polysilicon film 18b of the second gate electrode 43 are protected by the third insulating films 19a and 19b, respectively, they are not silicided. For the metal film 23, platinum, cobalt, or the like may also be used.
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When a high dielectric constant material is used for a gate insulating film, a SiO2 film is relatively easily formed at the interface between silicon and the high dielectric constant film so that the gate insulating film has a multilayer structure of the thin SiO2 film and the high dielectric constant film. The upper-layer dielectric film has a small band gap and a large thickness, while the lower-layer SiO2 film has a large band gap and a small thickness. In the gate insulating film having such an asymmetrical band structure, the magnitude of a leakage current differs depending on the direction of carrier injection. Therefore, it follows that, in an n-channel MOS transistor and a p-channel MOS transistor, the leakage currents have different characteristics.
In the n-channel MOS transistor, electrons supplied from the source/drain regions are introduced from the channel side so that the leakage current is primarily determined by the thickness of the SiO2 film in contact with the channel. Since the SiO2 film is normally thinner than the high dielectric constant film, the leakage current is large and larger than in the p-channel MOS transistor. Accordingly, to suppress the leakage current in the n-channel MOS transistor, it is required to form the gate insulating film made of a high dielectric constant material such that it is thicker than in the p-channel MOS transistor.
In the present embodiment, the first gate insulating film 32 of the n-channel MOS transistor 31 and the second gate insulating film 42 of the p-channel MOS transistor 41 are formed by different process steps. This allows easy formation the first gate insulating film 32 which is thicker than the second gate insulating film 42 and therefore allows the respective leakage currents of the n-channel MOS transistor 31 and the p-channel MOS transistor 41 to have equal characteristics.
Thus, the semiconductor device according to the present invention and the fabrication method therefor can implement a semiconductor device in which an n-channel MOS transistor and a p-channel MOS transistor, each of which has a low leakage current and a low threshold voltage, are formed in a single substrate and are therefore useful as a semiconductor device comprising an n-channel MOS transistor and a p-channel MOS transistor, a fabrication method therefor, and the like.
Number | Date | Country | Kind |
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2006-116591 | Apr 2006 | JP | national |