Claims
- 1. A semiconductor device comprising:an active matrix circuit having at least one first thin film transistor formed over a substrate; and a driving circuit having at least one second thin film transistor formed over the substrate for driving said active matrix circuit, each of said first and second thin film transistors comprising: a gate electrode; a gate insulating film adjacent to the gate electrode; and a semiconductor film adjacent to said gate insulating film wherein said semiconductor film includes a channel forming region, a pair of first regions containing an impurity for giving one conductivity type thereto with said channel forming region therebetween, and a pair of second regions in which a concentration of said impurity is smaller than that in said first regions wherein said second regions are interposed between said channel forming region and said pair of first regions, wherein the pair of second regions of said second thin film transistor are overlapped with the gate electrode of said second thin film transistor; wherein a distance between edges of the channel forming region and edges of the pair of first regions of said first thin film transistor is greater than that of said second thin film transistor.
- 2. A semiconductor device according to claim 1 wherein said semiconductor film comprises crystalline silicon.
- 3. A semiconductor device according to claim 1 wherein said impurity is selected from the group consisting of phosphorus and boron.
- 4. A semiconductor device according to claim 1 wherein said gate electrode is located over said semiconductor film.
- 5. A semiconductor device according to claim 1 wherein said gate electrode comprises a multi-layered structure including first and second layers, each of which comprises a material selected from the group consisting of aluminum, tantalum, titanium and silicon.
- 6. A semiconductor device comprising:an active matrix circuit having at least one first thin film transistor formed over a substrate; and a driving circuit having at least one second thin film transistor formed over the substrate for driving said active matrix circuit, each of said first and second thin film transistor comprising: gate electrode; a gate insulating film adjacent to the gate electrode; and a semiconductor film adjacent to said gate insulating film wherein said semiconductor film includes a channel forming region, a pair of first regions containing an impurity for giving one conductivity type thereto with said channel forming region therebetween, and a pair of second regions in which a concentration of said impurity is smaller than that in said first regions wherein said second regions are interposed between said channel forming region and said pair of first regions, wherein the pair of second regions of said second thin film transistor are overlapped with the gate electrode of said second thin film transistor and a distance between the channel forming region and the pair of first regions in said first thin film transistor is within a range of 0.4 to 2 μm; wherein a distance between edges of the channel forming region and edges of the pairs of first regions of said first thin film transistor is greater than that of said second thin film transistor.
- 7. A semiconductor device according to claim 6 wherein said semiconductor film comprises crystalline silicon.
- 8. A semiconductor device according to claim 6 wherein said impurity is selected from the group consisting of phosphorous and boron.
- 9. A semiconductor device according to claim 6 wherein said gate electrode is located over said semiconductor film.
- 10. A semiconductor device according to claim 6 wherein said gate electrode comprises a multi-layered structure including first and second layers, each of which comprises a material selected from the group consisting of aluminum, tantalum, titanium and silicon.
- 11. A semiconductor device comprising:an active matrix circuit having at least one first thin film transistor formed over a substrate; and a driving circuit having at least one second thin film transistor formed over the substrate for driving said active matrix circuit, each of said first and second thin film transistors comprising: a gate electrode; a gate insulating film adjacent to the gate electrode; and a semiconductor film adjacent to said gate insulating film wherein said semiconductor film includes a channel forming region, a pair of first regions containing an impurity for giving one conductivity type thereto with said channel forming region therebetween, and a pair of second regions in which a concentration of said impurity is smaller than that in said first regions wherein said second regions are interposed between said channel forming region and said pair of first regions, an insulating film comprising silicon oxide over the gate electrode; wherein the pair of second regions of said second thin film transistor are overlapped with the gate electrode of said second thin film transistor and a distance between edges of the channel forming region and edges of the pair of first regions in said first thin film transistor is greater than that of said second thin film transistor.
- 12. A semiconductor device according to claim 11 wherein said semiconductor film comprises crystalline silicon.
- 13. A semiconductor device according to claim 11 wherein said impurity is selected from the group consisting of phosphorus and boron.
- 14. A semiconductor device according to claim 11 wherein said gate electrode is located over said semiconductor film.
- 15. A semiconductor device according to claim 11 wherein said gate electrode comprises a multi-layered structure including first and second layers, each of which comprises a material selected from the group consisting of aluminum, tantalum, titanium and silicon.
- 16. A semiconductor device comprising:an active matrix circuit having at least one first thin film transistor formed over a substrate; and a driving circuit having an inverter circuit comprising at least a second and third thin film transistors formed over the substrate for driving said active matrix circuit, at least one of said second and third thin film transistors comprising: a gate electrode; a gate insulating film adjacent to the gate electrode; and a semiconductor film adjacent to said gate insulating film wherein said semiconductor film includes a channel forming region, a pair of first regions containing an impurity for giving one conductivity type thereto with said channel forming region therebetween, and a pair of second regions in which a concentration of said impurity is smaller than that in said first regions wherein said second regions are interposed between said channel forming region and said pair of first regions, wherein the pair of second regions are overlapped with the gate electrode of said second thin film transistor; wherein a distance between edges of the channel forming region and edges of the pair of first regions of said first thin film transistor is greater than that of said second thin film transistor.
- 17. A semiconductor device according to claim 16 wherein a width of the pair of second regions between the channel forming region and the pair of first regions in said first thin film transistor is within a range from 0.4 to 2 μm.
- 18. A semiconductor device according to claim 16 wherein a width of the pair of second regions between the channel forming region and the pair of first regions in said first thin film transistor is different from that of said second and third thin film transistors.
- 19. A semiconductor device comprising:an active matrix circuit having at least one first thin film transistor formed over a substrate; and a driving circuit having an inverter circuit comprising at least a second and third thin film transistors formed over the substrate for driving said active matrix circuit, at least one of said second and third thin film transistors comprising: a gate electrode; a gate insulating film adjacent to the gate electrode; and a semiconductor film adjacent to said gate insulating film wherein said semiconductor film includes a channel forming region, a pair of first regions containing an impurity for giving one conductivity type thereto with said channel forming region therebetween, and a pair of second regions in which a concentration of said impurity is smaller than that in said first regions wherein said second regions are interposed between said channel forming region and said pair of first regions, wherein the pair of second regions are overlapped with the gate electrode of said second thin film transistor and a distance between edges of the channel forming region and edges of the pair of first regions in said first thin film transistor is within a range of 0.4 to 2 μm; wherein a distance between edges of the channel forming region and edges of the pair of first regions of said first thin film transistor is greater than that of said second thin film transistor.
- 20. A semiconductor device according to claim 19 wherein said semiconductor film comprises crystalline silicon.
- 21. A semiconductor device according to claim 19 wherein said impurity is selected from the group consisting of phosphorous and boron.
- 22. A semiconductor device according to claim 19 wherein said gate electrode is located over said semiconductor film.
- 23. A semiconductor device according to claim 19 wherein said gate electrode comprises a multi-layered structure including first and second layers, each of which comprises a material selected from the group consisting of aluminum, tantalum, titanium and silicon.
- 24. A semiconductor device according to claim 19 wherein said impurity is contained in said pair of first regions in a concentration within a range from 1×1020 to 2×1021 atoms/cm3.
- 25. A semiconductor device according to claim 19 wherein said impurity is contained in said pair of second regions in a concentration within a range from 1×1017 to 2×1018 atoms/cm3.
- 26. A semiconductor device according to claim 1 wherein the concentration of said impurity in said first regions is within a range from 1×1020 to 2×1021 atoms/cm3 while the concentration of said impurity in said pair of second regions is within a range from 1×1017 to 2×1018 atoms/cm3.
- 27. A semiconductor device according to claim 6 wherein the concentration of said impurity in said first regions is with a range from 1×1020 to 2×1021 atoms/cm3 while the concentration of said impurity in said pair of second regions is within a range from 1×1017 to 2×1018 atoms/cm3.
- 28. A semiconductor device according to claim 11 wherein the concentration of said impurity in said first regions is within a range from 1×1020 to 2×1021 atoms/cm3 while the concentration of said impurity in said pair of second regions is within a range from 1×1017 to 2×1018 atoms/cm3.
- 29. A semiconductor device comprising:at least one first thin film transistor formed over a substrate; a pixel electrode electrically connected to said first thin film transistor; a driving circuit having at least one second thin film transistor formed over the substrate for driving first thin film transistor, each of said first and second thin film transistors comprising: a gate electrode; a gate insulating film adjacent to the gate electrode; and a crystalline semiconductor film adjacent to said gate insulating film wherein said crystalline semiconductor film includes a channel forming region, a pair of first regions containing an impurity for giving one conductivity type thereto with said channel forming region therebetween, and a pair of second regions in which a concentration of said impurity is smaller than that in said first regions wherein said second regions are interposed between said channel forming region and said pair of first regions, wherein the pair of second regions of said second thin film transistors are overlapped with the gate electrode of said second thin film transistor; wherein a distance between edges of the channel forming region and edges of the pair of first regions of said first thin film transistor is greater than that of said second thin film transistor.
- 30. The semiconductor device according to claim 29 wherein said gate electrode is located over said crystalline semiconductor film in said first and second thin film transistors.
- 31. The semiconductor device according to claim 29 wherein said second impurity regions contain one of carbon, nitrogen and oxygen at a higher concentration than said first impurity region.
- 32. The semiconductor device according to claim 29 wherein said impurity is phosphorus.
- 33. A semiconductor device comprising:an active matrix circuit having at least one first thin film transistor formed over a substrate; and a driving circuit having at least one second thin film transistor formed over the substrate for driving said active matrix circuit, each of said first and second thin film transistors comprising: a gate electrode; a gate insulating film adjacent to the gate electrode; and a semiconductor film adjacent to said gate insulating film wherein said semiconductor film includes a channel forming region, a pair of first regions containing an impurity for giving one conductivity type thereto with said channel forming region therebetween, and a pair of second regions in which a concentration of said impurity is smaller than that in said first regions wherein said second regions are interposed between said channel forming region and said pair of first regions, an insulating film comprising silicon nitride over the gate electrode; wherein the pair of second regions of said second thin film transistor are overlapped with the gate electrode of said second thin film transistor; wherein a distance between edges of the channel forming region and edges of the pair of first regions of said first thin film transistor is greater than that of said second thin film transistor.
Priority Claims (1)
Number |
Date |
Country |
Kind |
5-269778 |
Oct 1993 |
JP |
|
Parent Case Info
This application is a divisional application of U.S. Ser. No. 08/908,204 filed Aug. 7, 1997, now U.S. Pat. No. 5,962,372 which is a continuation U.S. Ser. No. 08/462,771 filed Jun. 5, 1995, now abandoned which is a divisional of Ser. No. 08/312,795 filed Sep. 27, 1994, now U.S. Pat. No. 5,508,209.
US Referenced Citations (78)
Foreign Referenced Citations (37)
Number |
Date |
Country |
0 197 738 |
Mar 1986 |
EP |
0 197 738 A2 |
Mar 1986 |
EP |
0487220 |
May 1992 |
EP |
000488801 |
Jun 1992 |
EP |
0502749 |
Sep 1992 |
EP |
0502749 |
Sep 1992 |
EP |
0 544 229 |
Jun 1993 |
EP |
56040269 |
Apr 1981 |
JP |
58-105574 |
Jun 1983 |
JP |
58105574 |
Jun 1983 |
JP |
58-118154 |
Jul 1983 |
JP |
59220971 |
Dec 1984 |
JP |
63-66969 |
Mar 1988 |
JP |
64-7567 |
Jan 1989 |
JP |
02-084770 |
Mar 1990 |
JP |
2-159730 |
Jun 1990 |
JP |
2162735 |
Jun 1990 |
JP |
2-162738 |
Jun 1990 |
JP |
2162738 |
Jun 1990 |
JP |
5-159730 |
Jun 1990 |
JP |
02-228041 |
Sep 1990 |
JP |
2-246277 |
Oct 1990 |
JP |
02280371 |
Nov 1990 |
JP |
03-165575 |
Jul 1991 |
JP |
3-227068 |
Oct 1991 |
JP |
403227068 |
Nov 1991 |
JP |
03-293641 |
Dec 1991 |
JP |
92-18837 |
Jan 1992 |
JP |
04-260336 |
Sep 1992 |
JP |
5-21801 |
Jan 1993 |
JP |
5-55581 |
Mar 1993 |
JP |
05-142577 |
Jun 1993 |
JP |
5-160153 |
Jun 1993 |
JP |
05-173179 |
Jul 1993 |
JP |
5-226364 |
Sep 1993 |
JP |
06-088972 |
Mar 1994 |
JP |
07-045837 |
Feb 1995 |
JP |
Non-Patent Literature Citations (3)
Entry |
English Translation of Japanese Patent Laid-Open 5-226364, published Sep. 3, 1993, Takami Makino. |
Partial European Search Report. |
Electrochemical Society Spring Meeting, (Extended Abstracts), Toronto, Ont., Canada, May 11-16, 1975, 1975, Princeton, NJ USA, Electrochemical Soc, USA, pp. 179-181, XP002020881, Tsunemitsu M: Selective Anode-Oxidation Of Bi-Metallic Layer. |
Continuations (1)
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Number |
Date |
Country |
Parent |
08/462771 |
Jun 1995 |
US |
Child |
08/908204 |
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US |