The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device.
PTL 1 discloses a method for manufacturing a power semiconductor device. In the manufacturing method, an insulating layer and a metal circuit layer are made to adhere on a metal substrate, a heat dissipation plate is arranged on an upper surface of the metal circuit layer with a solder sheet interposed therebetween, and a silicon semiconductor chip is arranged on an upper surface of the heat dissipation plate with a solder sheet interposed therebetween. A one-side terminal section of a lead frame is arranged on an upper surface of the silicon semiconductor chip with a solder sheet interposed therebetween. The whole of the components is heated to melt all the solder sheets. As a result, the metal circuit layer and the heat dissipation plate, the heat dissipation plate and the silicon semiconductor chip, and the silicon semiconductor chip and the one-side terminal section of the lead frame are respectively collectively bonded to each other.
[PTL 1] JP 2007-157863 A
In a solder bonding process as described in PTL 1, solder may be heated from the substrate side and melted. In this case, it may take time to melt the solder.
The present disclosure is directed to obtaining a semiconductor device capable of melting solder in a short time period and a method for manufacturing the semiconductor device.
A semiconductor device according to the first disclosure includes a substrate, a semiconductor chip provided on the substrate, a nut, a lead frame provided on the semiconductor chip and the nut and screwed to the nut, a nut box accommodating the nut and having an opening which exposes the nut downward formed in a bottom portion and solder provided at least between the semiconductor chip and the substrate or the lead frame.
A method for manufacturing a semiconductor device according to the second disclosure includes a substrate, a semiconductor chip provided on the substrate, a nut, a lead frame provided on the semiconductor chip and the nut, a nut box accommodating the nut and having an opening which exposes the nut downward formed in a bottom portion, and solder provided at least between the semiconductor chip and the substrate or the lead frame, the method comprising, loading the semiconductor device on a lower jig having a projection on an upper surface and bringing the projection into contact with the nut through the opening, and heating the lower jig with the projection brought into contact with the nut and bonding the semiconductor chip and the substrate or the lead frame to each other with the solder.
A method for manufacturing a semiconductor device according to the third disclosure includes a substrate, a semiconductor chip provided on the substrate, a lead frame provided on the semiconductor chip, solder provided at least between the semiconductor chip and the substrate or the lead frame, and a case surrounding the semiconductor chip, the method comprising, loading the semiconductor device on a lower jig having a projection formed of a metal on an upper surface and bringing the projection into contact with the lead frame, and heating the lower jig with the projection brought into contact with the lead frame and bonding the semiconductor chip and the substrate or the lead frame to each other with the solder.
In a semiconductor device and a method for manufacturing the semiconductor device according to the present disclosure, heat can be transferred to solder via a lead frame. Therefore, the solder can be melted in a short time period.
A semiconductor device and a method for manufacturing the semiconductor device according to each embodiment of the present disclosure are described with reference to drawings. Identical or corresponding constitutional elements are given the same reference numerals, and the repeated description of such constitutional elements may be omitted.
The insulated circuit board 4 includes an insulating substrate 6 and circuit patterns 7 respectively provided on an upper surface and a rear surface of the insulating substrate 6. The circuit pattern 7 provided on the rear surface of the insulating substrate 6 is fixed to the base plate 2 with the solder 3 interposed therebetween. The circuit pattern 7 provided on the upper surface of the insulating substrate 6 constitutes an electrical circuit. Accordingly, the circuit pattern 7 provided on the upper surface of the insulating substrate 6 has a lower coverage with the insulating substrate 6 than the circuit pattern 7 provided on the rear surface thereof. The insulating substrate 6 is formed of Al2O3, AlN, or Si3N4, for example. The circuit pattern 7 is formed of Al or Cu, for example.
A plurality of semiconductor chips 10 are provided on the insulated circuit board 4. Respective rear surfaces of the plurality of semiconductor chips 10 are fixed to the circuit pattern 7 provided on the upper surface of the insulating substrate 6 with solder 9 interposed therebetween. The solder 9 is formed of a paste solder or a plate solder, for example. The semiconductor chip 10 is made with Si, for example. The semiconductor chip 10 may be made with a wide bandgap semiconductor. An example of the wide bandgap semiconductor is silicon carbide, a gallium nitride-based material, or diamond.
The lead frame 8 is provided on the plurality of semiconductor chips 10 and a nut 12, described below. The lead frame 8 is bonded to respective upper surfaces of the semiconductor chips 10 with solder 11 interposed therebetween. The solder 11 is formed of a paste solder or a plate solder, for example. The lead frame 8 is formed of Cu or Al, for example. The lead frame 8 is fixed to the case 5. The case 5 surrounds the insulated circuit board 4 and the plurality of semiconductor chips 10. The case 5 is formed of PPS (poly phenylene sulfide), for example.
A screw hole 12a is formed in the nut 12. The screw hole 12a overlaps a through hole 8a formed in the lead frame 8 in a planar view. The nut 12 and the lead frame 8 are screwed to each other with a screw 20 via the through hole 8a and the screw hole 12a. The nut 12 is formed of aluminum, stainless, or titanium, for example.
A nut box 13 accommodates the nut 12. The nut box 13 opens on the side provided with the lead frame 8. The nut 12 is in contact with the lead frame 8 with the nut 12 accommodated in the nut box 13. The nut box 13 has an opening 13a which exposes the nut 12 downward formed in its bottom portion.
The nut box 13 is provided outside a region of the case 5 which accommodates the semiconductor chips 10. The nut box 13 is fixed to the case 5. The nut box 13 may be a part of the case 5. The nut box 13 is formed of PPS, for example.
A lower jig 50 is used in a process for manufacturing the semiconductor device 100. The lower jig 50 has a projection 51 on its upper surface. The lower jig 50 is installed to contact the base plate 2. The projection 51 is installed to contact the nut 12 through the opening 13a. The lower jig 50 and the projection 51 are each formed of a metal such as stainless steel.
Then, in step S2, the semiconductor device 100 is arranged on a lower jig 50. At this time, a projection 51 contacts the nut 12 through an opening 13a of the nut box 13. Then, in step S3, the lower jig 50 is heated with the projection 51 brought into contact with the nut 12. Accordingly, the solders 3, 9, and 11 are heated via the base plate 2. Further, the solders 3, 9, and 11 are heated via the nut 12 and the lead frame 8. As a result, the solders 3, 9, and 11 are melted. Therefore, the base plate 2 and the insulated circuit board 4, the semiconductor chip 10 and the insulated circuit board 4, and the semiconductor chip 10 and the lead frame 8 are respectively bonded to each other with the solders 3, 9, and 11.
On the other hand, in the present embodiment, the projection 51 of the lower jig 50 and the nut 12 are brought into contact with each other, whereby heat can be transferred to the solders 3, 9, and 11 via the lead frame 8. Therefore, the solders 3, 9, and 11 can be melted in a short time period. This makes it possible to improve takt for a solder bonding process.
When heat is efficiently transferred to the solders 3, 9, and 11 from the base plate 2 and the lead frame 8, the solders 3, 9, 11 can be reliably melted. Therefore, the reliability of the semiconductor device 100 can be improved.
As a modification to the present embodiment, the projection 51 may have a thermal conductivity higher than that of a portion, other than the projection 51, of the lower jig 50. The projection 51 is formed of Cu, for example. This makes it possible to efficiently transfer heat to the lead frame 8 and makes it easy to transfer heat to the solders 3, 9, and 11.
In step S3, the lower jig 50 may be heated with the lead frame 8 pressed toward the projection 51, as indicated by an arrow 80 in
A configuration of the semiconductor device 100 is not limited to that illustrated in
These modifications can be applied, as appropriate, to semiconductor devices and methods for manufacturing the semiconductor devices according to the following embodiments. Note that the semiconductor devices and the methods for manufacturing the semiconductor devices according to the following embodiments are similar to those of the first embodiment in many respects, and thus differences between the semiconductor devices and the methods for manufacturing the semiconductor devices according to the following embodiments and those of the first embodiment will be mainly described below.
In the present embodiment, heat can be transferred to the solder 216 from a lower jig 50 via the nut 12 and the external connection terminal section 208b. Therefore, even when the lead frame 208 includes a solder bonding section, the solder 216 can also be melted in a short time period.
Then, a method for manufacturing a semiconductor device 500 will be described. An insulated circuit board 4 is arranged on a base plate 2 with solder 3 interposed therebetween, and a semiconductor chip 10 is arranged on the insulated circuit board 4 with solder 9 interposed therebetween. A lead frame 8 is arranged on the semiconductor chip 10 with solder 11 interposed therebetween. A case 5 is arranged on the base plate 2.
Then, the semiconductor device 500 is loaded on a lower jig 50, to bring a projection 51 into contact with the lead frame 8. Then, the lower jig 50 is heated with the projection 51 brought into contact with the lead frame 8. The projection 51 of the lower jig 50 is formed of a metal. As a result, solders 3, 9, and 11 are heated via the base plate 2. Further, the solders 3, 9, and 11 are heated via the lead frame 8. As a result, the solders 3, 9, and 11 are melted. Therefore, the base plate 2 and the insulated circuit board 4, the semiconductor chip 10 and the insulated circuit board 4, and the semiconductor chip 10 and the lead frame 8 are respectively bonded to each other by the solders 3, 9, and 11.
In the present embodiment, the projection 51 of the lower jig 50 and the lead frame 8 are brought into contact with each other, whereby heat can be transferred to the solders 3, 9, and 11 via the lead frame 8. Therefore, the solders 3, 9, and 11 can be melted in a short time period. This makes it possible to improve takt for a solder bonding process.
Note that the technical features described in the above embodiments may be combined as appropriate.
2 base plate, 4 insulated circuit board, 5 case, 6 insulating substrate, 7 circuit pattern, 8 lead frame, 8a through hole, 10 semiconductor chip, 12 nut, 12a screw hole, 13 nut box, 13a opening, 20 screw, 50 lower jig, 51 projection, 100, 200 semiconductor device, 208 lead frame 208a main body section, 208b external connection terminal section, 300 semiconductor device, 350 lower jig, 351 projection, 400 semiconductor device, 417 fin, 500, 800 semiconductor device, 813 nut box 850 lower jig
Filing Document | Filing Date | Country | Kind |
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PCT/JP2020/047262 | 12/17/2020 | WO |