SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Abstract

A semiconductor device includes a cylindrical capacitor. A size of hemispherical silicon grains (HSGs) formed in a straight portion of the cylindrical capacitor is smaller than a size of HSGs formed in a bowing portion of the cylindrical capacitor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A is a cross-sectional view of a related semiconductor device when a capacitor hole is formed;

FIG. 1B is a cross-sectional view of a related semiconductor device when an upper electrode of a cell capacitor is formed;

FIG. 2 is a cross-sectional view of a cylindrical capacitor according to a first embodiment of the present invention;

FIG. 3 is a cross-sectional view of the cylindrical capacitor according to the first embodiment of the present invention in a first step;

FIG. 4 is a cross-sectional view of a cylindrical capacitor according to the first embodiment of the present invention in a second step;

FIG. 5 is a cross-sectional view of the cylindrical capacitor according to the first embodiment of the present invention in a third step;

FIG. 6 is a cross-sectional view of the cylindrical capacitor according to the first embodiment of the present invention in a fourth step;

FIG. 7 is a cross-sectional view of the cylindrical capacitor according to the first embodiment of the present invention in a fifth step;

FIG. 8 is a graph of the effective opening size as a function of the ion implantation dose;

FIG. 9 is a graph of the relative cell capacitance as a function of the ion implantation dose;

FIG. 10 is a graph of the relative yield rate in terms of information retention time as a function of the ion implantation dose; and

FIG. 11 is a cross-sectional view of a cylindrical capacitor according to a second embodiment of the present invention in an intermediate step.

Claims

1. A semiconductor device including a cylindrical capacitor, wherein: a size of hemispherical silicon grains (HSGs) formed in a straight portion of the cylindrical capacitor is smaller than a size of HSGs formed in a bowing portion of the cylindrical capacitor.

2. The semiconductor device according to claim 1, wherein: an effective opening size of the straight portion is at least twice a thickness of a capacitive dielectric film.

3. The semiconductor device according to claim 1, wherein: an effective opening size of the straight portion is at least twice a total thickness of a capacitive dielectric film and a lower metal film of an upper electrode.

4. The semiconductor device according to claim 1, wherein: the straight portion is a region substantially perpendicular to a main surface of a semiconductor substrate, the region starting from an upper end of a lower electrode.

5. The semiconductor device according to claim 1, wherein: the bowing portion has the largest opening size at a height of 70% to 80% of a height of the cylindrical capacitor.

6. The semiconductor device according to claim 1, wherein: a size of HSGs formed in a straight portion of the cylindrical capacitor is lower larger than a size of HSGs formed in the bowing portion by 5 to 15 nm.

7. A method for manufacturing a semiconductor device, comprising the steps of: forming an interlayer insulating film on a semiconductor substrate;forming a cylindrical hole in the interlayer insulating film;forming an amorphous semiconductor layer as a lower electrode of a capacitor over an entire surface of the semiconductor substrate;introducing an impurity into a straight portion of the amorphous semiconductor layer;seeding a surface of the amorphous semiconductor layer; androughening the surface of the amorphous semiconductor layer so that a size of HSGs in the straight portion is smaller than a size of HSGs in a bowing portion.

8. The method for manufacturing a semiconductor device according to claim 7, wherein: the step of introducing an impurity comprises introducing an impurity into the straight portion of the amorphous semiconductor layer by oblique ion implantation.

9. The method for manufacturing a semiconductor device according to claim 8, wherein: the oblique ion implantation comprises implanting an n-type impurity at an angle of 15° to 70°.

10. The method for manufacturing a semiconductor device according to claim 7, further comprising: applying a resist to a region under the straight portion of the amorphous semiconductor layer before introducing an impurity.