Claims
- 1. A process for preparing a semiconductor device comprising plural lines of metal wires formed on a substrate each having a connection terminal positioned at the end of said substrate for connecting to an external driving circuit for applying voltage independently to every pixel electrode, comprising the steps of:depositing a metal film by vacuum deposition or sputtering and removing partially said metal film to form the predetermined pattern of said metal wire; forming an interterminal anti-short-circuiting pattern, comprising conductive islands and recess(es) located around said islands, at the position of said connection terminal to be formed; depositing a protective insulating film on the surface of said metal wire except at least a portion of said island but including the inside of said recess thereon to provide a contact hole of the uncovered portion with said protective insulating film on said island; and depositing a transparent conductive film on the surface of said protective insulating film including inside said contact hole and the top face of said island.
Priority Claims (1)
Number |
Date |
Country |
Kind |
9-295208 |
Oct 1997 |
JP |
|
CROSS-REFERENCE TO RELATED APPLICATIONS
This Application is a Divisional of U.S. application Ser. No. 09/671,414, filed Sep. 27, 2000, now U.S. Pat. No. 6,323,931, issued Nov. 27, 2001, which in turn is a Divisional of U.S. application Ser. No. 09/179,654, filed Oct. 27, 1998, now U.S. Pat. No. 6,184,966, issued Feb. 6, 2001.
US Referenced Citations (4)
Number |
Name |
Date |
Kind |
5636329 |
Sukegawa et al. |
Jun 1997 |
A |
5737052 |
Kimura |
Apr 1998 |
A |
6163356 |
Song et al. |
Dec 2000 |
A |
6400425 |
Kim et al. |
Jun 2002 |
B1 |