Claims
- 1. A method of manufacturing a semiconductor device, comprising:
- a first step of forming a first insulation layer on a substrate;
- a second step of forming a first wiring layer on the first insulation layer;
- a third step of forming a second insulation layer on the first wiring layer;
- a fourth step of forming a contact hole in the second insulation layer and a groove in the first insulation layer extending from said contact hole to the substrate;
- a fifth step of forming a third insulation layer on the entire surface of the substrate with a portion thereof filling the groove; and
- a sixth step of selectively etching the third insulation layer to leave the portion of the third insulation layer in the groove.
- 2. The method of manufacturing a semiconductor device according to claim 1, further comprising a seventh step of forming a second wiring layer filling the contact hole.
Priority Claims (1)
Number |
Date |
Country |
Kind |
63-194572 |
Aug 1988 |
JPX |
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Parent Case Info
This is a division of application Ser. No. 07/388,037, filed Aug. 1, 1989, now U.S. Pat. No. 5,014,109 iss. date May 7, 1991.
US Referenced Citations (4)
Number |
Name |
Date |
Kind |
4647850 |
Henderson et al. |
Mar 1987 |
|
4656732 |
Teng et al. |
Apr 1987 |
|
4737831 |
Iwai |
Apr 1988 |
|
4900695 |
Takahashi et al. |
Feb 1990 |
|
Divisions (1)
|
Number |
Date |
Country |
Parent |
388037 |
Aug 1989 |
|