Patent Application
20100071766
This invention relates generally to a semiconductor device having a multi-layer substrate that includes a plurality of dissimilar regions. In particular, this invention relates to a semiconductor device having a multi-layer substrate that includes a plurality of dissimilar regions, wherein at least one of the regions is an inner region having magnetic properties.
Generally, semiconductor devices have a plurality of materials disposed over a substrate. To maintain the operational integrity of the semiconductor device it is desirable to minimize or eliminate corrosion of the substrate.
In certain semiconductor devices, it is desirable to form at least portions of the semiconductor device utilizing a roll-to-roll manufacturing process wherein, for example, a roll of a continuous substrate is directed through equipment configured to perform processes in the formation of the semiconductor device. After the processing is complete, the processed continuous substrate is then formed into a roll of finished or semi-finished semiconductor devices. During the roll-to-roll processing, a substrate having magnetic properties can be utilized with a magnetic field applied across the substrate to guide and control the position/movement of the substrate as it moves through the equipment.
In one configuration, a substrate made of stainless steel is used, thereby providing magnetic and corrosion-resistant properties. A disadvantage with this configuration is the high cost of the stainless steel compared to, for example, mild steel.
Therefore, the inventors herein have recognized a need for a cost efficient substrate configuration that provides desirable magnetic properties and corrosion-resistance.
A semiconductor device is provided in accordance with an exemplary embodiment. The semiconductor device includes a semiconductive layer disposed over a multi-layer substrate. The multi-layer substrate includes a plurality of dissimilar regions, one of which is an inner magnetic region and the remainder of the multi-layer substrate is thermally symmetrical about the inner magnetic region.
A method of forming a semiconductor device is provided in accordance with another exemplary embodiment. The method includes the step of providing a multi-layer substrate, the multi-layer substrate includes a first layer of material having a magnetic property; a second layer of material disposed above the first layer; and a third layer of material disposed below the first layer, wherein the three layers are secured together. The method further includes the step of disposing a semiconductive layer over the multi-layer substrate.
Disclosed herein are embodiments of semiconductor devices, the concepts of which have application generally to thin film electrical devices and circuitry made of inorganic and organic materials, including photovoltaic devices, etc. Exemplary embodiments of the semiconductor devices include a multi-layer substrate and at least one semiconductive layer disposed over or on the multi-layer substrate. The multi-layer substrate has an inner layer and a plurality of covering layers. The inner layer includes a material having magnetic properties. The covering layers are disposed over the inner layer, and the covering layers generally have a different material property compared to the inner layer.
In one embodiment, the inner layer is a metal with magnetic properties. In an alternative embodiment, the inner layer is a composition of materials, such as steel, with magnetic properties. The material of the inner layer with the magnetic properties may be distributed uniformly throughout the inner layer or positioned in predetermined areas of the inner layer for manufacturing purposes and/or to suit a particular configuration of the semiconductor device.
In the embodiments, the layers of the multi-layer substrate are secured together and do not separate when the multi-layer substrate is processed thereafter, such as in preparation of the multi-layer substrate for formation of the semiconductor device or during formation of the semiconductor device, unless one or more of the layers are intentionally removed from the remainder of the multi-layer substrate. The layers of the multi-layer substrate may be secured or bonded together by means well known in the art such as pressure, chemical, heat, adhesives, etc. and combinations thereof.
In the embodiments, at least two covering layers disposed over the magnetic inner layer include a material that is substantially corrosion-resistant to protect the magnetic inner layer from degradation due to corrosion. It is contemplated herein that corrosion-resistant materials include, but not limited to, stainless steels, aluminum, bronze, durimet, monel, hasteloy, titanium, cobalt, etc. and non-metals such as plastics, rubber, polymers, etc.; including combinations thereof. In some embodiments, not all of the covering layers disposed over the inner layer will necessarily be made of corrosion-resistant materials.
In certain embodiments, a particular corrosion-resistant material of the multi-layer substrate may be selected for application in an environment having high humidity, in an environment having corrosive chemicals during a manufacturing process, during storage/transportation of the multi-layer substrate or the semiconductor device, or in an environment at an operating location of the semiconductor device. It is contemplated that in some embodiments, one or more of the covering layers will have desirable corrosion-resistance properties when the covering layer is exposed to, for non-limiting examples, acetone, ammonia, various chlorides, various acids, acidic rain, chemicals in smog, hydrogen, sulfides, hydroxides, oxygen, petroleum oils, water, steam, sea water, etc.
It is further contemplated that the corrosion-resistant material(s) selected will provide a desirable degree of resistance to corrosion in the environment of the multi-layer substrate over a predetermined duration such as during storage, during manufacturing and in the operating environment of the semiconductor device. The predetermined time may range from, for example, seconds such as during a manufacturing process, days or months during storage, or for a duration at the semiconductor device operating environment which may be covered under a warranty such as 1, 5, 10 or 20 years. Additionally, one of the covering layers may have a predetermined configuration (composition, thickness, etc.) so that in the event of some degradation of the covering layer exposed to a corrosive environment the semiconductor device is not rendered inoperable. For instance in a non-limiting example, a semiconductor device may not be rendered inoperable even though a covering layer (e.g. a mounting surface of the semiconductor device) experiences a certain amount of corrosion.
In the embodiments, the multi-layer substrate configuration is such that thermal expansion of the substrate is substantially symmetrical about the magnetic inner layer of the substrate so that the substrate maintains a substantially flat/planar configuration when the substrate is exposed to a temperature sufficient to cause the substrate to expand. In an alternative embodiment, a substrate configuration is such that not all of the covering layers about the magnetic inner layer are the same material and/or thickness, yet the substrate maintains a substantially flat/planar configuration when the substrate is exposed to a temperature sufficient to cause the substrate to expand.
In one embodiment, the multi-layer substrate is dimensionally symmetrical about the magnetic inner layer. In other alternative embodiments, not all of the layers disposed about the magnetic inner layer are the same material and additionally may or may not be symmetrically disposed about the inner layer. For instance, one of the covering layers of the multi-layer substrate can be a polymer while another layer is metallic. In some of the embodiments, the multi-layer substrates contemplated herein are configured so one or more layers can be removed after the semiconductor device is further processed after joining the multi-layer substrate with another portion of the semiconductor device.
In the embodiments and alternatives thereof, the multi-layer substrate can be held, displaced or its position/movement controlled by the application of a magnetic field across the substrate utilizing the magnetic inner layer. The magnetic attraction force occurs effectively with the magnetic inner layer positioned between the covering layers. The application of the magnetic field with the multi-layer substrate can be useful in a manufacturing process.
The magnetic field, in a non-limiting embodiment, can be applied across the multi-layer substrate by bringing another member proximate the substrate, wherein the member has an opposite magnetic pole compared to the magnetic pole of the inner layer of the substrate. In another alternative embodiment, a magnetic field can be applied across the substrate by utilizing an electric current for the formation of the magnetic field. In a non-limiting example, the application of a magnetic filed across the multi-layer substrate finds utility in a roll-to-roll process where the multi-layer substrate is a continuous member that is directed through a plurality of processes to produce at least a portion of the semiconductor device. For instance, in an exemplary embodiment a magnetic field in a range from 1000 to 2000 Gauss is applied at one or more locations across the multi-layer substrate. In another embodiment, a first magnetic field strength is applied at one location of the multi-layer substrate while a second magnetic field strength is applied at another location of the multi-layer substrate.
Examples of a roll-to-roll process line are described in U.S. patent applications Ser. No. 10/228,542, entitled “High Throughput Deposition Apparatus,” filed on Aug. 27, 2002 and Ser. No. 11/376,997, entitled “High Throughput Deposition Apparatus with Magnetic Support,” filed on Mar. 16, 2006, the disclosures of which are incorporated herein by reference. The cited applications disclose a roll-to-roll process line for manufacturing semiconductor devices, in particular photovoltaic devices, where a pay-out unit dispenses a rolled continuous substrate toward equipment some of which includes a deposition chamber having deposition apparatus therein for the deposition of materials over the continuous substrate. At the end of the roll-to-roll process line, a take-up unit receives the processed continuous substrate and forms a rolled amount thereof.
In the embodiments of semiconductor devices contemplated herein for use with multi-layer substrates, the semiconductive layer is configured to produce and/or route electrical charge. For example, in a photovoltaic device, the semiconductive layer is a layer configured to generate electric current from photons of electromagnetic radiation incident to the semiconductive layer. In some embodiments, the semiconductor device includes another non-conductive material that does not substantially produce or route electrical charge. In the exemplary embodiments, the non-conductive material may be deposited within, on or over the multi-layer substrate. In some embodiments, the non-conductive material may be included with a portion of the semiconductive material. In a non-limiting example, a configuration of non-conductive material may employed with a configuration of conducting material to route electrical current along a predetermined path. In another non-limiting example, the non-conductive material may be employed as a component of the multi-layer substrate and function, for example, as a corrosion-resistant layer.
Hereinafter, various exemplary embodiments of multi-layer substrates are described. The elements and members shown in the referenced Figures are not drawn to scale and are shown as such for clarity purposes and not intended to convey limiting information such as shape, orientation, dimensions, weight, etc., unless otherwise mentioned in the specification. For clarity herein this disclosure, is to be understood that a second layer of material disposed on a first layer of material is also considered to be disposed over the first layer, where the second layer is in physical contact with the first layer. In another embodiment, the second layer is disposed over the first layer where the first and second layers are not in physical contact with each other. Additionally, it is intended, even though not shown in the Figures, that in some embodiments of semiconductor devices one or more additional layers of material may be included between the multi-layer substrate and the semiconductive layer (e.g. for a photovoltaic device the additional layer may be a reflective layer, seed layer, etc.) and/or one or more layers of material may be disposed over the semiconductive layer (e.g. for a photovoltaic device the additional layer may be wire, a transparent conductive oxide such as indium tin oxide (ITO), an encapsulant or protective layer, etc.).
Referring to
In the embodiment of
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In the configuration of
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In this embodiment, the material coefficients of thermal expansion and cross-sectional thicknesses of layers 42 and 48 are substantially similar to each other. The material coefficients of thermal expansion and cross-sectional thicknesses of layers 44 and 46 are substantially similar to each other, yet not the same compared to layers 42 and 48. In this embodiment, the overall multi-layer substrate maintains a substantially flat/planar configuration when the substrate is exposed to a temperature sufficient to cause the substrate to expand. A configuration such as this may be desirable where both the second upper covering layer 44 and the first lower covering layer 46 contacting the magnetic inner layer are intended to be compatible with the magnetic inner layer 40. Similarly, this configuration this may be desirable where the first upper covering layer 42 and second lower covering layer 48 are intended to be compatible with another material contacting one or both layers for a desirable configuration or characteristic of the semiconductor device. Compatibility may be expressed as a desirable aspect of the semiconductor device in terms of functionality of the device (electrical, chemical, mechanical, etc.) or an aspect desirable during manufacturing.
In another alternative of the embodiment of
Referring to
A multi-layer substrate like that shown in
A similar strategy may be employed in the configurations of the multi-layer substrates of
In yet another alternative embodiment, layer 60 (of the multi-layer substrate) can comprise two layers, a stress-balancing layer that contacts the non-metallic layer and a corrosion-resistant layer that contacts the magnetic inner layer. The stress-balancing layer may be utilized to minimize internal stresses in a remaining portion of the semiconductor device, for example to minimize curl of the device. For instance, the stress-balancing layer is a zinc oxide and the corrosion-resistant layer is titanium. Here, the titanium layer protects the inner layer from corrosion. Additionally, the layer contacting the inner layer, here titanium, can serve as an etch-stop, where an etching process used to remove the magnetic inner layer is not suitable to remove the titanium layer. In certain embodiments, one or more of the layers formed over the multi-layer substrate can be formed via a roll and bake process.
In another alternative embodiment, a layer that contacts the non-metallic layer is corrosion-resistant and/or serves as an etch-stop layer. And in another embodiment, one or more layers, positioned between the non-metallic layer and the multi-layer substrate, are not a part of the multi-layer substrate yet still function as a stress-balancing layer and/or an etch stop layer. It is to be understood that in the embodiments where layers between the non-metallic layer and the magnetic layer are a part of the multi-layer substrate, the coefficients of thermal expansion and thicknesses of the material layers are configured such that the overall multi-layer substrate maintains a substantially flat/planar configuration when the substrate is exposed to a temperature sufficient to cause the substrate to expand.
Examples of thinning, severing, and otherwise removing portions of substrates are described in U.S. Pat. No. 6,767,762, entitled “Lightweight Semiconductor Device and Method for its Manufacture,” and U.S. Pat. No. 7,176,543, entitled “Method of Eliminating Curl for Devices on Thin Flexible Substrates, and Devices made Thereby,” the disclosures of which are incorporated herein by reference.
In an exemplary embodiment, a method for forming a semiconductor device, such as a photovoltaic device having a multi-layered substrate will now be described. In a first step, one or more exposed surfaces of the multi-layered substrate are treated in a manner to prepare the multi-layer substrate for a subsequent processing step in forming the semiconductor device. For example, the surface is chemically treated, cleaned, washed, etched, etc. to remove and/or modify at least a portion of the surface. In another example, the surface is mechanically treated, such as polishing, buffing, etc. to prepare the multi-layered substrate for a subsequent processing step in forming the semiconductor device.
In another non-limiting example, the multi-layered substrate or a portion thereof is exposed to a plasma process, such as argon plasma, a sputtering process or the like, to modify at least a portion of the composition of the multi-layered substrate. For instance, a multi-layer substrate with an aluminum outer layer can have an outer surface of the outer layer treated by sputtering aluminum over the aluminum surface to a degree sufficient to break down the native insulating oxide of the aluminum outer layer. This process has been shown to produce a modification of the surface that is not expected and therefore the surface has a more desirable interaction with another material thereafter deposited over the treated aluminum outer layer.
In a subsequent step of forming the semiconductor device, a semiconductive layer(s), and/or a non-conductive layer(s) of material is deposited on or over the multi-layer substrate. For example, where the semiconductor device is a photovoltaic device having a tandem or triad configuration of n-p, n-i-p and p-i-n junctions, deposited materials can include crystalline silicon, amorphous silicon, microcrystalline silicon, nanocrystalline silicon, polycrystalline silicon, group IV semiconductor materials including hydrogenated alloys of silicon and/or germanium. Other photovoltaic materials include GaAs (Gallium Arsenide), CdS (Cadmium Sulfide), CdTe (Cadmium Telluride), CuInSe2 (Copper Indium Diselenide or “CIS”), and Copper Indium Gallium Diselenide (“CIGS”), and hybrid organic/inorganic materials, for example, dye sensitive solar cells (DSSC). And in another subsequent step, additional materials or components may be formed over the semiconductive layer(s) to further form the semiconductor device.
Depending on the embodiment of semiconductor device, another subsequent step of forming the semiconductor device may be employed where one or more layers is later removed from the formed semiconductor device by the methods discussed hereinabove or by other methods depending on the configuration of the semiconductor device.
While the foregoing description has been directed to certain embodiments of a semiconductor device having a multi-layer substrate wherein the substrate includes a plurality of dissimilar regions one of which is an inner magnetic region, the principles of this invention are applicable to other embodiments of substrates and semiconductor devices not disclosed herein. In view of the teachings presented herein, yet other modifications and variations of the invention will be apparent to those of skill in the art. The foregoing is illustrative of particular embodiments, but is not meant to be a limitation upon the practice thereof. It is the following claims, including all equivalents, which define the scope of the invention.
