BRIEF DESCRIPTION OF THE DRAWINGS
The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description made with reference to the accompanying drawings. In the drawings:
FIG. 1 is a cross sectional view showing a semiconductor device according to a preferred embodiment of the present disclosure;
FIGS. 2A and 2B are cross sectional views showing semiconductor devices, which are used for simulation;
FIG. 3A is a cross sectional view showing another semiconductor device, which is used for simulation, and FIG. 3B is a graph showing a depth profile of impurity concentration in the devices shown in FIGS. 2A and 3A;
FIG. 4 is a graph showing a relationship between a recovery current of a diode cell and a depth of a second trench in the devices shown in FIGS. 2A-2B and 3A;
FIG. 5 is a graph showing a relationship between a time and a current of the diode cell in the devices shown in FIGS. 2A and 3A;
FIG. 6 is a cross sectional view showing another semiconductor device according to a modification of the preferred embodiment of the present disclosure;
FIG. 7 is a cross sectional view showing further another semiconductor device according to another modification of the preferred embodiment of the present disclosure;
FIG. 8 is a cross sectional view showing a semiconductor device according to a comparison of the preferred embodiment of the present disclosure;
FIG. 9 is a circuit diagram showing an equivalent circuit of the device shown in FIG. 8;
FIG. 10A is a circuit diagram showing a test circuit for detecting a current waveform in the device in FIG. 9, and FIG. 10B is a graph showing a relationship between a time and a current in the diode cell in the device in FIG. 9; and
FIG. 11 is a cross sectional view showing a semiconductor device according to a prior art.
Patent Application
20070170549
