The above and other features and advantages of the present invention will become more apparent to those of ordinary skill in the art by describing in detail exemplary embodiments thereof with reference to the attached drawings, in which:
Korean Patent Application No. 10-2006-0052592, filed on Jun. 12, 2006, in the Korean Intellectual Property Office, and entitled: “Semiconductor Device Including Fuses and Method of Cutting the Fuses,” is incorporated by reference herein in its entirety.
The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are illustrated. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
In the drawing figures, the dimensions of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when a layer or element is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. Further, it will be understood that when a layer is referred to as being “under” another layer, it can be directly under, and one or more intervening layers may also be present. In addition, it will also be understood that when a layer is referred to as being “between” two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. Like reference numerals refer to like elements throughout.
According to embodiments of the present invention, a laser beam may be used to cut fuses, and a check pattern may be used to maintain a constant process margin between the fuses. At least one check pattern may be installed on a chip of a semiconductor device. In detail, one or more check patterns may be installed on one side of fuses of a unit chip or on one side of fuses connected to redundancy cells. If necessary, the check pattern may be installed on various positions of a unit chip of a semiconductor.
Referring to
A process margin d1 may be calculated as being about half the value obtained by subtracting the width d5 of the fuse 200b, the diameter d3 of the laser beam (L), and a component installation error d2 from d4 (2×pitch). That is, d1=(d4−d5−d3−d2)/2. The process margin d1 may be defined as a width of a region located at one side of the fuse 200b. The process margin d1 may be measured using a check pattern 300 having the same width and height as the width d5 and height of the fuses 200. The pitch between the fuses 200 and the check pattern 300 may have same pitch as that of the fuses 200. The check pattern 300 may be used to determine the process margin d1 related to the laser beam (L). The check pattern 300 may have the same pitch as that of the fuses 200.
The check pattern 300 may be used to check the process margin d1 in a first direction, e.g., an x-axis direction, perpendicular to the fuses 200 and in a second direction, e.g., a y-axis direction, perpendicular to the first direction, respectively. Further, the check pattern 300 may be simultaneously used to check the process margin d1 in the first and second directions. As illustrated in
The check pattern 300 may be formed by the following process. A conductive metal layer may be deposited on the insulating layer 102 and the fuses 200 so that the check pattern 300 may be simultaneously formed by a general lithography process. After that, an oxide layer and a nitride layer may be further deposited as a passivation layer. Portions of the oxide layer and the nitride layer located above the fuses 200 and the check pattern 300 may be cut to form a window. The check pattern 300 of the present invention may thus be readily formed during the process of forming the fuses 200.
Referring to
The check pattern 300 may be used to check the process margin d1 in the second direction (the y-axis direction) perpendicular to the first direction. That is, the upper portion of the check pattern 300 may be damaged in the y-axis direction as illustrated in
Generally, in the process of cutting fuses, an energy level of the laser beam (L) may be determined after aligning a wafer bearing fuses. For example, the energy level of the laser beam (L) may be determined in a range of, e.g., about 0.05 to 0.2 μj (where μj is microjoules), by scanning a predetermined energy range from a low energy level to a high energy level, e.g., about 0.01 to 0.3 μj, at intervals of about 0.01 μj. In other words, while varying the energy level of the laser beam (L) at intervals of 0.01 μj within the predetermined energy range, the check pattern 300 may be scanned with the laser beam (L) to determine whether the check pattern 300 is damaged by the laser beam (L). In this way, the energy level of the laser beam (L) may be easily determined.
Combinations of multiple tetragonal check patterns may be used in the present invention.
Referring to
The check patterns 300 may include multiple adjacent tetragons having sides of different lengths. For example, referring to
According to the fuse-containing semiconductor device and method of cutting the fuses of the present invention, a check pattern spaced a predetermined distance from one side of the fuses and having the same width, height, and pitch as the fuses may be formed, so as to be usable to check the process margin of the laser beam in the fuse cutting process. Also, the check pattern may be easily formed in the process of forming the fuses. Further, in the fuse cutting process, the energy level of the laser beam may be easily determined by evaluating whether the check pattern is damaged by the laser beam.
Exemplary embodiments of the present invention have been disclosed herein, and although specific terms are employed, they are used and are to be interpreted in a generic and descriptive sense only and not for purpose of limitation. Accordingly, it will be understood by those of ordinary skill in the art that various changes in form and details may be made without departing from the spirit and scope of the present invention as set forth in the following claims.
Number | Date | Country | Kind |
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10-2006-0052592 | Jun 2006 | KR | national |