Claims
- 1. A protection circuit for a semiconductor device, comprising:
- a semiconductor substrate;
- an insulating film formed on said semiconductor substrate;
- an input terminal pad formed on said insulating film and connectable to an external device, said external device generating a high-frequency surge voltage;
- a circuit including a current limiting gate protection resistor formed on said film and electrically connected to said input terminal pad, and a clamping diode electrically connected to said resistor and formed at least partially in said substrate;
- at least one other circuit formed on said substrate; and
- means consisting essentially of a single semiconductor region, disposed in said semiconductor substrate directly beneath said entire input terminal pad and said insulating film, and connected to a source of reference potential, for forming with said input terminal pad and said insulating film a capacitor, for passing said high-frequency surge voltage applied to said input terminal pad to said source of reference potential.
- 2. A semiconductor device as set forth in claim 1, wherein said reference potential is a power supply line of said semiconductor device when said impurity semiconductor region is of N type.
- 3. A semiconductor device as set forth in claim 1, wherein said reference potential is a ground line of said semiconductor device when said impurity semiconductor region is of P type.
- 4. A gate protection circuit as claimed in claim 1, wherein said means for forming a capacitor comprises a high-concentration impurity semiconductor region.
- 5. A gate protection circuit as claimed in claim 1, wherein said high-concentration impurity region is arranged to lie beneath substantially all of said input terminal pad.
- 6. A protection circuit for a semiconductor device, comprisig:
- a semiconductor substrate;
- an insulating film formed selectively on said semiconductor substrate;
- an input terminal pad formed on said insulating film and connectable to an external device, said external device generating a high-frequency surge voltage;
- a circuit including a current limiting gate protection resistor formed on said film and electrically connected to the input terminal pad, and a clamping diode connected to said resistor and formed at least partially in said substrate; and
- a high concentration impurity region, disposed in said semiconductor substrate directly beneath said entire input terminal pad and connected to a source of reference potential, for forming with said input terminal pad and said insulating film a capacitor, said capacitor passing high frequency components of said high-frequency surge voltage to said source of reference potential when the high frequency surge voltage is applied to said input terminal pad so that the passage of the high-frequency surge voltage through the semiconductor substrate is prevented.
Priority Claims (1)
Number |
Date |
Country |
Kind |
57-1717 |
Jan 1982 |
JPX |
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Parent Case Info
This application is continuation of application Ser. No. 769,792, filed Aug. 26, 1985 abandoned; which is a continuation of application Ser. No. 445,085 filed Nov. 29, 1982, now abandoned.
US Referenced Citations (7)
Foreign Referenced Citations (5)
Number |
Date |
Country |
52-14384 |
Feb 1977 |
JPX |
52-43382 |
Apr 1977 |
JPX |
54-101283 |
Aug 1979 |
JPX |
55-143061 |
Nov 1980 |
JPX |
1357558 |
Jun 1974 |
GBX |
Non-Patent Literature Citations (3)
Entry |
P. Richman, "Char. and Oper. of Mos Fets," .COPYRGT.1967, McGraw-Hill, Inc., TK7871.95R5, pp. 101-103. |
Society of Automotive Engineering, "Recommended Environmental Practices for Electronic Equipment Design--SAE J1211", SAE Recommended Practice pp. 22.80-22.96, 1978. |
Society of Automotive Engineering, "Electromagnetic Susceptibility Procedures for Vehicle Components (Except Aircraft)--SAE J1113a, SAE Recommended Practice, pp. 22.62-22.73, 1975, revised 1978. |
Continuations (2)
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Number |
Date |
Country |
Parent |
769792 |
Aug 1985 |
|
Parent |
445085 |
Nov 1982 |
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