The present invention relates to biometrics identification sensors, and more particularly to the packaging of such devices.
Electronic devices and particularly mobile electronic devices are becoming more prevalent. The data being handled in these devices are growing in both quantity and sensitivity. Security devices are needed to protect users of electronic devices from potential harm. Such security devices need to excel in accuracy, form factor and usability.
A conventional fingerprint sensor device is disclosed in U.S. Pat. No. 8,358,816, which is incorporated herein by reference. The disclosed device uses a linear light sensor to capture the user's fingerprint. However, the linear light sensor can be easily hacked, thus making it a very weak security device. For example, one could simply print out a fingerprint on a sheet of paper and use the printed finger print to gain access to the device protected by the fingerprint sensor device. The linear light sensor cannot distinguish between the fake paper copy and the real finger. Additionally, the linear light sensor also requires the user to make a swiping motion. The swipe has to be precise and well positioned, thus making it sometimes difficult to use. Finally, the package for this device is not designed with form factor and device integration in mind. The packaging is bulky, and generally needs a specially designed device cover with a window.
There is a need for an improved biometric identification sensor.
The aforementioned problems and needs are addressed by a sensor device comprising a sensor die, a second substrate and a conductor assembly. The sensor die includes a first substrate having front and back surfaces, a sensor disposed in or at the front surface, bond pads disposed in or at the front surface and electrically coupled to the sensor, and a plurality of openings each extending from the back surface to one of the bond pads. The second substrate has top and bottom surfaces, wherein the bottom surface of the second substrate is mounted to the front surface of the first substrate. The conductor assembly is electrically coupled to at least some of the bond pads through at least some of the openings.
A method of forming a sensor device comprises providing a sensor die (which includes a first substrate having front and back surfaces, a sensor disposed in or at the front surface, and bond pads disposed in or at the front surface and electrically coupled to the sensor), forming a plurality of openings each extending from the back surface to one of the bond pads, mounting a bottom surface of a second substrate to the front surface of the first substrate, and electrically coupling a conductor assembly to at least some of the bond pads through at least some of the openings.
Other objects and features of the present invention will become apparent by a review of the specification, claims and appended figures.
The present invention is a biometrics identification (fingerprint) sensor, packaging of fingerprint sensor, and integration of such device. The sensor achieves optimal reading of fingerprints using sensory techniques such as capacitive, electromagnetic, infrared and photonic. The present invention includes packaging and integrating of such device into an electronic system, where the sensor can be disposed directly under the screen (or as part of a screen) of a handset device for user's fingerprint recognition and authentication.
Trenches 20 are formed into the back surface of substrate 12 along the scribe lines 18 and over the sensor bond pads 16). Trenches 20 can be formed using a photolithographic mask and anisotropic dry etch process, which is well known in the art. Trenches 20 preferably extend toward but do not reach the front surface of substrate 12. Mechanical sawing or any other mechanical milling process can instead be used to form the trenches 20. Vias (i.e. holes) 22 are formed into the silicon from the bottoms of trenches 20 to expose sensor bond pads 16. Holes 22 can be formed by laser, dry etch, wet etch or any another appropriate VIA forming methods that are well known in the art. Each trench 20 and corresponding hole 22 form an opening extending from the back surface of the substrate to one of the bond pads 16. An optional passivation material 24 can be deposited on the walls of holes 22, and in trenches 20 around the openings of holes 22, while leaving the sensor bond pads 16 exposed at the ends of holes 22. While not shown, the entire backside of the silicon wafer 10 can be coated with passivation material 24 as well. Passivation material 24 can be silicon dioxide or silicon nitride. Preferably, the passivation layer 24 is made of at least 0.5 μm of silicon dioxide, formed using a silicon dioxide deposition method which can be Physical Vapor Deposition (PVD) or any another appropriate deposition method(s). The resulting structure is shown in
The VIA holes 22 can further be optionally coated or filled with conductive material such as copper or any other conductive material that are well known in the art. A metallic material such as copper is preferred, and can be deposited by a plating or sputtering process. The copper is then selectively removed using lithographic etching process, leaving the vias coated or filled with copper. Optionally, traces and routes can be formed in the trenches 20 and on the back surface of the substrate 12. At this time, an enhancement layer can optionally be formed on the front surface of substrate 12. The enhancement layer can be an anti-reflective coating, an electromagnetic shielding layer, an antenna layer, an optical filter layer, a microlens layer, and/or any other sensor enhancement layer(s) that are commonly used in the art to enhance sensor devices.
An adhesive layer 28 is preferably formed over the front surface of substrate 12, which can be reaction-setting adhesive, die attach tape, thermal-setting adhesive or a wafer bonding agent of any other type that is well known in the art. The adhesive layer is preferably 0.1 tm to 100 μm in thickness. Alternatively, the adhesive layer 28 can instead be deposited on the cover substrate described below, or on both the cover substrate and the substrate 12. The adhesive agent is not activated at the current state. The adhesive layer 28 can be planarized and thinned through chemical or mechanical processes that are well known in the art. It should be noted that the adhesive layer 28 can be omitted altogether, whereby the sensor chip can be held onto the cover substrate by molding material. Wafer level dicing/singulation of components along the scribe lines 18 can be done with mechanical blade dicing equipment, laser cutting, chemical etching or any other appropriate processes to result in individual semiconductor devices (e.g. individual sensor devices) each on a separate sensor die 30, as shown in
A cover substrate 32 is provided which can be, for example, glass with layers of coatings and other electronic device structures that can be included on a device cover. Cover substrate 32 is preferably made of a dielectric material such as plastic, glass, etc. Optical transparency of the cover substrate 32 is preferred or even required if the sensor 15 includes a photonic sensor. Otherwise, the cover substrate 32 is preferably made of optically opaque material such as glass. The cover substrate 32 could be configured for positioning directly under the screen of a portable device, positioned in an aperture of such a screen, or could even be a portion of such a screen. A recess 34 can optionally be formed in the top surface of the cover substrate 32 which will be positioned over the sensor 15 to enhance sensor's sensitivity. The sensitivity is increased due to the reduction in distance between the external environment and the sensor 15. The recess 34 can be formed by etching, mechanical milling or any other appropriate methods for the particular cover substrate. The depth of recess 34 is preferably greater than 30% of the cover substrate's overall thickness. The resulting structure is shown in
A ground plane slot 36 can be formed in the top or bottom surfaces of the cover substrate 32. Slot 36 can be formed by etching, laser, mechanical milling or any other appropriate methods. The pattern of the slot 36 can be random (or pseudo random) and over any desired locations on the cover substrate 32. The walls of the slot 36 can be tapered or vertical. For example, the slot 36 can be a slot having vertical sidewalls formed into the bottom surface of substrate 32 as shown in
A ground plane 40 is formed by filling slot 36 with conductive material, preferably metallic material. The ground plane 40 acts as a ground plane antenna for a capacitive type sensor. Metallic material such as aluminum, copper, steel, gold, silver or any other metalloid can be used. The metal can be deposited by sputtering, plating or pre casted block which can be inserted into the ground plane slot 36. This metallic structure offers many properties such as electromagnetic shielding, cosmetic enhancement, usability improvement, but in general, the structure is used by the capacitive sensor where it has a focus plane and ground plane. In order to increase the focus plane sensitivity and accuracy, the ground plane is made larger. The bigger the ground plane in comparison to the focus plane the less sensitive it is, and the more accurate the focus plane will be. The ground plane is optional, and can exist elsewhere in the electronic device.
The sensor die 30 is then mounted to the cover substrate 32, preferably using the previously discussed thin layer of adhesive 28. Alternately, the thin layer of adhesive 32 is deposited on the bottom surface cover substrate 32, where the adhesive is not activated at the current state. The adhesive layer is preferably planarized, and has a thickness of 0.1 μm to 100 μm. The sensor die 30 can then be picked and placed on the cover substrate 32 (i.e. the front surface of substrate 12 mounted to the bottom surface of cover substrate 32). The adhesive layer can be activated by heat, pressure, chemical agent or any other appropriate methods. The sensor die 30 can be placed anywhere on the bottom surface of the cover substrate 32, but preferably is aligned to the recess 34 if one exists. The resulting structure is shown in
The sensor die 30 can be electrically connected to external circuitry by wirebonds 44 and/or a conductor assembly 46. Wirebonding is well known in the art, and the conductor assembly 46 can be for example, a flexible printed circuit board (flexible PCB), rigid PCB, etc., preferably mounted to cover substrate 32. If the sensor die 30 contains capacitive circuits, then preferably sensor die 30 is also connected to the ground plane 40 or some sort of large metallic structure or metallic network. The resulting structure is shown in
It is to be understood that the present invention is not limited to the embodiment(s) described above and illustrated herein, but encompasses any and all variations falling within the scope of the appended claims. For example, references to the present invention herein are not intended to limit the scope of any claim or claim term, but instead merely make reference to one or more features that may be covered by one or more of the claims. Materials, processes and numerical examples described above are exemplary only, and should not be deemed to limit the claims. Further, as is apparent from the claims and specification, not all method steps need be performed in the exact order illustrated or claimed, but rather in any order that allows the proper formation of the packaged sensor of the present invention. Lastly, single layers of material could be formed as multiple layers of such or similar materials, and vice versa.
It should be noted that, as used herein, the terms “over” and “on” both inclusively include “directly on” (no intermediate materials, elements or space disposed therebetween) and “indirectly on” (intermediate materials, elements or space disposed therebetween). Likewise, the term “adjacent” includes “directly adjacent” (no intermediate materials, elements or space disposed therebetween) and “indirectly adjacent” (intermediate materials, elements or space disposed there between), “mounted to” includes “directly mounted to” (no intermediate materials, elements or space disposed there between) and “indirectly mounted to” (intermediate materials, elements or spaced disposed there between), and “electrically coupled” includes “directly electrically coupled to” (no intermediate materials or elements there between that electrically connect the elements together) and “indirectly electrically coupled to” (intermediate materials or elements there between that electrically connect the elements together). For example, forming an element “over a substrate” can include forming the element directly on the substrate with no intermediate materials/elements therebetween, as well as forming the element indirectly on the substrate with one or more intermediate materials/elements therebetween.
This application claims the benefit of U.S. Provisional Application No. 61/921,323, filed Dec. 27, 2013, and which is incorporated herein by reference.
Number | Date | Country | |
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61921323 | Dec 2013 | US |