Patent Application
20240413044
The present application claims the benefit of priority from Japanese Patent Application No. 2023-094864 filed on Jun. 8, 2023. The entire disclosure of the above application is incorporated herein by reference.
The present disclosure relates to a semiconductor device.
Conventionally, there has been known a semiconductor device in which a semiconductor element is mounted to an anisotropic graphite to dissipate heat.
The present disclosure provides a semiconductor device including a semiconductor element, an anisotropic graphite, a first bonding layer, an insulating member, a metal plate, a second bonding layer, and a third bonding layer. The semiconductor element has a chip shape. The anisotropic graphite has one surface to which the semiconductor element is disposed. A direction along the one surface is a c-axis direction of the anisotropic graphite. The first bonding layer bonds the semiconductor element to the one surface of the anisotropic graphite. The insulating member has a plate shape, is disposed across the anisotropic graphite from the semiconductor element, and insulates the anisotropic graphite. The metal plate is made of a metal material, has a plate shape, and is disposed between the anisotropic graphite and the insulating member. The second bonding layer bonds the anisotropic graphite and the metal plate. The third bonding layer bonds the metal plate and the insulating member.
Objects, features and advantages of the present disclosure will become apparent from the following detailed description made with reference to the accompanying drawings. In the drawings:
Next, a relevant technology is described only for understanding the following embodiments. A semiconductor package according to the relevant technology includes a semiconductor element and an anisotropic graphite composite to which the semiconductor element is mounted. The anisotropic graphite composite is composed of an anisotropic graphite having a rectangular plate shape, a thin metal layer for bonding, and an inorganic material layer having an insulation property. The semiconductor element is bonded onto the anisotropic graphite, the inorganic material layer is disposed across the anisotropic graphite from the semiconductor element to ensure insulation, and a cooler is attached to the inorganic material layer to form the semiconductor package. The anisotropic graphite and the inorganic material layer are joined by the thin metal layer of about 8 μm to 50 μm made of plating or a metal brazing material.
In the above-described structure, a direction along one side of a surface of the anisotropic graphite and a direction along another side perpendicular to the one side are defined as an X-axis and a Y-axis, respectively, and a thickness direction of the anisotropic graphite perpendicular to the X-axis and the Y-axis is defined as a Z-axis. A crystal orientation of the anisotropic graphite is in the Z-axis direction. The semiconductor element having a rectangular chip shape is disposed to a surface of the anisotropic graphite with one side of the semiconductor element facing the X-axis direction and another side perpendicular to the one side facing the Y-axis direction so that a heat dissipation capability is improved.
In the above-described semiconductor package, the crystal orientation of the anisotropic graphite is oriented in the Z-axis direction, and while heat conduction in the X-axis and Z-axis directions is good, heat conduction in the Y-axis direction is poor. In addition, a structure in which the anisotropic graphite and the inorganic material layer are simply bonded via the thin metal layer has a low effect of transferring heat in the Y-axis direction in the anisotropic graphite, and it is difficult to dissipate heat generated by the semiconductor element. Therefore, it is difficult to lower a thermal resistance of the semiconductor package.
A semiconductor device according to an aspect of the present disclosure includes a semiconductor element, an anisotropic graphite, a first bonding layer, an insulating member, a metal plate, a second bonding layer, and a third bonding layer. The semiconductor element has a chip shape. The anisotropic graphite has one surface to which the semiconductor element is disposed. A direction along the one surface is a c-axis direction of the anisotropic graphite. The first bonding layer bonds the semiconductor element to the one surface of the anisotropic graphite. The insulating member has a plate shape, is disposed across the anisotropic graphite from the semiconductor element, and insulates the anisotropic graphite. The metal plate is made of a metal material, has a plate shape, and is disposed between the anisotropic graphite and the insulating member. The second bonding layer bonds the anisotropic graphite and the metal plate. The third bonding layer bonds the metal plate and the insulating member.
In the semiconductor device described above, the metal plate is disposed between the anisotropic graphite and the insulating member. Thus, heat can be transferred toward an outer edge of the anisotropic graphite via the metal plate. Therefore, it is possible to lower the thermal resistance of the semiconductor device.
Embodiments of the present disclosure will be described below with reference to the drawings. In the following embodiments including other embodiments to be described below, the same or equivalent components will be described with the same reference numerals.
A first embodiment of the present disclosure will be described with reference to
As shown in
The semiconductor element 10 is a semiconductor chip, and has, for example, a power element built therein. Examples of the power element include an insulated gate bipolar transistor (IGBT) and a metal-oxide-semiconductor field-effect transistor (MOSFET). In this example, the semiconductor element 10 is a semiconductor chip in which a vertical IGBT is built. As shown in
The semiconductor element 10 has a plate shape having a rectangular shape in a top view. Opposing two sides 12a of the surface 12 extend along the X-axis, the other two opposing sides 12b of the surface 12 extend along the Y-axis, and a thickness direction of the semiconductor element 10 is along the Z-axis. In the present specification, “along” the X-axis, the Y-axis, and the like is preferably parallel, but does not necessarily mean parallel, and also includes being inclined with respect to the axis.
The first bonding layer 20 is made of a conductive bonding material such as solder, silver paste, or silver sheet. The first bonding layer 20 may have any thickness. For example, the first bonding layer 20 has a thickness of 0.02 mm to 0.05 mm. The semiconductor element 10 is electrically and physically bonded to the anisotropic graphite 30 by the first bonding layer 20.
The anisotropic graphite 30 is graphite having anisotropy in thermal conduction and functions as a heat spreader. The anisotropic graphite 30 may have any thickness. For example, the anisotropic graphite 30 has a thickness of 2.0 mm.
As shown in
The anisotropic graphite 30 has a high thermal conductivity of about 1700 W/mK in the a-axis direction, that is, the X-axis direction and the Z-axis direction, but has a low thermal conductivity of about 7 W/mK in the c-axis direction, that is, the Y-axis direction. Therefore, when the semiconductor element 10 generates heat, the heat is easily transferred in the anisotropic graphite 30 in the direction along the a-axis due to the high thermal conductivity, but the heat is difficult to be transferred along the c-axis due to the low thermal conductivity.
The second bonding layer 40 and the third bonding layer 60 are provided to bond the metal plate 50 to the anisotropic graphite 30 and the ceramic substrate 70. Although the second bonding layer 40 and the third bonding layer 60 may be made of different materials, in the present example, the second bonding layer 40 and the third bonding layer 60 are made of the same conductive material, such as silver paste or silver solder, which has a high thermal conductivity. The second bonding layer 40 and the third bonding layer 60 may have any thickness. For example, both the second bonding layer 40 and the third bonding layer 60 has a thickness within a range from 0.02 mm to 0.05 mm. The second bonding layer 40 physically connects the anisotropic graphite 30 and the metal plate 50, and the third bonding layer 60 physically connects the metal plate 50 and the ceramic substrate 70. In the present embodiment, since the second bonding layer 40 is made of the conductive material, the anisotropic graphite 30 and the metal plate 50 are also electrically bonded by the second bonding layer 40.
The metal plate 50 corresponds to a first metal plate. The metal plate 50 has a plate shape, and is made of a metal material having higher thermal conductivity than the ceramic substrate 70 and at least the c-axis direction of the anisotropic graphite 30. The metal plate 50 is sandwiched between the anisotropic graphite 30 and the ceramic substrate 70 and bonded therebetween via the second bonding layer 40 and the third bonding layer 60. The metal plate 50 has a rectangular shape in a top view. Opposing two sides 51a of a surface 51 of the metal plate 50 extend along the X-axis, the other two opposing sides 51b of the surface 51 extend along the Y-axis, and a thickness direction of the metal plate 50 is along the Z-axis. The size of the metal plate 50 is the same as or larger than the anisotropic graphite 30, that is, the dimensions of the two sides 51a are the same as or larger than the two sides 31a of the anisotropic graphite 30, and the dimensions of the other two sides 51b are also the same as or larger than the two sides 31b of the anisotropic graphite 30. When viewed from the Z-axis direction, the anisotropic graphite 30 is arranged so as not to protrude from the metal plate 50. However, due to manufacturing errors, it is also acceptable that the two sides 51a of the metal plate 50 may be slightly smaller than the two sides 31a of the anisotropic graphite 30, or the two sides 51b of the metal plate 50 may be slightly smaller than the two sides 31b of the anisotropic graphite 30.
The metal material of the metal plate 50 includes, for example, gold, silver, copper, aluminum, molybdenum, or tungsten. The thickness of the metal plate 50 is preferably within a range from 0.2 mm to 3.0 mm, more preferably within a range from 1.0 mm to 2.0 mm, and much more preferably 1.5±0.1 mm. In the present disclosure, the range from 0.2 mm to 3.0 mm means a range that is 0.2 mm or more and 3.0 mm or less, and the range from 1.0 mm to 2.0 mm means a range that is 1.0 mm or more and 2.0 mm or less.
The ceramic substrate 70 is an insulating member disposed across the anisotropic graphite 30 from the semiconductor element 10. In other words, the anisotropic graphite 30 is disposed between the ceramic substrate 70 and the semiconductor element 10. The ceramic substrate 70 is made of an insulating plate-shaped member with high thermal conductivity, and is made of aluminum nitride or alumina, for example. The ceramic substrate 70 transfers heat generated by the semiconductor element 10 to the cooler 80 via the anisotropic graphite 30 and the metal plate 50 while insulating the metal plate 50, the anisotropic graphite 30, the semiconductor element 10, and the like from the cooler 80. The ceramic substrate 70 has a rectangular shape in a top view. Opposing two sides 71a of a surface 71 of the ceramic substrate 70 extend along the X-axis, the other two opposing sides 71b of the surface 71 extend along the Y-axis, and a thickness direction of the ceramic substrate 70 is along the Z-axis. The size of the ceramic substrate 70 is the same as or larger than the metal plate 50, that is, the dimensions of the two sides 71a are the same as or larger than the two sides 51a of the metal plate 50, and the dimensions of the other two sides 71b are also the same as or larger than the two sides 51b of the metal plate 50. The ceramic substrate 70 may have any thickness as long as the ceramic substrate 70 can restrict the creeping discharge. For example, the thickness of the ceramic substrate 70 is 0.32 mm.
The cooler 80 dissipates heat by exchanging heat with cooling water, air, or the like. The cooler 80 is made of, for example, a metal member. The cooler 80 may have any shape, and may include radiation fins or the like. The ceramic substrate 70 is attached to a surface of the cooler 80.
The semiconductor device according to the present embodiment is configured by the structure described above. Next, the operation and effects of the semiconductor device according to the present embodiment will be described.
As described above, in the semiconductor device according to the present embodiment, the metal plate 50 made of the metal plate-shaped member is disposed between the anisotropic graphite 30 and the ceramic substrate 70. Since the metal plate 50 made of the metal plate-shaped member, it becomes easier to transfer heat in the Y-axis direction of the anisotropic graphite 30, and it becomes easier to dissipate the heat generated by the semiconductor element 10. This makes it possible to reduce the thermal resistance of the semiconductor device. Hereinafter, the reason why such effects can be obtained will be explained based on simulation.
As shown in
On the other hand, in the semiconductor device of the present embodiment, it can be seen that the temperature at both ends of the anisotropic graphite 30 in the Y-axis direction is higher than that of the reference structure. This indicates that the heat generated by the semiconductor element 10 is sufficiently transferred in the Y-axis direction. In this way, in the semiconductor device of the present embodiment, the effect of transferring heat in the Y-axis direction in the anisotropic graphite 30 is high, and the heat generated by the semiconductor element 10 can be released. Therefore, it is possible to lower the thermal resistance of the semiconductor device.
It can be considered that the above-described difference is caused by whether or not the metal plate 50 is interposed between the anisotropic graphite 30 and the ceramic substrate 70. In the reference structure, since there is only the thin second bonding layer 40, it is difficult for heat transfer through the second bonding layer 40, and the heat transferred from the semiconductor element 10 is not sufficiently transferred in the direction of arrow A1 in
On the other hand, when the metal plate 50 is interposed as in the semiconductor device of the present embodiment, the heat transferred from the semiconductor element 10 to the anisotropic graphite 30 passes through the metal plate 50, as indicated by arrow A2 in
As described above, the thermal resistance can be lowered by providing the metal plate 50 as in the semiconductor device of the present embodiment. The present inventors also examined a preferable thickness of the metal plate 50. As a result, it was found that the thickness of the metal plate 50 and the thermal resistance of the semiconductor device have a relationship as shown in
Specifically, as shown in
Although the relationship between the thickness of the metal plate 50 and the thermal resistance varies slightly depending on the material of the metal plate 50 and the structure of the semiconductor device, the relationship is basically the same.
Therefore, in the semiconductor device of the present embodiment, the thickness of the metal plate 50 is preferably within the range from 0.2 mm to 3.0 mm, more preferably within the range from 1.0 mm to 2.0 mm, and much more preferably 1.5±0.1 mm.
As explained above, in the semiconductor device of the present embodiment, the metal plate 50 is provided between the anisotropic graphite 30 and the ceramic substrate 70. Accordingly, the heat can be transferred to the outer edge of the anisotropic graphite 30 via the metal plate 50. Specifically, it becomes possible to enhance the effect of transferring the heat in the Y-axis direction in the anisotropic graphite 30. Therefore, it is possible to lower the thermal resistance of the semiconductor device.
Specifically, when the thickness of the metal plate 50 is set to be within the range from 0.2 mm to 3.0 mm, preferably within the range from 1.0 mm to 2.0 mm, it is possible to reduce the thermal resistance of the semiconductor device. Especially when the thickness of the metal plate 50 is set to 1.5±0.1 mm, the thermal resistance of the semiconductor device can be further reduced.
The following describes a second embodiment. The present embodiment is different from the first embodiment in that a configuration between the semiconductor element 10 and the anisotropic graphite 30 is changed, and the remaining configurations are the same as those in the first embodiment. Therefore, only the different configuration will be explained.
As shown in
Specifically, the metal plate 90 is bonded to the surface 31 of the anisotropic graphite 30 via a fourth bonding layer 100. The metal plate 90 has a rectangular shape in a top view. Opposing two sides 91a of a surface 91 of the metal plate 90 extend along the X-axis, the other two opposing sides 91b of the surface 51 extend along the Y-axis, and a thickness direction of the metal plate 90 is along the Z-axis. Then, the semiconductor element 10 is bonded to the surface 91 of the metal plate 90 via the first bonding layer 20. The semiconductor element 10 is located approximately at the center of surface 91 of the metal plate 90. Note that the materials that can constitute the fourth bonding layer 100 are the same as those for the second bonding layer 40 and the third bonding layer 60.
In this manner, by disposing the metal plate 90 also between the semiconductor element 10 and the anisotropic graphite 30, the heat can be transferred while spreading in the Y-axis direction also in the metal plate 90. Therefore, in addition to the metal plate 50, the metal plate 90 can also promote heat transfer in the Y-axis direction, and it is possible to further reduce the thermal resistance of the semiconductor device.
The following describes a third embodiment. The present embodiment is different from the first and second embodiments in that a configuration around the anisotropic graphite 30 is changed, and the remaining configurations are the same as those in the first and second embodiments. Therefore, only the different configuration will be explained. Although a case where the configuration of the present embodiment is applied to the first embodiment will be described here, the configuration of the present embodiment can also be applied to the second embodiment.
As shown in
The materials that can constitute the metal plate 90 are the same as those for the metal plate 50. The metal plate 110 may be made of the same material and may have the same thickness and the same dimensions as the metal plate 50, or the metal plate 110 may be made of a different material and may have a different thickness and different dimensions from the metal plate 50. In the present example, the metal plate 90 is made of the same material and has the same thickness and the same dimensions as the metal plate 50. Note that a thickness direction of the metal plate 110 is the normal direction of each of the side surfaces 32 covered by the metal plate 110.
Specifically, the metal plate 110 is bonded to the side surfaces 32 of the anisotropic graphite 30 via a bonding layer 120 corresponding to a side surface bonding layer. The metal plate 110 has a rectangular shape when viewed from a direction along the thickness direction, and each side has a size corresponding to each side of the side surfaces 32 of the anisotropic graphite 30. Note that the materials that can constitute the bonding layer 120 are the same as those for the second bonding layer 40 and the third bonding layer 60.
In this way, when the metal plate 110 is disposed to cover the side surfaces 32 of the anisotropic graphite 30, heat is transferred through the metal plate 110, and heat spreads easily in the Y-axis direction. Therefore, in addition to the metal plate 50, the metal plate 110 can also promote heat transfer in the Y-axis direction, and it is possible to further reduce the thermal resistance of the semiconductor device.
While the present disclosure has been described in accordance with the embodiments described above, the present disclosure is not limited to the embodiments and includes various modifications and equivalent modifications. In addition, various combinations and forms, and further, other combinations and forms including only one element, or more or less than these elements are also within the sprit and the scope of the present disclosure.
For example, in each of the above-described embodiments, the ceramic substrate 70 is used as the insulating member, but the insulating member is not limited to the ceramic substrate 70, but may be made of other insulating materials.
In each of the above embodiments, an example has been described in which one semiconductor element 10, one anisotropic graphite 30, one metal plate 50, and one ceramic substrate 70 are regarded as one set of semiconductor device, and the one set of semiconductor device is joined to one cooler 80. However, this is just an example, and a configuration in which two or more sets of semiconductor devices are joined to one cooler 80 may also be adopted.
In each of the above embodiments, an example has been described in which one semiconductor element 10 is disposed for one anisotropic graphite 30, one metal plate 50, and one ceramic substrate 70. However, also in this case, a configuration in which two semiconductor elements 10 are disposed for one anisotropic graphite 30, one metal plate 50, and one ceramic substrate 70 may also be adopted. For example, when the semiconductor elements 10 constitute semiconductor switching elements of an upper arm and a lower arm of an inverter circuit, the semiconductor elements 10 of the upper arm and the lower arm are connected in series. In such a case, one semiconductor element 10 can be connected in series by mounting the other semiconductor element 10 upside down on the surface of the anisotropic graphite 30.
The shapes of the semiconductor element 10, the anisotropic graphite 30, the metal plate 50, and the ceramic substrate 70 in the top view do not necessarily have rectangular shapes. For example, each corner or a part of the corners of the rectangular shapes may be cut out.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2023-094864 | Jun 2023 | JP | national |
