Claims
- 1. A semiconductor device comprising:
- a semiconductor substrate of a first conductivity type, said substrate having opposed sides;
- a first impurity region of a second conductivity type formed in one side of said semiconductor substrate, said first impurity region and said substrate forming a PN junction therebetween, said PN junction having a curved portion such that said PN junction extends from a predetermined depth of said substrate to said one side of said substrate;
- a first highly doped impurity region of the first conductivity type formed in the other side of said semiconductor substrate opposite said first impurity region and satisfying:
- t1.ltorsim.T.ltorsim.t1+2W0,
- where t1 is the width of the first impurity region,
- T is the width of the first highly doped impurity region, and
- W0 is the separation, in the depth direction, between said first impurity region and said first highly doped impurity region.
- 2. The semiconductor device as in claim 1, further including:
- a second highly doped impurity region of the first conductivity type formed adjacent said first highly doped impurity region in the other side of said semiconductor substrate and formed to be shallower than said first highly doped impurity region.
- 3. The semiconductor device of claim 1, wherein said first highly doped impurity region has a centerline coincident with that of said first impurity region.
- 4. The semiconductor device as in claim 3, further including:
- a second highly doped impurity region of the first conductivity type formed adjacent said first highly doped impurity region in the other side of said semiconductor substrate and formed to be shallower than said first highly doped impurity region.
- 5. The semiconductor device as in claim 1 further including:
- a guard ring region of the second conductivity type is formed surrounding said first impurity region.
- 6. The semiconductor device as in claim 1, further including:
- a resistive field plate formed so as to surround said first impurity region.
Priority Claims (1)
Number |
Date |
Country |
Kind |
59-200106 |
Sep 1984 |
JPX |
|
Parent Case Info
This application is a continuation of application Ser. No. 774,718, filed on Sept. 11, 1985, now abandoned.
US Referenced Citations (2)
Number |
Name |
Date |
Kind |
4412378 |
Shinada |
Nov 1983 |
|
4452645 |
Chu et al. |
Jun 1984 |
|
Foreign Referenced Citations (2)
Number |
Date |
Country |
0061551 |
Sep 1982 |
EPX |
0061063 |
Aug 1983 |
EPX |
Non-Patent Literature Citations (1)
Entry |
Jan W. Slotboom, "Computer-Aided Two-Dimensional Analysis of Bipolar Transistors", IEEE Transactions on Electron Devices, vol. Ed-20, No. 8, pp. 669-679, Aug. 1973. |
Continuations (1)
|
Number |
Date |
Country |
Parent |
774718 |
Sep 1985 |
|