Claims
- 1. A method of manufacturing a semiconductor light-emitting device, the method comprising:forming a first semiconductor layer made of group III-V gallium nitride compound semiconductor doped with impurities of high density and having n-type conduction; laminating a second semiconductor layer on said first semiconductor layer, said second semiconductor layer being made of group III-V gallium nitride compound semiconductor doped with impurities of lower density than said first semiconductor layer and having n-type conduction; laminating a light-emitting layer of superlattice structure on said second semiconductor layer, said light-emitting layer including a plurality of barrier layers of InY1Ga1−YN (Y1≧0) and a plurality of quantum well layers of InY2Ga1−Y2N (Y2>Y1, Y2>0) alternately laminated with each other; laminating a third semiconductor layer on said light-emitting layer, said third semiconductor layer being made of group III-V gallium nitride compound semiconductor doped with impurities and having p-type conduction, said third semiconductor layer having a broader band gap than said barrier layer of said light-emitting layer; laminating a fourth semiconductor layer on said third semiconductor layer, said fourth semiconductor layer being made of group III-V gallium nitride compound semiconductor doped with impurities of higher density than said third semiconductor layer and having p-type conduction; disposing a first electrode on said first semiconductor layer; electrically coupling said first electrode with said first semiconductor layer; disposing a second electrode on said fourth semiconductor layer; and electrically coupling said second electrode with said fourth semiconductor layer.
- 2. A method according to claim 1, wherein at least one of said barrier layer and said quantum well layer does not contain impurities intentionally doped.
- 3. A method according to claim 1, wherein an uppermost barrier layer, which is an uppermost layer of the light-emitting layer, is formed thicker than the other barrier layers.
- 4. A method according to claim 3, wherein during laminating of the second semiconductor layer, an upper surface of the uppermost barrier layer is caused to disappear and the uppermost barrier layer is made to have substantially the same thickness as the other barrier layers.
Priority Claims (2)
Number |
Date |
Country |
Kind |
8-299404 |
Oct 1996 |
JP |
|
8-257819 |
Sep 1996 |
JP |
|
Parent Case Info
This application is a divisional of U.S. application Ser. No. 09/922,687, filed Aug. 7, 2001 now U.S. Pat. No. 6,420,733, which is a divisional of U.S. application Ser. No. 09/497,814, filed Feb. 3, 2000, now U.S. Pat. No. 6,326,236, which is a divisional of U.S. application Ser. No. 08/925,325, filed Sep. 8, 1997, now U.S. Pat. No. 6,040,588.
US Referenced Citations (12)