The present invention contains subject matter related to Japanese Patent Application JP 2006-241410 filed in the Japanese Patent Office on Sep. 6, 2006, the entire contents of which being incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor light-emitting device including a semiconductor layer and a first electrode on one surface of a substrate and a second electrode on the other surface of the substrate, and a method of manufacturing the semiconductor light-emitting device.
2. Description of the Related Art
A coating film is formed on an end surface of a laser diode to prevent oxidation and adhesion of contamination and control reflectivity. For example, as shown in
However, in the above-described method in related arts, there is an issue such as low workability, or easily damaging or contaminating the electrodes.
In view of the foregoing, it is desirable to provide a semiconductor light-emitting device capable of preventing fusion bonding between electrodes and damage to electrodes, and a method of manufacturing the semiconductor light-emitting device.
According to an embodiment of the invention, there is provided a semiconductor light-emitting device including a semiconductor layer and a first electrode on a first surface of a semiconductor substrate in order from the semiconductor substrate side and a second electrode on a second surface of the semiconductor substrate, the semiconductor layer including a light-emitting region, the first electrode being arranged corresponding to at least the light-emitting region, wherein a recessed section with a depth larger than the thickness of the second electrode is arranged on the second surface, thereby a step section projected from the recessed section is formed in a region other than the recessed section in the second surface, and the second electrode is formed on at least the recessed section of the second surface.
Here, “a recessed section” is not limited to a section surrounded by a step section such as a groove or a hole, and includes, for example, the case where a columnar-shaped or ridge-shaped step section is surrounded by a planar section, and the top surface of the planar section is positioned lower than the top surface of the step section as a concept.
According to an embodiment of the invention, there is provided a method of manufacturing a semiconductor light-emitting device, the semiconductor light-emitting device including a semiconductor layer and a first electrode on a first surface of a semiconductor substrate and a second electrode on a second surface of the semiconductor substrate, the semiconductor layer including a light-emitting region, the method comprising the steps of after forming the semiconductor layer on the first surface, forming the first electrode on the first surface so as to correspond to at least the light-emitting region; arranging a recessed section with a depth larger than the thickness of the second electrode on the second surface so as to form a step section projected from the recessed section in a region other than the recessed section in the second surface; forming the second electrode on at least the recessed section of the second surface; forming a plurality of bars by cutting the semiconductor substrate; and stacking the plurality of bars so that the first electrode and the second electrode face each other, and forming a coating film on a cutting surface.
In the semiconductor light-emitting device according to the embodiment of the invention or the method of manufacturing a semiconductor light-emitting device according to the embodiment of the invention, a recessed section with a depth larger than the thickness of the second electrode is arranged on the second surface of the semiconductor substrate, and the second electrode is formed on the recessed section, so in the case where a plurality of bars are stacked, contact between the first electrode and the second electrode can be prevented, thereby fusion bonding between electrodes or damage to electrodes can be prevented.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
Preferred embodiments will be described in detail below referring to the accompanying drawings.
The substrate 10 is made of, for example, n-type GaAs doped with an n-type impurity such as silicon (Si) or selenium (Se). The n-type cladding layer 21 has a thickness in a laminating direction (hereinafter simply referred to as “thickness”) of 1.4 μm, and is made of n-type (Al0.70Ga0.3)0.5In0.5P mixed crystal doped with an n-type impurity such as silicon or selenium. The active layer 22 has, for example, a thickness of 30 nm, and has a multiquantum well structure in which GaInP mixed crystal layers and AlGaInP mixed crystal layers are laminated alternately. The p-type cladding layer 23 has, for example, a thickness of 1.3 μm, and is made of p-type (Al0.70Ga0.3)0.5In0.5P mixed crystal doped with a p-type impurity such as zinc or magnesium. The p-side contact layer 24 has, for example, a thickness of 0.3 μm, and is made of p-type GaAs doped with a p-type impurity such as zinc or magnesium.
The p-side contact layer 24 and the p-type cladding layer 23 are partially removed by etching to form a thin strip-shaped projection section (ridge) 25, and a region corresponding to the projection section 25 in the active layer 22 is a light-emitting region (current injection region) 22A.
A p-side electrode 30 is formed on a surface of the p-side contact layer 24 with an insulating film (not shown) made of silicon dioxide in between. For example, the p-side electrode 30 has a configuration in which titanium (Ti), platinum (Pt) and gold (Au) are laminated in order, and is arranged on the whole surfaces of the p-side contact layer 24 and the insulating film, and the p-side electrode 30 is electrically connected to the p-side contact layer 24 through an opening (not shown) arranged in the insulating film.
A recessed section 12A is arranged on the second surface 12 of the substrate 10, and a region other than the recessed section 12A is a step section 12B projected from the recessed section 12A. An n-side electrode 40 is formed inside the recessed section 12A, for example, on a bottom surface of the recessed section 12A. Therefore, in the laser diode, in the case where LD bars are stacked, the step section 12B acts as a spacer, so fusion bonding between the n-side electrode 40 and the p-side electrode 30 or damage to the n-side electrode 40 and the p-side electrode 30 can be prevented.
The depth D of the recessed section 12A is larger than the thickness T of the n-side electrode 40. Moreover, the depth D of the recessed section 12A is more preferably larger than the total of the thickness T of the n-side electrode 40 and the height H of a step formed by the projection section 25 and the p-side electrode 30. However, when the recessed section 12A has a too large depth, cleavage precision may decline, or it may be difficult to mount the laser diode in a package, so, for example, the depth D of the recessed section 12A is preferably approximately a few μm. Further, the width W of the recessed section 12A is preferably larger than the width W25 of the projection section 25.
The step section 12B is preferably arranged on a boundary line M of adjacent chip regions 1 and not on a region 12C facing the light-emitting region 22A in the second surface 12. It is because in the case where the LD bars are stacked, the p-side electrode 30 on the light-emitting region 22A can be prevented from being damaged by contact with the step section 12B.
The n-side electrode 40 has, for example, a configuration in which AuGe:Ni and gold (Au) are laminated in order, and are alloyed by a heat treatment, and the n-side electrode 40 is electrically connected to the substrate 10. The n-side electrode 40 may be formed on not only the bottom surface of the recessed section 12A but also a side surface or a part of a side surface of the recessed section 12A.
Further, in the laser diode, a main-emission-side end surface 10F and a rear end surface 10R which face each other in a resonator direction are a pair of resonator end surfaces. Coating films 50F and 50R as a pair of reflecting mirror films are formed on the main-emission-side end surface 10F and the rear end surface 10R, respectively, and the coating film 50F is adjusted so as to have low reflectivity, and the coating film 50R is adjusted so as to have high reflectivity. Thereby, light emitted from the active layer 22 travels between the coating films 50F and 50R so as to be amplified, and the amplified light is emitted from the coating film 50F with low reflectivity as a laser beam.
For example, the laser diode can be manufactured by the following steps.
FIGS. 3 to 6 show steps in a method of manufacturing the laser diode according to the embodiment. At first, as shown in
Next, referring again to
Next, the insulating film made of the above-described material is formed on the p-side contact layer 24 and the p-type cladding layer 23 by, for example, evaporation or a CVD method, and an opening corresponding to the p-side contact layer 24 is formed in the insulating film. After that, referring again to
After the p-side electrode 30 is formed, as shown in
After the recessed section 12A is formed on the second surface 12, as shown in
After the n-side electrode 40 is formed, the substrate 10 is cut by cleavage into a plurality of LD bars with a predetermined size. Next, as shown in
In the laser diode, when a predetermined voltage is applied between the n-side electrode 40 and the p-side electrode 30, a current is injected into the light-emitting region 22A of the active layer 22, thereby light is emitted by electron-hole recombination. The light is reflected by the coating films 50F and 50R as a pair of reflecting mirror films, and the light travels between the coating films 50F and 50R to cause laser oscillation, and the light is emitted to outside as a laser beam. In this case, the recessed section 12A for forming the n-side electrode 40 is arranged on the second surface 12 of the substrate 10, so an influence to laser characteristics due to arranging the recessed section 12A can be reduced to a very small level.
Thus, in the embodiment, the recessed section 12A with the depth D which is larger than the thickness T of the n-side electrode 40 is arranged on the second surface 12 of the substrate 10, and the n-side electrode 40 is formed inside the recessed section 12A, so in the case where the LD bars are stacked, the step section 12B acts as a spacer to prevent contact between the p-side electrode 30 and the n-side electrode 40, thereby fusion bonding between electrodes or damage to the electrodes can be prevented. Moreover, unlike related arts, when the LD bars are stacked, it is not necessary to insert a silicon (Si) chip between the LD bars, so manufacturing steps can be simplified, and workability can be improved. Further, the recessed section 12A for forming the n-side electrode 40 is arranged on the second surface 12 of the substrate 10, so an influence to laser characteristics due to arranging the recessed section 12A can be reduced to a very small level.
In the above-described embodiment, the case where the p-side electrode 30 is arranged on the whole surfaces of the p-side contact layer 24 and the insulating film, and the n-side electrode 40 is arranged on the bottom surface of the recessed section 12A is described; however, the planar shapes of the p-side electrode 30 and the n-side electrode 40 is not specifically limited as long as contact between the LD bars can be prevented in the case where the LD bars are stacked. For example, as shown in
Moreover, in the above-described embodiment, the case where the step section 12B is arranged on the boundary line M of adjacent chip regions 1 is described; however, the degree of freedom of the planar shapes or the positions of the recessed section 12A and the step section 12B is high, and the planar shapes or the positions of the recessed section 12A and the step section 12B are not limited to the case of the above-described embodiment. Modifications in which the planar shapes of the recessed section 12A and the step section 12B are different will be described below.
(Modification 1)
(Modification 2)
In the modification, as shown in
(Modification 3)
(Modification 4)
(Modification 5)
Modification 5 shown in
(Modification 6)
Further, as an application of Modification 5, as shown in
The n-type cladding layer 21, the active layer 22, the p-type cladding layer 23, the p-side contract layer 24 and the p-side electrode 30 on the first surface 11 of the substrate 10 are formed by the same manner as that in the first embodiment. The current confinement layer 26 is made of, for example, n-type GaAs doped with an n-type impurity such as silicon or selenium.
The recessed section 12A and the step section 12B are formed on the second surface 12 of the substrate 10 as in the case of the first embodiment, and the n-side electrode 40 is formed inside the recessed section 12A. As in the case of the first embodiment, the depth D of the recessed section 12A is larger than the thickness T of the n-side electrode 40, and the depth D is preferably larger than the total of the thickness T of the n-side electrode 40 and the height H of a step formed by the projection section 25 and the p-side electrode 30. However, in the embodiment, the current confinement layers 26 are arranged on both sides of the projection section 25, and the height H is reduced, so in many cases, it is sufficient that the depth D of the recessed section 12A is larger than the thickness T of the n-side electrode 40. Moreover, as in the case of the first embodiment, the width W of the recessed section 12A is preferably larger than the width W25 of the projection section 25.
As in the case of the first embodiment, the step section 12B is preferably arranged, for example, on the boundary line M of adjacent chip regions 1 and not on the region 12C facing the light-emitting region 22A in the second surface 12. It is because in the case where the LD bars are stacked, the p-side electrode 30 on the light-emitting region 22A can be prevented from being damaged by contact with the step section 12B.
The n-side electrode 40 and the coating films 5OF and 5OR are formed by the same manner as in the first embodiment.
The laser diode can be manufactured by the same manner as that in the first embodiment, except that after the projection section 25 is formed using a mask layer (not shown) made of, for example, silicon dioxide, the current confinement layers 26 are formed on both sides of the projection section 25 by selective epitaxial growth using the same mask layer, and functions and effects in the embodiment are the same as those in the first embodiment.
In the embodiment, as shown in
In the embodiment, as shown in
Although the present invention is described referring to the embodiments, the invention is not limited to the embodiments, and can be variously modified. For example, in the above-described embodiments, the case where the step section 12B is arranged on both sides of the boundary lines M of adjacent chip regions 1 is described; however, as shown in
Moreover, for example, the material, the thickness, the forming method and the forming conditions of each layer described in the above embodiments are not limited to those described above, and the layer may be made of any other material with any other thickness, and the layer may be formed by any other forming method under any other forming conditions. For example, the material of the active layer 22 may be any other Group III-V compound semiconductor such as AlGaInP mixed crystal. As a Group III element, at least one kind selected from the group consisting of aluminum (Al), gallium (Ga) and indium (In) is cited, and as a Group V element, at least one kind selected from the group consisting of nitrogen (N), phosphorus (P) and arsenic (As) is cited.
Further, for example, in the above embodiments, a red laser including a semiconductor layer made of an AlGaInP-based compound semiconductor on the substrate 10 made of GaAs is described as an example; however, the invention is applicable to a laser including a semiconductor layer made of any other material based-semiconductor such as a GaAs-based semiconductor (infrared: 780 nm to 850 nm) or a GaN-baed semiconductor (oscillation wavelength typically from 400 nm to 500 nm). Moreover, the substrate 10 may be made of GaN or GaP.
In addition, in the above embodiments, the laser diode having the configuration in which the n-type semiconductor layer, the active layer and the p-type semiconductor layer are laminated in order on the n-type substrate 10 is described; however, the laser diode may have a reverse conductive type configuration in which a p-type substrate is used, and a p-type semiconductor layer, an active layer and an n-type semiconductor layer are laminated on the p-type substrate.
For example, in the above embodiments, the configuration of the laser diode is described referring to specific examples; however, the laser diode does not necessarily include all layers, or may further include any other layer. For example, guide layers for optical confinement may be arranged between the n-type cladding layer 21 and active layer 22 and between the active layer 22 and the p-type cladding layer 23.
The invention is applicable to not only a refractive index-guiding type laser diode including the projection section 25 described in the above embodiments but also a gain-guiding type laser diode.
Moreover, Modifications 1 to 6 are applicable to the laser diodes according to the second embodiment and the third embodiment.
Further, the invention is applicable to not only laser diodes but also semiconductor light-emitting devices including a coating film on an end surface formed by cutting a substrate such as LEDs (Light Emitting Diodes), and the invention is applicable to methods of manufacturing the semiconductor light-emitting devices.
It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.
Number | Date | Country | Kind |
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2006-241410 | Sep 2006 | JP | national |