This application is based upon and claims the benefits of priorities from the prior Japanese Patent Application No. 2005-063400, filed on Mar. 8, 2005; the entire contents of which are incorporated herein by reference.
1. Field of the Invention
This invention relates to a semiconductor light emitting device, a semiconductor light emitting apparatus, and a method of manufacturing a semiconductor light emitting device, and more particularly to a semiconductor light emitting device with improved external light extraction efficiency, a semiconductor light emitting apparatus based thereon, and a method of manufacturing this semiconductor light emitting device.
2. Background Art
There is a continuing demand for semiconductor light emitting apparatuses with high brightness and high external extraction efficiency for use in backlights of liquid crystal displays, push button lamps of mobile phones, car dashboard displays, and traffic lights. In these semiconductor light emitting apparatuses, a semiconductor light emitting device (hereinafter referred to as LED) is mounted within a package, which is filled with sealing resin to cover the LED chip. An epoxy-based resin or silicone resin, for example, is often used for the sealing resin.
Epoxy-based resin has a refractive index of about 1.5. On the other hand, in the LED, an InGaAIP-based material is primarily used for the visible band, whereas a GaN-based material is primarily used for the wavelength bands of ultraviolet to blue light. InGaAIP has a refractive index of about 3.3, and GaN has a refractive index of about 2.5. The large difference of refractive index relative to epoxy-based resin causes reflection at the interface and total reflection in accordance with Snell's law. As a result, in particular, the external light extraction efficiency at the upper face of the LED is decreased.
In this respect, a structure has been proposed that provides fine asperities on the LED surface to reduce total reflection, thereby improving the external extraction efficiency (e.g., JP 2003-209283A). In this structure, while the asperities have a fine pitch, reflection and refraction of light obeys geometrical optics, which treats light as a light flux that travels in a straight line. In this case, since a light flux is emitted with wider angles at the asperity cross section, the angle range for total reflection is narrowed, thereby improving the light extraction efficiency. However, the limitations of fine patterning processes make it extremely difficult to sufficiently decrease the asperity pitch relative to half the wavelength.
More specifically, in the above example, electron beams (EB) or X-rays are used to delineate a fine etching mask, which is used in turn to form a fine asperity pattern. This is a sophisticated and complex process, involving problems in uniformity, productivity, and reproducibility of characteristics.
According to an aspect of the invention, there is provided a semiconductor light emitting device comprising:
According to other aspect of the invention, there is provided a semiconductor light emitting device comprising:
According to other aspect of the invention, there is provided a semiconductor light emitting apparatus comprising:
According to other aspect of the invention, there is provided a method of manufacturing a semiconductor light emitting device comprising:
Embodiments of the invention will now be described with reference to the drawings.
The semiconductor light emitting apparatus shown in
Next, the structure of the LED 5 is described.
As illustrated in
On the other hand, for light emission in the wavelength bands of ultraviolet to blue light, the double heterostructure is made of GaN-based materials.
As shown in
When an InGaAIP layer is used for the current diffusion layer 14, its refractive index is about 3.3. The epoxy-based sealing resin 26, having a refractive index of about 1.5, causes a large difference of refractive index. This results in high reflectance at its interface, and total reflection is more likely to occur, thus preventing improvement of the external extraction efficiency. However, in this example, an aluminum nitride (AIN) layer 12 having asperities is provided on top of the current diffusion layer 14 outside the region where the top electrode 10 is provided. Preferably, the asperities of the aluminum nitride layer 12 have a pitch of not more than half the in-medium wavelength of aluminum nitride for light emitted from the active layer 18, and have a height of 500 nm or more. Note that the in-medium wavelength is given by (free space wavelength)/(refractive index). Here, the refractive index of aluminum nitride is about 2.0.
When the asperities of the aluminum nitride layer 12 have a pitch of not more than half the in-medium wavelength, the law no longer holds that light is a light flux traveling in a straight line in accordance with geometrical optics, but wave optics involving diffraction is required for addressing this situation. In particular, when the asperity pitch is sufficiently smaller than the wavelength, the wave nature is further enhanced. As a result, Snell's law does not hold in individual regions of asperities, but it is rather reasonable to treat reflection and transmission of emitted light by assuming that the region is filled with a medium having a refractive index that effectively and continuously varies between the epoxy-based sealing resin 26 and the aluminum nitride layer 12. In fact, an approach based on the effective refractive index is preferred because it is extremely difficult to perform an exact calculation on diffraction phenomena associated with the wave nature in terms of electromagnetism.
Furthermore, as described later in detail, the height of asperities is preferably set to 500 nm or more in order that the asperities of the aluminum nitride layer 12 have a pitch of not more than half the in-medium wavelength.
The aluminum nitride layer 12 is shaped as asperities having a pitch P and a height H, which are filled with an epoxy-based sealing resin 26 from above. The vertical axis X represents the upward distance from the origin located at the boundary between the current diffusion layer 14 and AIN. As described above, preferably, the asperities have a height H of 500 nm or more and a pitch P of not more than half the wavelength.
In the case of this LED 5, light emitted from the active layer 18 passes through the current diffusion layer 14 and is incident on AIN. For an emission wavelength of 660 nm and assuming that the medium is AIN with a refractive index of 2.0, the in-medium wavelength is 660 nm/2.0=330 nm. Therefore, it is preferred to set the pitch P to 165 nm or less.
Thus, in this example, the pitch P is determined by taking into consideration the emission wavelength and the refractive index of the medium. As described later in detail, the layer thickness and the film formation condition for the aluminum nitride layer 12 are determined so that the average crystal grain diameter obtained is comparable to this pitch P.
In the figure, X=0 refers to the boundary between the current diffusion layer 14 and the aluminum nitride layer 12. More specifically, X=0 denotes the boundary where the refractive index changes from the refractive index 3.3 of InGaAIP constituting the current diffusion layer 14 to the refractive index 2.0 of AIN. However, reflection is low at X=0 because the refractive index difference is smaller relative to the case where the current diffusion layer 14 is in contact with the epoxy-based sealing resin 26.
On the other hand, the effective refractive index N is 1.5 at X=X2, and continuously varies between 2.0 and 1.5 as a function of X in the range of X1 to X2. The refractive index difference is as small as 0.5 at X=X2, where reflection is therefore very low. The region of X1 to X2 is a region where the reflectance is not determined by geometrical optics from the shape of individual asperities because light behaves in accordance with wave optics. That is, it is reasonable to regard this region as a graded index region because of the continuous variation of refractive index.
As a result, the reflectance is reduced, and thereby the external light extraction efficiency is improved. For comparison, a semiconductor laser is taken for illustration. In a semiconductor laser, the reflectance can be reduced by providing a dielectric between its light emitting layer and the external space, the dielectric having an intermediate refractive index.
In general, for edge emission from a semiconductor laser, the reflectance R at the interface is given by the following equation:
R=(NE2−NE1)2/(NE2+NE1)2 (1)
where NE2 is the equivalent refractive index of the semiconductor laser, and NE1 is the equivalent refractive index of the external dielectric.
Equation (1) means that reflection depends on the refractive index difference squared. Therefore, the overall reflectance can be reduced by providing a dielectric film having an intermediate refractive index. For example, a semiconductor laser emitting coherent plane waves perpendicularly from its edge into the external space of air typically has a reflectance of about 30%. In contrast, the reflectance can be reduced to about 10% by interposing SiO2 having a size of about a quarter wavelength
On the other hand, an LED emits incoherent light, which is emitted at a wide range of angles. Therefore, as with the semiconductor laser, the reflectance can be reduced by providing an intermediate refractive index layer, although quantitative estimation is difficult.
In the first example, the reflectance is reduced in accordance with the effective refractive index of the graded index type as illustrated in
Next, a method of manufacturing a semiconductor light emitting apparatus of this example is described.
FIGS. 5 to 8 are process cross sections and cross-sectional photographs illustrating the relevant part of a process of manufacturing a semiconductor light emitting apparatus of this example. Here, an InGaAIP-based semiconductor light emitting apparatus for visible light is taken for illustration.
First, as illustrated in
Furthermore, an aluminum nitride (hereinafter AIN) film 11 is formed on the current diffusion layer 14 and the top electrode 10 (on which an insulating film 13 may be provided) by such methods as sputtering or CVD. In this situation, AIN, being hexagonal, is formed as a columnar polycrystal oriented so that their crystalline axes perpendicular to the major surface of the substrate are c-axis. Upon investigation by the inventor, when the film thickness of the AIN film 11 is 500 nm or less, the average crystal grain diameter is as small as 50 nm or less. This tendency does not significantly depend on the deposition condition. This is presumably because the melting point of AIN as high as about 3000° C. prevents migration in the growth process. When the film thickness of the AIN film 11 is 500 nm or more, the crystal grain diameter increases with crystal growth in the c-axis direction. The crystal grain diameter can be increased to about 100 nm, with the average grain diameter being 50 nm or more.
An example growth condition for the AIN film 11 in the case of radio-frequency sputtering is as follows: Ar/N2 flow rate=15 sccm/100 sccm, RF power=5 kW, pressure=3.3 mPa, and substrate temperature=200° C. It is understood that the grain diameter is about 100 nm since the film thickness is as large as 500 nm or more.
Next, as shown in
More specifically, the grain boundary of the AIN film 11 can be selectively etched to form an asperity-like AIN layer 12. Selective etching along the crystal grain boundary of AIN can be performed by RIE (reactive ion etching) under the etching condition that the gas flow rate ratio of Cl2 to BCl3 is Cl2/BCl3>0.5. In this way, AIN can be processed to have a graded index by selectively etching the crystal grain boundary.
An example etching condition in the case of RIE method can be as follows: Cl2/BCl3 flow rate=60 sccm/19 sccm, RF power=200 W, and pressure=20 mTorr (15 Pa). By performing etching in this condition, etching proceeds along the grain boundary of the AIN film 11. As a result, the average pitch P of asperities of the AIN layer 12 formed by etching has a size corresponding to the crystal grain diameter. As shown in
Note that CDE (chemical dry etching) or alkali-based wet etching can also be used instead of RIE to selectively etch the crystal grain boundary.
Subsequently, the LED 5 illustrated in
Next, the LED 5 is installed in a package.
The LED 5 is mounted on a first lead 32 with an adhesive such as gold-tin (AuSn) or other metal eutectic solder (not shown) or silver paste. Furthermore, the LED 5 is connected to a second lead 30 via a bonding wire 38. The LED 5 and the bonding wire 38 are then sealed with a sealing resin 26. In this way, the semiconductor light emitting apparatus illustrated in
In addition to the method described above, other processes for forming an asperity-like AIN layer 12 may be contemplated. For example, there is a method of processing an AIN layer by using a fine patterned mask created by delineation with light or electron beams (EB). However, this fine patterning process has disadvantages in productivity and cost because it is based on a sophisticated photolithography technology.
On the other hand, there is another process based on block copolymers. More specifically, the phenomenon of interphase separation between the polystyrene (PS) phase and the polymethylene methacrylate (PMMA) phase can be used to form a fine mask. However, this method requires heat treatment for long periods of time for interphase separation. Furthermore, it is not easy to control the size and pitch of the mask. That is, it has disadvantages in throughput and productivity.
However, in the present example, fine asperities of not more than half the wavelength can be formed by a highly productive manufacturing device based on such technologies as sputtering and RIE without any sophisticated photolithography or interphase separation technology in a short period of processing time. The process of this example is superior in process controllability and reproducibility, which allows the semiconductor light emitting apparatus to have uniform characteristics. Furthermore, it is also superior in productivity because it does not need any sophisticated photolithography technology.
While
Next, a second example of the invention is described.
In this example, the AIN layer 12 and the directly underlying surface layer of the current diffusion layer 14 are shaped as asperities. This structure is obtained as follows. In the etching process of the first example described above with reference to
In this example, since it is important to partially transfer the asperity configuration of the AIN layer 12 to the current diffusion layer 14, the etching selection ratio of the AIN layer 12 and the current diffusion layer 14 is preferably close to unity. BCl3 and Ar gas, or SiCl4 and Ar gas, for example, can be used to perform etching by RIE when the current diffusion layer 14 is made of InGaAIP. By means of such etching, the current diffusion layer 14 and the AIN layer 12 is provided with asperities having nearly uniform pitch P and height H.
In this example, the lower portion of the asperities has a graded index structure of the InGaAIP layer having a refractive index of 3.3 and the sealing resin 26 having a refractive index of 1.5. The upper portion of the asperities has a graded index structure of the AIN layer 12 having a refractive index of 2.0 and the sealing resin 26 having a refractive index of 1.5. At the interface between these two different graded index structures, that is, at the interface between the current diffusion layer 14 and the AIN layer 12, the refractive index varies discontinuously. However, since this variation is relatively small, the increase of reflectance can also be limited to a relatively small extent.
As described above, in this example, the asperities of the AIN layer 12 can be partially transferred to the current diffusion layer 14 to form a graded index structure, thereby improving the light extraction efficiency.
Note that in this example, the pitch of the asperities is preferably not more than half the InGaAIP in-medium wavelength. This is because InGaAIP has the largest refractive index and hence the shortest in-medium wavelength among InGaAIP, AIN, and the sealing resin. For an emission wavelength of 660 nm and assuming that the medium is InGaAIP with a refractive index of 3.3, the in-medium wavelength is 660 nm/3.3=200 nm. Therefore, it is preferred to set the asperity pitch P to 100 nm or less.
While the current diffusion layer 14 provided as an upper layer of the semiconductor multilayer structure is made of InGaAIP and the like, a contact layer made of GaAs and the like, for example, may be provided between the current diffusion layer 14 and the top electrode 10 in order to form an ohmic contact therebetween. In this case, the asperities may be formed in the contact layer instead of the current diffusion layer 14, or the asperities may be formed both in the contact layer and the current diffusion layer 14.
While
Next, a third example of the invention is described.
In this example, the surface layer of the current diffusion layer 14 is shaped as asperities. This asperity structure 15 is obtained as follows. In the etching process of the first example described above with reference to
More specifically, as shown in
In this example as well, since it is important to transfer the asperity configuration of the AIN layer 12 to the current diffusion layer 14, the etching selection ratio of the AIN layer 12 and the current diffusion layer 14 is preferably close to unity. BCl3 and Ar gas, or SiCl4 and Ar gas, for example, can be used to perform etching by RIE when the current diffusion layer 14 is made of InGaAIP. By means of such etching, the asperities formed in the AIN layer 12 is transferred to the current diffusion layer 14, which is thus provided with asperities having nearly uniform pitch P and height H.
In this example, the portion of asperities has a graded index structure of the InGaAIP layer having a refractive index of 3.3 and the sealing resin 26 having a refractive index of 1.5.
In the case where the current diffusion layer 14 is made of InGaAIP having a refractive index of 3.3, light emission having a wavelength of 660 nm has an in-medium wavelength of 200 nm. When the asperities have an average pitch of 100 nm as illustrated in
As shown in
According to prototyping by the inventor, the light extraction efficiency was improved by about 14% as a result of providing an asperity configuration on the surface of the current diffusion layer 14 made of InGaAIP. It is contemplated that this improvement is primarily attributed to reduction of reflectance.
Note that in this example as well, the pitch of the asperities is preferably not more than half the InGaAIP in-medium wavelength. Therefore, as described above in connection with the second example, it is preferred to set the asperity pitch P to 100 nm or less.
While the current diffusion layer 14 provided as an upper layer of the semiconductor multilayer structure is made of InGaAIP and the like, a contact layer made of GaAs and the like, for example, may be provided between the current diffusion layer 14 and the top electrode 10 in order to form an ohmic contact therebetween. In this case, the asperities may be formed in the contact layer instead of the current diffusion layer 14, or the asperities may be formed both in the contact layer and the current diffusion layer 14.
While
Embodiments of the invention have been described with reference to examples. However, the invention is not limited to these examples.
For example, the invention is not limited to the use of InGaAIP-based compound semiconductors for the LED. GaN-based, GaAIAs-based, and other compound semiconductors may be used.
The light emitted from the LED is not limited to visible light, but may include ultraviolet light. For example, ultraviolet or blue light can be used in combination with phosphors dispersed in the sealing resin to perform wavelength conversion for obtaining white light.
Any configuration, size, material, and arrangement of various elements including the LED, sealing resin, and AIN composing the semiconductor light emitting apparatus that are variously adapted by those skilled in the art are also encompassed within the scope of the invention as long as they include the features of the invention.
Number | Date | Country | Kind |
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2005-063400 | Mar 2005 | JP | national |