Number | Date | Country | Kind |
---|---|---|---|
10-021806 | Feb 1998 | JPX |
Number | Name | Date | Kind |
---|---|---|---|
5642323 | Kotani et al. | Jun 1997 | |
5793686 | Furutani et al. | Aug 1998 | |
5812490 | Tsukude | Sep 1998 |
Number | Date | Country |
---|---|---|
4-152565 | May 1992 | JPX |
9-74171 | Mar 1997 | JPX |
Entry |
---|
"A 1.6GB/s Data-Rate 1 Gb Synchronous DRAM with Hierarchical Square-Shaped Memory Block and Distributed Bank Architecture", Nitta et al., 1996 IEEE International Solid-State Circuits Conference, 1996 Digest of Technical Papers, pp. 376-377. |
"256-Mb DRAM Circuit Technologies for File Applications", Kitsukawa et al., IEEE Journal of Solid-State Circuits vol. 28, No. 11 Nov. 1993, pp. 1105-1112. |