Number | Date | Country | Kind |
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10-111698 | Apr 1998 | JPX |
Number | Name | Date | Kind |
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5060230 | Arimoto et al. | Oct 1991 | |
5793695 | Kohno | Aug 1998 |
Entry |
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Shigetoshi Wakayama et al.; "10-ns Row Cycle DRAM Using Temporal Data Storage Buffer Architecture" VLSI Circuit Symposium; Jun. 11, 1998. |