Claims
- 1. A method of operating a semiconductor memory device comprising:
- inputting a multiword control signal to a decoder circuit of said device;
- inputting first predecode signals to said decoder circuit;
- inputting second predecode signals to said decoder circuit;
- selectively driving word lines of said device based on the states of said multiword control signals, said first predecode signals and said second predecode signals.
- 2. The method of claim 1, wherein said first predecode signals are used in a routine mode to select and drive said word lines individually.
- 3. The method of claim 1, wherein said multiword control signal and said second predecode signals are used in a test mode to selectively drive a plurality of said word lines.
- 4. The method of claim 3, wherein a different plurality of said word lines are selectively driven when the states of said multiword control signal and said second predecode signals are changed.
- 5. The method of claim 3, wherein said selectively driven word lines are driven in sequence with a prescribed delay time.
Parent Case Info
This is a division of application Ser. No. 08/105,203, filed Aug. 10, 1993 now U.S. Pat. No. 5,544,796.
US Referenced Citations (3)
Foreign Referenced Citations (3)
Number |
Date |
Country |
0101107 |
Feb 1984 |
EPX |
0223188 |
May 1987 |
EPX |
2516973 |
Oct 1976 |
DEX |
Divisions (1)
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Number |
Date |
Country |
Parent |
105203 |
Aug 1993 |
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