Claims
- 1. A semiconductor memory device comprising:main word drivers that drive word lines and are hierarchically divided into main word drivers and sub word drivers; and sub word selection signal generating circuits that select sub word lines and are hierarchically divided into main sub-word selection signal generating circuits and sub sub-word selection signal generating circuits, the sub sub-word selection signal generating circuits generating sub sub-word selection signals having a first potential on a high-potential side, the main sub-word selection signal generating circuits generating main sub-word selection signals having a second potential on the high-potential side, the second potential being lower than the first potential.
Priority Claims (1)
Number |
Date |
Country |
Kind |
2000-047116 |
Feb 2000 |
JP |
|
Parent Case Info
This is a Division of application Ser. No. 09/789,514 filed Feb. 22, 2001, (which in turn is a Continuation Application of U.S. Pat. No. 6,529,439). The disclosure of the prior application(s) is hereby incorporated by reference herein in its entirety.
US Referenced Citations (6)