Claims
- 1. A semiconductor read only memory device comprising:
- a plurality of memory cells each including a pair of semiconductor regions separately formed on a semiconductor substrate of a first conductivity type, said semiconductor regions having a second conductivity type opposite to said first conductivity type, and a gate electrode insulatively disposed over said semiconductor substrate and extending between said pair of semiconductor regions;
- a first conductive layer contiguous to one of said semiconductor regions of each of said memory cells, and containing an impurity of said second conductivity type;
- a mask layer formed over said first conductive layer and having an electric insulation property and an anti-oxidation property, said mask layer being selectively removed according to write information; and
- a second conductive layer formed on the surface of said first conductive layer inclusive of said mask layer and selectively contiguous to said first conductive layer depending on the presence or absence of said mask layer.
- 2. The semiconductor read only memory device according to claim 1, wherein said first conductive layer is made of a poly-silicon layer.
- 3. The semiconductor read only memory device according to claim 1, wherein said mask layer is made of silicon nitride.
- 4. A semiconductor read only memory device comprising:
- a plurality of memory cells each including a pair of semiconductor regions separately formed on a semicondcutor substrate type, and a gate electrode insulatively disposed over said semiconductor substrate and extending between said pair of semiconductor regions;
- a plurality of first conductive layers, each insulatively formed over said gate electrode and contiguous to one of said pair of semiconductor regions of each of said memory cells, and each containing an impurity of said second conductivity type;
- a plurality of mask layers, formed over said plurality of first conductive layers and having an electric insulation property and an anti-oxidation property, said mask layers bieng selectively removed according to write information; and
- a plurality of second conductive layers formed on the surface of said plurality of first conductive layers inclusive of said plurality of mask layers and selectively contiguous to said first conductive layers depending on the presence or absence of said mask layers.
- 5. The semiconductor read only memory device according to claim 1, wherein each of said first conductive layers is made of a poly-silicon layer.
- 6. The semiconductor read only memory device according to claim 1, wherein each of said mask layers is made of silicon nitride.
Priority Claims (1)
Number |
Date |
Country |
Kind |
59-278410 |
Dec 1984 |
JPX |
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Parent Case Info
This application is a continuation, of application Ser. No. 811,464, filed 12/20/85, abandoned.
US Referenced Citations (3)
Foreign Referenced Citations (4)
Number |
Date |
Country |
0036573 |
Sep 1981 |
EPX |
0054102 |
Jun 1982 |
EPX |
0124115 |
Nov 1984 |
EPX |
56-26470 |
Mar 1981 |
JPX |
Non-Patent Literature Citations (1)
Entry |
1979 Int'l Electron Devices Meeting, Technical Digest, "A New Self-Aligned Source/Drain Diffusion Technology from Selectively Oxidized Poly-Silicon" (Washington, D.C., Dec. 3-4-5, 1979). |
Continuations (1)
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Number |
Date |
Country |
Parent |
811464 |
Dec 1985 |
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