Semiconductor storage device and method of manufacturing same

Abstract

The ratio of capacitance between a floating gate and a control gate to total capacitance in a semiconductor storage device is raised and reliability at read-out is improved by adopting a structure comprising select gates disposed on a substrate in first areas; floating gates disposed in second areas adjacent to the first areas; local bit lines disposed in third areas adjacent to the second areas; and control gates disposed on the floating gates. It is so arranged that capacitance between the select gate and the floating gate is smaller than capacitance between the substrate and the floating gate. It is so arranged that the thickness of a sidewall between the select gate and the floating gate is less than that of an insulating film between the substrate and the floating gate.

Description

BRIEF DESCRIPTIONS OF THE DRAWINGS

FIG. 1 is a partial plan view schematically illustrating the structure of a semiconductor storage device according to a first example of the present invention;

FIG. 2 is a partial sectional view along line X-X′ of FIG. 1 schematically illustrating the structure of the semiconductor storage device according to the first example;

FIGS. 3A to 3C are first process sectional views illustrating a method of manufacturing the semiconductor storage device according to the first example;

FIGS. 4D to 4E are second process sectional views illustrating a method of manufacturing the semiconductor storage device according to the first example;

FIGS. 5G to 5I are third process sectional views illustrating a method of manufacturing the semiconductor storage device according to the first example;

FIGS. 6J to 6K are fourth process sectional views illustrating a method of manufacturing the semiconductor storage device according to the first example;

FIGS. 7M and 7N are fifth process sectional views illustrating a method of manufacturing the semiconductor storage device according to the first example;

FIG. 8 is a partial plan view schematically illustrating an example of a selected cell and an unselected cell in the semiconductor storage device according to the first example;

FIG. 9 is a partial plan view schematically illustrating the structure of a semiconductor storage device according to a first example of the related art;

FIG. 10 is a partial sectional view along line Y-Y′ of FIG. 9 schematically illustrating the structure of the semiconductor storage device according to the first example of the related art;

FIGS. 11A to 11C are first process sectional views illustrating a method of manufacturing the semiconductor storage device according to the first example of the related art;

FIGS. 12D to 12F are second process sectional views illustrating a method of manufacturing the semiconductor storage device according to the first example of the related art;

FIGS. 13G to 13I are third process sectional views illustrating a method of manufacturing the semiconductor storage device according to the first example of the related art;

FIGS. 14J to 14L are fourth process sectional views illustrating a method of manufacturing the semiconductor storage device according to the first example of the related art;

FIG. 15 is a schematic view, as analyzed by the present invention, useful in describing the read-out operation of the semiconductor storage device (the read-out operation when a state in which electrons have not accumulated in a floating gate prevails) according to the first example of the related art; and

FIG. 16 is a diagram, as analyzed by the present invention, schematically illustrating the manner in which a birds' beak is produced in the process of manufacturing the semiconductor storage device according to the first example of the related art.

Claims

1. A semiconductor storage device comprising: a select gate disposed on a substrate in a first area;a floating gate disposed in a second area adjacent to the first area;a local bit line disposed in a third area adjacent to the second area; anda control gate disposed on said floating gate; whereina capacitance between said select gate and said floating gate is smaller than a capacitance between the substrate and said floating gate.

2. The device according to claim 1, wherein spacing between said select gate and said floating gate is greater than spacing between the substrate and said floating gate.

3. The device according to claim 1, wherein it is so arranged that an opposing area between said select gate and said floating gate is less than an opposing area between the substrate and said floating gate.

4. The device according to claim 1, further comprising: a first insulating film disposed between said select gate and said floating gate; anda second insulating film disposed between the substrate and said floating gate.

5. The device according to claim 4, wherein said first insulating film has a thickness greater than film thickness of said second insulating film.

6. The device according to claim 4, wherein said first insulating film is formed of a material having a specific inductivity lower than that of a material used for said second insulating film.

7. The device according to claim 4, wherein said first insulating film is formed in the shape of a sidewall so as to cover a side wall of said select gate.

8. The device according to claim 4, further comprising a third insulating film disposed on said select gate; wherein said first insulating film covers a part or all of a side wall of said third insulating film.

9. The device according to claim 8, further comprising a fourth insulating film disposed on said third insulating film; wherein said first insulating film covers a part or all of a side wall of said fourth insulating film.

10. The device according to claim 1, wherein said select gate comprises first select gate members and second select gate members, said first select gate members extending in a plurality of first comb-like teeth extending from a first common line; said second select gate members extending in a plurality of second comb-like teeth extending from a second common line, the comb-like teeth of the first select gate members being arranged at prescribed intervals inside gaps formed between the second comb-like teeth of said another select gate members in such a manner that said first and second comb-like teeth intermesh each other; said control gate extends in a direction that intersects the comb-like teeth of said select gate and three-dimensionally intersects said select gate;said floating gate comprises floating gate members disposed below said control gate on both sides of said select gate; andsaid local bit line comprises local bit line members disposed between the comb-like teeth of said select gate along the direction in which the comb-like teeth of said select gate extend.

11. A method of manufacturing a semiconductor storage device, comprising: forming a sidewall-shaped first insulating film on a side wall of a select gate disposed in a first area on a substrate;forming a second insulating film in a second area on the substrate adjacent to the first area; andforming a sidewall-shaped floating gate on the second insulating film and on the side wall of the select gate via the first insulating film;wherein at any step of the foregoing steps, said method is so implemented that a capacitance between the substrate and the floating gate will exceed a capacitance between the select gate and the floating gate.

12. The method according to claim 11, wherein at a step of said forming the second insulating film, said method is so implemented that the second insulating film will have a thickness less than film thickness of the first insulating film at a location directly alongside the select gate.

13. The method according to claim 11, wherein at a step of said forming the second insulating film, said method is so implemented that the second insulating film is formed of a material having a specific inductivity higher than that of a material used for forming the first insulating film.

14. The method according to claim 11, wherein at a step of said forming the floating gate, a floating gate film that has been deposited over the entire surface of the substrate inclusive of the first and second insulating films is formed by etch-back.

15. The method according to claim 14, wherein at a step of said forming the floating gate, the etch-back is adjusted in such a manner that an opposing area between the substrate and the floating gate will be greater than an opposing area between the select gate and the floating gate.