Patent Application
20120097859
The invention relates to an operating method for a semiconductor structure, particularly for a readout element (e.g. a DEPFET: Depleted Field Effect Transistor), in a semiconductor detector, particularly in a BIB detector (BIB: Blocked Impurity Band). Furthermore, the invention relates to a correspondingly constructed semiconductor structure.
BIB detectors are known from numerous publications, such as for example EP 0 271 522 A1, EP 0 110 977 B1, EP 0 110 977 A1, US 4 956 687 A, US 4 568 960 A, US 4 507 674 A, WO 1988/00397 A1 and WO 1983/04456 A1.
Furthermore, from FEDL, V. et al.: “Investigation of Single Pixel DePMOSFETs under Cryogenic Conditions” in “Proceedings of the 2008 IEEE Nuclear Science Symposium and Medical Imaging Conference”, a DEPFET is to be used as readout element for BIB detectors of this type, which DEPFET is known from the prior art and is for example described in Gerhard Lutz: “Semiconductor Radiation Detectors”, Springer-Verlag, pages 243-258.
Problematic for the use of a DEPFET as readout element in a BIB detector is the fact that the BIB detector is operated at very low temperatures of up to 5 K, which makes the deletion of the signal charge carriers accumulated in the internal gate of the DEPFET more difficult, as the signal charge carriers can no longer move freely at low temperatures of this type, so that the deletion mechanisms conventionally used in DEPFETs do not function or only function unsatisfactorily. In the previously mentioned publication from FEDL et al., this problem is recognized and the use of a plurality of up to 1000 deletion pulses is suggested in order to compensate the low effectiveness of the individual deletion processes by means of a large number of repeated deletion processes. This known solution of the problem of insufficient deletion in the case of extremely low temperatures is unsatisfactory however.
The invention is therefore based on the object of specifying a deletion mechanism, which makes it possible in the case of a DEPFET to effectively delete the signal charge carriers accumulated in the internal gate of the DEPFET even at extremely low temperatures and to remove the same from the internal gate.
This object is achieved by means of an operating method according to the invention and by a correspondingly designed semiconductor structure according to the independent claims.
The invention is based on the technical physical insight that the signal charge carriers accumulated in the internal gate of the DEPFET at very low temperatures are generally captured in a potential well at an impurity site so that the signal charge carriers cannot move freely, which prevents a removal of the signal charge carriers from the internal gate or at least make the same more difficult.
The invention therefore comprises the general technical teaching of freeing the signal charge carriers from their potential wells in the internal gate of the DEPFET by means of the tunnel effect which is known per se. The invention therefore makes provision for an electrical tunnel field to be generated in the area of the internal gate, so that the signal charge carriers located in the potential well of the internal gate can tunnel out of the potential well of the internal gate into a conduction band using the tunnel effect, in which the signal charge carriers can then move freely, which enables a removal of the signal charge carriers from the internal gate.
The tunnel field can in the case of a transistor structure for example be generated by a suitable electrical control of source, drain and/or gate of the transistor structure. The invention is not limited to semiconductor structures of this type however, in the case of which the tunnel field is generated by means of the contacts (e.g. gate, source, drain) of the semiconductor structure, which are present in any case. Rather, it is also conceivable that the semiconductor structure according to the invention has one or more additional contacts in order to generate the tunnel field.
The idea according to the invention of mobilizing signal charge carriers by means of the tunnel effect is not only realizable in the case of DEPFETs which are used as readout element in a semiconductor detector. Rather, the principle according to the invention of using the tunnel effect for mobilizing stored signal charge carriers can also be realized in general terms in the case of semiconductor structures which are used as readout element in a BIB detector. Furthermore, the principle according to the invention of using the tunnel effect can also be used generally in semiconductor structures, which have a storage area in which radiation-generated signal charge carriers are accumulated.
As an example for such an application of the principle according to the invention, mention may be made of CCD detectors (CCD: Charge Coupled Devices), which are known per se from the prior art and therefore do not need to be described in more detail.
Furthermore, the invention can also be realized in the case of a floating gate amplifier, as is described for example in R. P. KRAFT et al.: “Soft X-ray spectroscopy with sub-electron readnoise charge coupled devices”, Nuclear Instruments and Methods in Physics Research Section A, v. 361, p. 372-383.
Further, in the context of the invention, there is the possibility that the semiconductor detector is an RNDR detector (RNDR: Repetitive non-destructive read-out), as is known per se from the prior art (cf. S. WÖLFEL et al.: “A novel way of single optical photon detection: Beating the 1/f noise limit with ultra high resolution DEPFET-RNDR devices”, IEEE-TNS Vol 54, No 4, Part 3 (2007) 1311-1318).
Particularly advantageous is the realization of the principle according to the invention, however, in the case of semiconductor structures which are operated at very low temperatures of up to 5 K, as the signal charge carriers can otherwise also be deleted in the conventional manner.
Furthermore, the concept according to the invention for deleting the signal charge carriers from the storage area (e.g. the internal gate of a DEPFET) preferably makes provision for the signal charge carriers tunneled out of the potential well into the conduction band by means of the tunnel effect to drift out of the storage area. Theoretically, it is possible in the context of the invention that the signal charge carriers tunneled into the conduction band only leave the storage area by diffusion processes. However, the movement of the signal charge carriers out of the storage area is preferably supported in a targeted manner by an electrical drift field, which is designated as a deletion field in the context of the invention and is generated by means of a deletion contact.
The generation of deletion fields of this type is known per se from conventional DEPFETS and therefore does not need to be described in more detail.
In the case of the concept according to the invention for deleting the signal charge carriers accumulated in the storage area, there is the possibility that the signal charge carriers tunneled into the conduction band are again captured after a short distance by an impurity site in the semiconductor structure, as a result of which the deletion process is hindered. The invention therefore preferably makes provision for the deletion of the signal charge carriers to be repeated a number of times, in order to remove as many signal charge carriers as possible from the storage area.
Here, it is to be taken into account that the tunnel field generates a potential well at the location of an impurity site in each case, so that the spatial location of the potential well of the tunnel field should be spatially displaced between the successive deletion processes, in order to prevent signal electrons from being captured by the impurity sites again.
This spatial displacement of the potential well of the tunnel field between the successive deletion processes can take place in a different direction. For example, the potential well of the tunnel field in the semiconductor structure can be displaced in the lateral direction essentially parallel to the current direction or to the conductor channel of the transistor structure. Alternatively, there is the possibility that the potential well of the tunnel field is displaced in the lateral direction essentially transversely and preferably perpendicularly to the current direction or to the conductor channel of the transistor current. Further, there is the possibility that the potential well of the tunnel field is displaced in the vertical direction between the successive deletion processes. Furthermore, there is the possibility of a combination of the previously listed variants for displacing the potential well of the tunnel field between the successive deletion processes.
It has previously already been mentioned that the storage area is preferably an internal gate of a transistor structure, wherein the signal charge carriers accumulated in the internal gate control the transistor current. The previously mentioned deletion or drift field can here optionally be orientated transversely to the current direction of the transistor current or transversely to the conductor channel of the transistor structure, so that the signal charge carriers drift transversely to the conductor channel in the context of a deletion process. Alternatively, there is the possibility that the deletion field is orientated essentially parallel to the current direction of the transistor current or the conductor channel of the transistor structure, so that during deletion, the signal charge carriers drift essentially parallel to the current direction of the transistor current.
In the preferred exemplary embodiment of the invention, a deletion contact is provided for generating the deletion field, as is the case for conventional DEPFETs. Depending on the desired drift direction when deleting, with respect to the current direction of the transistor current, the deletion contact can optionally be arranged laterally adjacent to the conductor channel or in the channel direction upstream or downstream of the transistor structure.
The mechanism according to the invention for deleting the signal charge carriers accumulated in the storage area operates even at extremely low temperatures, as has already been mentioned previously. In the context of the invention, provision is therefore preferably made for the semiconductor detector (e.g. a BIB detector) and/or the semiconductor structure (e.g. a readout element, particularly in the form of a DEPFET) to be cooled to a temperature of less than 100 K, 50 K, 30 K, 20 K or even less than 10 K.
In addition to the previously described operating method according to the invention, the invention also comprises a correspondingly designed semiconductor structure with a deletion apparatus which generates the previously mentioned tunnel field.
Furthermore, the deletion apparatus preferably also has a deletion contact in order to generate the previously mentioned drift or deletion field in the semiconductor structure.
Other advantageous developments of the invention are characterized in the dependent claims or will be explained in more detail below together with the description of the preferred exemplary embodiments of the invention, with reference to the figures. The figures show as follows:
BIB detectors of this type are known however per se from the prior art, so that with respect to the structure and the mode of operation of BIB detectors, reference is made to the documents cited at the beginning.
The structure and the mode of operation of the illustrated DEPFET 1 are to a large extent conventional, so that with respect to the structure and the mode of operation of DEPFET 1, reference is made to the documents cited at the beginning.
It is only to be mentioned briefly here that the DEPFET 1 has a semiconductor substrate HS which is depleted and strongly n-doped in operation and is delimited on its underside by a strongly n-doped rear contact RK, an intrinsic carrier substrate TS, which achieves the required mechanical stability, adjoining the rear contact RK.
At its upper side, the DEPFET 1 has a strongly p-doped source S and a strongly p-doped drain D, a conductor channel K extending between the source S and the drain D, through which conductor channel a controllable transistor current flows during operation.
On the one hand, the transistor current flowing through the conductor channel K is controlled by an external gate G which is located on the upper side of the DEPFET 1 above the conductor channel K.
On the other hand, the transistor current flowing through the conductor channel K can be controlled by an internal gate IG which is embedded in the semiconductor substrate HS under the conductor channel K. During the operation of the DEPFET 1 as readout element of a BIB detector, radiation-generated signal charge carriers 2 accumulate in the internal gate IG, so that the signal charge carriers 2 accumulated in the internal gate IG likewise control the transistor current through the conductor channel K, which therefore forms a measure for the detected radiation.
Furthermore, the drain D is connected to an amplifier 3 which is here only illustrated schematically.
Furthermore, the DEPFET 1 has a deletion apparatus in order to delete the signal charge carriers 2 accumulated in the internal gate IG, i.e. to remove the same from the internal gate IG. The deletion apparatus essentially consists of a clear gate CLG and a strongly n-doped deletion area CL. The deletion apparatus enables the generation of a deletion or drift field in the DEPFET 1 by means of a suitable potential loading of the clear gate CLG and the deletion area CL, wherein the deletion field is orientated transversely to the conductor channel K so that the signal charge carriers 2 drift transversely to the conductor channel K out of the internal gate IG during deletion.
The dot-dashed line here shows the course of the potential well without a tunnel field. In this state, the signal charge carriers 2 are captured in the micro potential well and cannot be removed or can only be removed from the internal gate IG with a very low probability.
The dashed curve by contrast shows the course of the micro-potential well with a relatively weak tunnel field with a field strength of 5 kV/cm. From this it can be seen that the potential well is distorted, as a result of which the statistical probability is increased and that the signal charge carriers 2 tunnel out of the potential well into the conduction band.
Finally, the solid line shows the course of the potential well with a tunnel field of 10 kV/cm. In the case of a tunnel field of this type, the signal charge carriers 2 can tunnel out of the potential well into the conduction band, where the signal charge carriers 2 can then move freely, which is used in the context of the invention for clearing the internal gate IG.
The tunnel field illustrated with a solid line in
The loading of the source S with numerous deletion pulses 4 generates a tunnel field in the DEPFET 1 in each case, so that the signal charge carriers 2 accumulated and frozen out in the internal gate IG can tunnel into the conduction band, this process being repeated a number of times in accordance with the number of deletion pulses 4.
The loading of the clear gate CLG and the deletion area CL is by contrast used to generate a deletion or drift field in the DEPFET 1, which is orientated transversely to the conductor channel K so that the signal electrons 2 drift transversely to the conductor channel K out of the internal gate IG.
By contrast with the variant according to
The
In this exemplary embodiment of the DEPFET 1 also, a tunnel field can be generated by the previously described electrical control of the gate G, the source S and/or the drain clear gate DCG, so that, for deletion, the signal charge carriers stored in the internal gate IG can tunnel into the conduction band where they can move freely.
By contrast,
In a first step S1, an internal counter n=1 is initially reset, in order to be able to count the number of deletion processes.
In a following step S2, the source S is then triggered with a tunnel potential so that the signal charge carriers 2 accumulated in the internal gate IG can tunnel out of the potential well into the conduction band, where the signal charge carriers 2 can then move freely. The step S2 thus corresponds to the variant according to
In a following step S3, the clear gate CLG and the deletion area CL are then triggered in accordance with
In the following step S4, the tunnel field is then correspondingly displaced in order to allow signal charge carriers to tunnel into the conduction band, which signal charge carriers were captured by an impurity site again.
In the next step S5, the counter n is then incremented.
In the following step S6, a check is then performed as to whether the counter n has exceeded a predetermined maximum value nMAX.
The previously outlined deletion processes are then repeated correspondingly often, in order to delete all of the signal charge carriers 2 from the internal gate IG.
A particularity of this exemplary embodiment consists in the fact that the DEPFET 1 is annular, whereas the DEPFET 1 according to
In this exemplary embodiment of the DEPFET 1 also, a tunnel field can be generated by the previously described electrical control of the gate G and/or the source S, so that, for deletion, the signal charge carriers stored in the internal gate IG can tunnel into the conduction band where they can move freely.
The invention is not limited to the preferred exemplary embodiments described above. Instead, many variants and modifications are possible, which also make use of the concept of the invention and thus fall within the scope of protection.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10 2009 023 807.7 | Jun 2009 | DE | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/EP2010/002951 | 5/12/2010 | WO | 00 | 1/10/2012 |
