Patent Application
20050266661
The invention relates in general to semiconductors devices and to semiconductor devices manufacturing. More particularly, it relates to semiconductor wafers with ditched scribe streets for facilitating chip singulation, and methods for manufacturing the same.
It is common to form semiconductor devices, or chips, in large quantities arrayed on the upper surface of a semiconductor wafer. The chips are fashioned with multiple layers of conductive and non-conductive materials interconnected to form circuitry. The completed chips are typically singulated for final packaging by cutting the wafer at gaps of inactive area left between and around the active areas of the chips for that purpose. Mechanical sawing is the process generally used for singulation.
Mechanically sawing through a multi-layered semiconductor wafer presents certain problems. For example, instances of chipping, cracking, or peeling of the multiple layers of the completed wafer are not uncommon. This type of damage is often caused by the stresses induced by sawing the inactive areas and can cause damage to the adjacent active areas. The result may be reduced yield, defective devices, increased inspection and testing requirements, and increased expense. Examples of efforts to minimize such problems include: Providing wider inactive areas, at the expense of smaller active areas, and; laser cutting, often in combination with mechanical sawing, with the expense of additional equipment and additional processing time. These examples of problems encountered in wafer sawing may be particularly acute with the fabrication of devices employing copper film as a conductive interconnect material and low-k or ultra low-k dielectric materials.
Due to these and other problems, improved wafers and methods for facilitating the avoidance of damage to devices upon singulation would be useful and desirable in the arts.
In carrying out the principles of the present invention, in accordance with preferred embodiments thereof, methods and devices are provided in which the chips on a semiconductor wafer are circumscribed by ditched scribe streets to facilitate sawing.
According to one aspect of the invention, a method for manufacturing a semiconductor wafer having a plurality of semiconductor chips includes steps of applying photo resist material to the top surface of the wafer to protect the chips, and forming a pattern of scribe streets adjacent to the chip edges. In a further step, ditches are etched into the scribe streets extending from the wafer surface down to the substrate below the multiple layers of conductive and non-conductive materials.
According to another aspect of the invention, a method for singulating semiconductor chips from a wafer includes steps for applying photo resist material to the top surface of the wafer to protect the chips. A pattern of scribe streets is formed adjacent to the chip edges by removing selected portions of the photo resist. The scribe streets are etched to form ditches extending from the wafer surface to the substrate below the multiple layers of conductive and non-conductive materials. In a further step, the wafer is sawn in alignment with the ditches in order to singulate the semiconductor chips.
According to additional aspects of the invention, examples of preferred embodiments of semiconductor wafers of the invention include a semiconductor wafer with numerous semiconductor chips arranged thereon. The wafer has a semiconductor substrate overlain by a series of upper layers. A scribe street at the top surface of the wafer is defined by inactive areas between and surrounding the edges of the chips. A ditch in the scribe street extends from the top surface of the wafer to the semiconductor substrate below the multiple layers of conductive and non-conductive materials.
According to still another aspect of the invention, examples of specific embodiments include wafers and associated manufacturing methods of the invention for providing a scribe street ditch within the range of approximately 40 to 90 um in width in inactive areas circumscribing the chips on the wafer.
According to yet another aspect of the invention, examples of specific embodiments include wafers and associated methods of the invention providing a scribe street ditch within the range of approximately 10 to 40 um in depth in the inactive areas bordering the chips on the wafer.
The invention provides technical advantages including but not limited to higher yield of devices undamaged by the sawing operation, savings of time providing improved throughput for reduced-damage singulation methods, lower manufacturing costs, and advantageous extension of existing manufacturing processes. These and other features, advantages, and benefits of the present invention can be understood by one of ordinary skill in the art upon careful consideration of the detailed description of representative embodiments of the invention in connection with the accompanying drawings.
The present invention will be more clearly understood from consideration of the following detailed description and drawings in which:
References in the detailed description correspond to like references in the figures unless otherwise noted. Descriptive and directional terms used in the written description such as first, second, top, bottom, upper, side, etc., refer to the drawings themselves as laid out on the paper and not to physical limitations of the invention unless specifically noted. The drawings are not to scale, and some features of embodiments shown and discussed are simplified or amplified for illustrating the principles, features, and advantages of the invention.
In general, the methods and devices of the invention provide improved semiconductor wafers providing features for improving singulation of individual devices. An example of a preferred embodiment of a semiconductor wafer of the invention is illustrated in the top perspective view of
The ditches 22 are preferably formed using traditional manufacturing processes. Close-up views of the inactive areas 18 of the wafer 10 are shown and further described referring primarily to
Ultimately, the individual chips 14 are singulated by aligning a cutting tool, such as a mechanical saw, with the ditches 22 and sawing through the exposed substrate 12.
Thus, the invention provides new semiconductor wafers and methods for making the same, as well as methods for chip singulation. Ditched scribe streets are provided for improved singulation of individual chips. The methods and devices of the invention provide advantages including but not limited to a higher yield of devices undamaged by sawing, improved throughput for reduced-damage singulation methods, lower manufacturing costs, and extension of existing manufacturing processes. While the invention has been described with reference to certain illustrative embodiments, the methods and apparatus described are not intended to be construed in a limited sense. Various modifications and combinations of the illustrative embodiments as well as other advantages and embodiments of the invention will be apparent to persons skilled in the art upon reference to the description and claims.
