The present disclosure relates generally to optical interconnects and particularly to a silicon carrier for optical interconnect modules.
Optical interconnects are used in a variety of application to couple optical components to electrical components. It is generally recognized that a preferred approach to this problem involves integration of optical components into multichip modules (MCMs) or single chip modules (SCMs). One existing technique includes directly mounting a laser array onto the silicon germanium (SiGe) laser driver chip. This approach, however, adds extra cost and creates difficult thermal challenges. The thermal challenges are twofold; first, the thermally sensitive laser is in intimate contact with the heat producing SiGe driver circuits which affects both laser performance and reliability. Second, a heat spreader on the driver circuit is made significantly less effective, since the contact area to the driver is small because the heat spreader must not contact the chip in the area of the laser and the driver wirebond pads.
The added cost comes from the SiGe chip, which may be greatly oversized to perform packaging functions as well as contain the necessary driver circuitry. The circuitry is not very efficiently layed out with this design, and is estimated to be less than 15% of the chip area. Thus, there is a well-established need for a new type of laser array package.
An embodiment of the invention is an optical interconnect module comprising a silicon carrier; a communication integrated circuit mounted on the silicon carrier and an optical integrated circuit flip chip mounted on the silicon carrier. The optical integrated circuit is in electrical communication with the communication integrated circuit by electrical paths in the silicon carrier. Optical paths in the silicon carrier provide optical coupling between the optical integrated circuit and an optical link.
Referring to the exemplary drawings wherein like elements are numbered alike in the accompanying Figures:
The top surface of substrate 102 includes a number of integrated circuits 106. Integrated circuits (ICs) 106 are typically electrical components and coupled to interconnects 104 and/or optical interconnect modules 200 through electrical vias within substrate 102. ICs 106 may provide support functions for the optical interconnect modules 200 and be lower speed (e.g., 5–10 Gb/s) CMOS devices.
Also mounted on silicon carrier 202 are integrated circuits (ICs) 206 that provide signal processing functions such as signal coding and signal conditioning. In an embodiment, ICs 206 are lower speed (5–10 Gb/s) CMOS devices. ICs 206 are connected to interconnects 204 and other ICs through electrical paths in silicon carrier 202.
Communication ICs 208 are mounted on silicon carrier 202. The communication ICs 208 may be silicon-germanium (SiGe) devices operating at relatively higher speeds of 20–40 Gb/s. The communication ICs 208 interface with optical transmitter IC 210 and optical receiver IC 212 over electrical paths formed in the silicon carrier. The communication ICs 208 may include a driver IC for driving the optical transmitter IC 210 and an amplifier IC for amplifying signals received by optical receiver IC 212. The communication ICs 208 provide functions such as mux/demux, clocking, driving and amplifying for the optical integrated circuits including optical transmitter 210 and optical receiver 212.
The optical transmitter 210 and optical receiver 212 interface with an optical link 214 to send and receive optical signals to and from the optical interconnect module 200. In an embodiment, the optical transmitter 210 is a III–V compound VCSEL array and the optical receiver 212 is a photodiode array, both operating at relatively higher speeds of 20–40 Gb/s. Both the optical transmitter 210 and the optical receiver 212 are flip chip mounted to the silicon carrier 202. It is understood that separate transmitter and receiver ICs are not required and a single transceiver IC may be used.
The optical transmitter 210 and the optical receiver 212 are coupled to the optical link 214 by optical paths (fiber array, waveguide, etc.) embedded in silicon carrier 202. The optical link 214 transmits and receives optical signals having wavelengths transparent to the silicon carrier 202 (e.g., greater than about 1000 nm) along a distance of 2 m to 100 m before regeneration or reception. Optical transmission media (e.g., optical fiber) is coupled to optical link 214 to provide the transmission path.
Mounting CMOS ICs 206, SiGe ICs 208, the optical transmitter 210 and optical receiver 212 on a common carrier permits optimization of function and power consumption and cost. Thermal management issues, such as proximity of the VCSEL array 210 to the SiGe driver ICs 208, are also addressed by component placement on the carrier 202. A thermal spreader may be mounted to the entire top surface of communication ICs 208 since the entire surface is accessible. Noise is also minimized by placement of the VCSEL array 210 relative to the high speed SiGe communication ICs 208.
A number of different optical and electrical elements may be incorporated in the silicon carrier 202 for mounting and/or interconnecting electrical and optical components.
Substrate 102 includes an optical path layer 510 including waveguides 509 (e.g., total internal reflection mirrors) in optical communication with optical vias 504. Waveguides 509 provide for routing optical signals on the substrate 102. The optical receiver 212 may be interconnected using similar optical vias. Alignment features 507 provide for alignment of the optical vias 504 with the waveguides 509. The alignment features 507 are mechanical alignment features that interfere to align the silicon carrier 2020 with substrate 102. The alignment features may be etched in the silicon carrier 202 at the same time optical vias 504 are formed.
Embodiments of the invention decouple the packaging issues from the circuitry issues and uses a lower cost Si carrier 202 for the packaging aspects. The Si carrier 202 area is estimated to be between 5 to 10×less expensive (at cost) than 6 HP SiGe. The Si carrier 202 for the optical interconnect module 200 may be designed for direct attachment to a flex lead, to the substrate 102 with through-vias and C4s, or for direct attachment to a PCB with a BGA. The optical transmitter 210, optical receiver 212 and communication ICs 208 may be assembled with Si carrier 202 in a hermetic or near-hermetic package, using a glass cover slip and standard optical array connectors, which further enhances their integration into an MCM package. The close integration of the optical transmitter 210, the optical receiver 212 and communication ICs 208 minimizes electrical noise and facilitates high data rate modulation of the lasers.
While the invention has been described with reference to exemplary embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed as the best or only mode contemplated for carrying out this invention, but that the invention will include all embodiments falling within the scope of the appended claims. Moreover, the use of the terms first, second, etc. do not denote any order or importance, but rather the terms first, second, etc. are used to distinguish one element from another. Furthermore, the use of the terms a, an, etc. do not denote a limitation of quantity, but rather denote the presence of at least one of the referenced item.
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