Patent Application
20140185980
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Photonic integration has been playing an increasingly important role in optical systems, such as transport and interconnect devices. Photonic integration may bring about various benefits, such as relatively smaller footprint, higher port density, less power consumption, and/or reduced cost, making it a preferred technology for building the next generation of integrated optical devices, such as wavelength division multiplexing (WDM) transponders, transceivers, and other types of devices. A Group III-V compound, indium phosphide (InP), used to be a preferred choice of material for photonic integration, e.g., for WDM transport applications, because it is a good lasing material for C-band (e.g., wavelength between about 1470 to 1610 nanometers) transmission. Monolithic integration of up to 10 transmitters or receivers has been demonstrated using InP chips. However, InP-based monolithic integration may bring potential disadvantages or issues, which may include small wafer size (e.g., 2 to 3 inches), high killer defect density, and brittleness of InP, which may require additional submount(s) as a chip carrier.
To avoid issues of monolithic integration, hybrid integration has been used as an alternative solution for photonic integration. In this approach, at least some components of the optical system are not monolithically grown, but are bonded to a carrier or platform instead. Hybrid integration may be based on a silica-on-silicon (SOS) platform, which is often used to grow a planar lightwave circuit (PLC). PLC may comprise passive optical components, such as optical waveguides, splitters, combiners, optical taps, which may be readily grown with low insertion loss. In addition, PLC may also serve as a platform on which active components (e.g., modulator and laser) may be readily mounted. According to U.S. Pat. No. 8,285,151, twelve distributed feedback laser (DFB) lasers may be hybrid integrated on a PLC carrier and may have a function of wavelength multiplexing to form a dense WDM (DWDM) transmitter array.
Although SOS materials may be a good material for development of passive optical components and serving as a chip carrier, SOS materials may lacks other integration capabilities needed to be a complete solution for optical transport/interconnect. These lacking capabilities may include optical signal modulation, signal attenuation, tunable filtering, and so forth. Currently, these functions are either not implemented, or implemented only with a small scale to simplify the integration. Complex and/or large-scale integration of optical components may require a different platform using the hybrid approach.
In one embodiment, the disclosure includes an apparatus comprising a silicon-on-insulator (SOI) platform comprising an optical component network.
In another embodiment, the disclosure includes an apparatus comprising an optical component network monolithically grown on a SOI platform, and an optical device coupled to the optical component network.
In yet another embodiment, the disclosure includes a method comprising generating an optical signal using a silicon-based optical component, applying an electrical signal to the optical component, and tuning a wavelength of the optical signal based on the electrical signal.
These and other features will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings and claims.
For a more complete understanding of this disclosure, reference is now made to the following brief description, taken in connection with the accompanying drawings and detailed description, wherein like reference numerals represent like parts.
It should be understood at the outset that, although an illustrative implementation of one or more embodiments are provided below, the disclosed systems and/or methods may be implemented using any number of techniques, whether currently known or in existence. The disclosure should in no way be limited to the illustrative implementations, drawings, and techniques illustrated below, including the exemplary designs and implementations illustrated and described herein, but may be modified within the scope of the appended claims along with their full scope of equivalents.
Disclosed herein are apparatuses and methods for improved photonic hybrid integration. Embodiments of this disclosure may provide a high-volume and low-cost solution to the integration of tunable laser arrays, which may be used in optical transport systems and interconnects. Specifically, instead of the traditionally used SOS platform, a silicon-on-insulator (SOI) carrier or platform may be used herein for photonic integration. In an embodiment, the SOI platform may be used to monolithically grow an optical component network comprising one or more optical components. For example, parts of a laser array based on distributed Bragg reflectors (DBR) may be grown on the SOI platform. Further, the SOI platform may be coupled to another optical device, e.g., via a flip-chip bonding method. In an embodiment, the coupled optical device is a gain chip coupled to a number of DBR lasers to form a laser array for WDM applications. Each laser in the array may use one set of Bragg gratings to form a laser cavity with the gain chip. Alternatively, each laser may use two sets of Bragg gratings on one side of the gain chip to form a folded laser cavity with the gain chip. Wavelengths the lasers may be tunable by thermally or electrically tuning the Bragg gratings. In addition, passive flip-chip bonding may align optical waveguides with the help of vertical stoppers as well as horizontal markers. Moreover, mode convertors may be used to improve optical coupling between SOI waveguides and the coupled optical device.
The SOI platform 110 may be a chip or wafer comprising a silicon layer on top and an insulator (e.g., silica) layer underneath the silicon layer. An optical component network 130 comprising one or more optical components may be monolithically fabricated or grown on the SOI platform 110. As shown in
It should be understood that
The gain chip 120 may comprise any suitable material, e.g., a Group III-V compound. In an embodiment, the gain chip 120 may be made of indium phosphide (InP). The gain chip 120 may be mounted on the SOI platform via any suitable coupling method, such as a flip-chip bonding method, a butt joint method, or an adiabatical coupling method. For example, to accommodate flip-chip bonding, a portion of the SOI platform underneath the gain chip 120 may be etched, so that the waveguides 122 may have an equal height with the phase sections 132, allowing direct coupling of light from the gain chip 120 to the optical component network 130.
Consider DBR lasers as an application example. The gain chip 120 may comprise four waveguides 122 coupled to the four phase sections 132 via an optical interface. Further, the gain chip 120 may be anti-reflective on a side 126 coupled to the phase sections 132 and highly reflective on an opposite side 124. This may be realized by coating an anti-reflection material on the side 126 and high-reflection material on the side 124. As a result, for each laser, a laser cavity comprising the waveguide 122, the phase section 132, and the set of gratings 134 may be formed, with the waveguide 122 being a gain section. The side 124 works as one end or minor of the laser cavity, and the gratings 134 as the other end of the laser cavity. The set of gratings 134 may be written on a SOI waveguide and comprise refractive index gratings with a desired spacing or pitch to form a wavelength selective mirror. Pitches of the gratings 134, often referred to as distributed Bragg reflectors (DBR), may be distributed uniformly or non-uniformly. The set of gratings 134 may be designed to have a desired transmission and reflection ratios (e.g., 20% transmission and 80% reflection), and these ratios are wavelength dependent.
In operation, a laser may oscillate inside the laser cavity, and certain wavelength(s) of the laser may be amplified as an output, with other wavelength filtered. The phase section 132 may be adjusted to allow laser of certain wavelength(s) to oscillate. In an embodiment, the phase section 132 may tune a phase by changing refractive index, e.g., via temperature change or an electrical field. Similarly, the set of Bragg gratings 134 may tune a wavelength via thermal tuning or electrical tuning. The wavelength of each DBR laser may be mainly tuned or determined by the set of gratings 134. Further, the output signals from all four DBR lasers may feed into the multiplexer 138, and combined into a single signal to be emitted or transmitted out via the waveguide 140. The multiplexer 138 may be a multimode interference (MMI) coupler or an arrayed waveguide gratings (AWG), or any other type of multiplexer, depending on the application or degree of integration. If desired, the multiplexer 138 may be bonded to the SOI platform 110, instead of monolithically grown. Like a conventional laser array (e.g., DWDM array), multiple lasers may be wavelength multiplexed by the multiplexer 138 (e.g., an AWG). Unlike a conventional laser array, the cavity of each laser may be formed inside the waveguides leading to the AWG.
The configuration as shown in
The SOI platform 110 may offer a complementary substrate or platform for hybrid photonic integration on which certain active functionalities other than lasing are achievable. One example is a Mach-Zehnder modulator (MZM), which may be used as an optical device coupled to the SOI platform 110 and configured to modulate optical signals from a continuous wavelength (CW) laser source. The MZM may be made up with waveguides in a good optical material, whose refractive index may be altered by applying an electric field on one or two arms of the modulator. For example, the MZM may use properties of a semiconductor p-n junction to modify the index of one arm of the modulator relative to the other arm via either carrier injection and depletion or accumulation at the junction.
Conventionally, laser chips with complete components may often be coupled to a SOI platform. In this disclosure, when coupling an optical device with the SOI platform 110, heterogeneous integration, e.g., of InP and SOI, may use wafer bonding through van der Waals attraction between two surfaces at the atomic level. Further, with use of evanescent coupling, some laser parts, such as laser cavity, silicon waveguides, Bragg gratings, and other passive features may be developed on the SOI platform. The capability to transfer parts of a laser on to the SOI platform 110 may sometimes offer advantages in laser array integration. For example, by using the SOI platform 110 as a part of the laser cavity for array integration, potential changes to the laser cavity caused by stress/strain during or after die-bonding may be eliminated or reduced. In use, if a die for a complete laser is used rather than a gain chip, the bonding process, e.g., via flip-chip, may alter the center wavelength of the laser, and potentially decrease the manufacture yield.
As mentioned previously, a refractive index of the silicon-based Bragg gratings may be changed, which in turn may realize tuning of laser wavelength. One option is to use thermal tuning as silicon exhibits a relatively large thermo-optic coefficient. In thermal tuning, micro-sized heaters may be traced or placed on top of the Bragg gratings. For visual clarity, the electrical traces, electrodes, transmission lines, ground lines, termination resistors, etc., have been omitted in figures herein, unless pointed out specifically. During operation, currents in the micro heaters may be adjusted or turned on or off as desired, which leads to temperature changes, then refractive index changes, and eventually wavelength changes. For example, a one degree Celsius temperature change may tune a laser wavelength by 0.1 nm. However, thermal tuning may not be suitable for some applications, as it may consume relatively a high amount of power due the heaters and may operate at a relatively low speed as temperature changes may be slow.
The application of an electric field to a material can result in a change to the real and imaginary parts of a refractive index. In an embodiment, the Bragg gratings may be tuned electrically based on a plasma dispersion effect, in which the concentration of free charges in silicon may change the real and imaginary parts of the refractive index.
Electrical tuning based on plasma dispersion effect may be more suitable for silicon-based Bragg gratings compared with some traditionally used electrical effects, such as the Pockels effect, the Kerr effect, and the Franz-Keldysh effect. Although the traditionally used effects have been used to cause either electroabsorption or electrorefraction in other semiconductor materials, silicon may show weak responses to these effects in communications wavelengths of 1.3 micrometer (μm) to 1.55 μm. In addition, compared to thermal tuning, the plasma dispersion effect may be a more efficient mechanism to achieve large tunable range. An exemplary tuning range of a DBR laser may be about 8 nm. With electrical tuning and targeted value from the grating masks, a transmitter array may be built with desired wavelength spacing without needing thermal tuning. Furthermore, unlike a silica-on-silicon (SOS) platform, the Bragg gratings may be tuned efficiently by either carrier injection or depletion to form DWDM arrays with desired wavelengths. No micro heaters may be needed for wavelength tuning, which may reduce the power consumption of the laser arrays. Under this condition, an InP chip may act merely as a gain block, providing necessary population inversion in the laser cavity to obtain stimulated emission.
The phase sections 332, 336, and 340 may be similar to the phase section 132 in
Due to combinations of tuning in both sets of gratings, the folded cavity configuration as shown in
In an embodiment, an optical device (e.g., the gain chip 120) and the SOI platform 110 may be integrated using a flip-chip bonding method.
In operation of a MZM modulator, for example, a radio frequency (RF) signal may first be fed from a wall of the package body via the wire bond 422 to the transmission line 416. The transmission line 416 may be positioned underneath and close to a laser waveguide with a core 430, which may be an arm of the MZM. Optical signals passing through the core 430 may be modulated in intensity and/or phase. In use, the transmission line 416 may comprise a relatively wider portion, which serves as a bonding pad to form an electrical connection. The electrical connection may be achieved by solder jointing of bonding pads located on both the optical device 410 and the SOI platform 110. The solder 420 may comprise any fusible metal or metallic alloy used to join metal work pieces and having a melting point below that of the work piece(s). Exemplary soldering materials include, tin, copper, silver, bismuth, indium, zinc, antimony, and any combination thereof.
The optical interface between the optical device 410 and the SOI platform 110 may be formed by aligning the core 430 with a core 440. The cores 430 and 440 may be various types of waveguides described previously. The core 440 may be grown on the SOI platform 110 and have two silica layers 442 on both sides as claddings. To vertically align the two cores, the SOI platform 110 may be partially etched during fabrication of the device assembly so that the waveguide cores 430 and 440 in the optical device 410 and the SOI platform 110 may be aligned at an equal height, as shown in
Horizontal alignment of the optical device 410 with respect to the SOI platform 110 may be accomplished using markers on both the optical device 410 and the SOI platform 110. The markers on the optical device 410 may be generated during fabrication of the core 430 (etching inside InP), and the markers on the SOI platform 110 may be generated during fabrication of the stoppers 510. Markers on both devices may be placed near the optical interface area for easy alignment. In addition, to an extent, soldering may also help horizontal alignment of the SOI platform 110 and the optical device 410, since horizontal movement may be driven by a surface tension force in an effort to minimize the surface area to reaching the lowest total surface energy of the assembly.
Flip-chip bonding of the optical device 410 on the SOI platform may offer good thermal stability in comparison to other bonding methods or approaches. For example, although a butt joint method may be used to form the optical interface via active alignment, as the optical device 410 may need to be repeatedly detached from the SOI platform 110 during alignment, the butt joint method may be thermally less stable compared to flip-chip bonding. The thermal stability may be important in some devices, e.g., where a precise path difference between two MZMs must be kept to maintain a fixed phase difference.
Mode convertors may sometimes be needed for both the optical device 410 and the SOI platform 110, in order to ensure good optical coupling at the optical interface. A mode converter may optimize the size and profile of an optical mode (e.g., laser) at the optical interface, and ensure good optical coupling between the optical device 410 and the SOI platform 110, e.g., with minimal loss of power.
At least one embodiment is disclosed and variations, combinations, and/or modifications of the embodiment(s) and/or features of the embodiment(s) made by a person having ordinary skill in the art are within the scope of the disclosure. Alternative embodiments that result from combining, integrating, and/or omitting features of the embodiment(s) are also within the scope of the disclosure. Where numerical ranges or limitations are expressly stated, such express ranges or limitations should be understood to include iterative ranges or limitations of like magnitude falling within the expressly stated ranges or limitations (e.g., from about 1 to about 10 includes, 2, 3, 4, etc.; greater than 0.10 includes 0.11, 0.12, 0.13, etc.). For example, whenever a numerical range with a lower limit, Rl, and an upper limit, Ru, is disclosed, any number falling within the range is specifically disclosed. In particular, the following numbers within the range are specifically disclosed: R=Rl+k*(Ru−Rl), wherein k is a variable ranging from 1 percent to 100 percent with a 1 percent increment, e.g., k is 1 percent, 2 percent, 3 percent, 4 percent, 5 percent, . . . , 70 percent, 71 percent, 72 percent, . . . , 95 percent, 96 percent, 97 percent, 98 percent, 99 percent, or 100 percent. Moreover, any numerical range defined by two R numbers as defined in the above is also specifically disclosed. The use of the term “about” means±10% of the subsequent number, unless otherwise stated. Use of the term “optionally” with respect to any element of a claim means that the element is required, or alternatively, the element is not required, both alternatives being within the scope of the claim. Use of broader terms such as comprises, includes, and having should be understood to provide support for narrower terms such as consisting of, consisting essentially of, and comprised substantially of. Accordingly, the scope of protection is not limited by the description set out above but is defined by the claims that follow, that scope including all equivalents of the subject matter of the claims. Each and every claim is incorporated as further disclosure into the specification and the claims are embodiment(s) of the present disclosure. The discussion of a reference in the disclosure is not an admission that it is prior art, especially any reference that has a publication date after the priority date of this application. The disclosure of all patents, patent applications, and publications cited in the disclosure are hereby incorporated by reference, to the extent that they provide exemplary, procedural, or other details supplementary to the disclosure.
While several embodiments have been provided in the present disclosure, it may be understood that the disclosed systems and methods might be embodied in many other specific forms without departing from the spirit or scope of the present disclosure. The present examples are to be considered as illustrative and not restrictive, and the intention is not to be limited to the details given herein. For example, the various elements or components may be combined or integrated in another system or certain features may be omitted, or not implemented.
In addition, techniques, systems, subsystems, and methods described and illustrated in the various embodiments as discrete or separate may be combined or integrated with other systems, modules, techniques, or methods without departing from the scope of the present disclosure. Other items shown or discussed as coupled or directly coupled or communicating with each other may be indirectly coupled or communicating through some interface, device, or intermediate component whether electrically, mechanically, or otherwise. Other examples of changes, substitutions, and alterations are ascertainable by one skilled in the art and may be made without departing from the spirit and scope disclosed herein.
