Patent Application
20150170911
The present invention relates to a silicon substrate suitable for use with RF components, and to one or more RF components formed on such a silicon substrate.
It is known that components, such as micro-electro-mechanical systems (MEMS) switches can be used, in some instances, as replacements for electromechanical relays or solid state switches in radio frequency applications.
Such switches have generally been formed on high resistivity silicon wafers, such as float zone wafers. Float zone (FZ) wafers have a low oxygen content. These wafers give high resistivity which is stable throughout subsequent processing steps. However float zone wafers are expensive in comparison with the standard resistivity Czochralski, CZ, wafer. In addition, the low oxygen content of the float zone wafers gives the wafers poor yield strength making them fragile and prone to breaking in wafer handling tools. Thus their improved electrical performance comes with processing problems and increased expense. Other RF components such as filters, couplers and transmission lines may also benefit from use of a higher resistivity substrate.
This disclosure relates to a silicon substrate, comprising a silicon structure formed by the Czochralski process, and having a carrier life time killing layer deposited on the silicon structure.
The structure may be in the form of a wafer. The wafer is formed by slicing/cutting a crystal that was formed using the Czochralski process.
The carrier life time killing layer may be formed by depositing a further layer of material on the silicon structure, such as a wafer, or by suitable doping of an upper region of the wafer.
Preferably the carrier lifetime killing layer is a layer of polysilicon deposited over the silicon structure. Preferably the polysilicon layer is undoped. Very low doping levels may be permissible, in which case the polysilicon can be considered as being substantially undoped. However, other carrier lifetime killing techniques may also be used, in place of or in addition to the formation of the polysilicon layer. Thus doping with impurities such as gold, platinum and so on may also be performed to form the carrier lifetime killing layer. Aluminum Oxide and/or Silicon Nitride may also be used to reduce carrier lifetimes.
The carrier life time killing layer may also function as a passivation over the surface of the silicon layer. However, a further layer of oxide, such as silicon dioxide, may be formed over the carrier life time killing layer.
It is thus possible to provide a polysilicon layer or layer of other material that acts as a carrier lifetime killer This has the effect of preventing the formation of parasitic conduction layers that might occur subsequent to the deposition of an oxide layer over the passivation.
A further aspect of this disclosure relates to the formation of a RF component for use in a frequency range of around or above 1 GHz, for example between one and several GHz or tens of GHz. Such a component may be a micromechanical switch for the switching of signals in a signal path. The component may also be a transmission line, a filter, a signal combiner, a signal splitter, a RLC network, a coupler such as directional coupler, or another RF component.
According to a further aspect of this disclosure, there is provided a method of forming a substrate, the method comprising receiving a doped semiconductor wafer formed by the Czochralski process, and depositing a layer of undoped polysilicon over a surface of the wafer.
The inventors have found that adding a layer that acts as a carrier lifetime killer, thereby reducing the instance of thermally generated carriers (holes or electrons) within the semiconductor substrate significantly increases the resistivity of the relatively low cost CZ wafer such that it has sufficiently high resistivity to be used within an RF application. Thus, such an application might be the provision of a MEMS switch operating at several GHz, for example in the 1 to 6 GHz range, or at other ranges in the GHz frequency space.
The cap wafer can be adhered to the wafer 2 using a glass frit or similar technology for wafer to wafer bonding.
In testing, such a switch was able to yield a bandwidth of greater than 11 GHz and an insertion loss of less than 0.5 dB up to 7.5 GHz and off isolation in excess of 25 dB up to 6.5 GHz. Thus the processes for forming the switch components are available to the person skilled in the art and are reliable.
However, the switch arrangement shown in
The person skilled in the art has various techniques in order to distinguish between CZ and FZ wafers. One such identifier is the concentration of interstitial oxygen. FZ silicon has an oxygen concentration of <0.5 ppma (parts per million atoms) whereas for CZ silicon is generally >10 ppma. Interstitial oxygen concentration can be measured by IR absorption (typically at 9.03 μm or 5.81 μm). Another approach is to measure the facture strength of the wafer as CZ wafers are more robust and fracture less easily. Techniques for measuring fracture strength (such as the 3 point bending method) are known and need not be described here.
The processes described here need not be restricted solely to MEMS switches. Thus a substrate can also be used to form waveguides and filters using transmission line technologies including, for example, co-planar waveguides. The formation of such components in transmission lines is well known to the person skilled in that particular art and will not be described further here. It should be noted that the co-planar waveguides may also be shielded by the provision of conductors running substantially perpendicular to the direction of the strip line conductors, and separated there from by a further layer of oxide.
An example of a coplanar waveguide is shown in
The thickness of the dielectric or oxide 4 may be varied to control the characteristic impedance of the wafer, in measurements in the range of 0 to 10 GHz, an oxide thickness of approximately 2 microns gave a characteristic impedance of around 30 Ω at 2 GHz rising gently to about 42 Ω at 10 GHz, whereas an oxide thickness of 8 microns gave an impedance of around 50 Ω at 2 GHz which maintained a substantially steady value across the frequency range, rising to about 58 Ω at 10 GHz. Thus this is readily compatible with RF circuits and components expecting a nominal impedance of 50 Ω.
The propagation loss in decibel per millimeter is plotted against frequency in GHz for:
The graph show that the inclusion of the undoped polysilicon layer over a wafer formed by the CZ process provides a significant reduction in propagation loss compared to wafers not having a polysilicon layer.
The data shown in
It is thus possible to provide acceptable RF performance in the GHz range using components formed over the CZ wafer, where such a wafer has been processed to include a carrier lifetime killing layer at its surface. Such a CZ wafer may have a resistivity in a range of 3000 to 30000 Ωcm. This enables the cheaper and more robust CZ technology to be used in foundries which are generally designed to be used with this wafer type. Thus the risk of breakage of a wafer during handling is much reduced, and hence the yield is increased, as is profitability or alternatively cost to the customer can be decreased.
It is also noted that in some embodiments the avoidance of alumina passivation layer (for example substitution with a silicon dioxide layer) and use of a polysilicon layer may also be employed with Float Zone silicon to provide some advantages in subsequent device processing steps.
As noted before, high resistivity substrates can be used in conjunction with other RF microelectronic components such as filers (resistor/capacitor/inductor or micro strip), couplers (directional or otherwise) and other RF components. Such components may be provided in a package and be regarded as a “chip”.
Whilst use of undoped polysilicon has been discussed, small or trace levels of doping may be acceptable without degrading performance.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the disclosure. Indeed, the novel systems, apparatus, and methods described herein may be embodied in a variety of other forms. Furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the disclosure. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the disclosure. Accordingly, the scope of the present inventions is defined by reference to the claims.
