Patent Application
20190019903
The present invention relates to a Silicon-Germanium (Si—Ge)-based avalanche photodiode detector, and more particularly to a silicon waveguide integrated with Si—Ge avalanche photodiode detector.
Silicon photonic optical links have become a promising interconnect vehicle for data communication within data centers and high-performance computers at short distances, as well as for long-haul telecommunication, due to both low cost and complementary metal-oxide semiconductor (CMOS) compatibility.
A photodiode is very often used as means to convert an optical signal into an electric signal at high speed. A typical one is a pin-type photodiode. The pin-type photodiode is constructed in such a structure in which a i-layer of an intrinsic semiconductor is sandwiched between a p-layer of a p-type semiconductor and an p-layer of an n-type semiconductor. At the time of operation of the pin-type photodiode, a reverse bias Voltage VR supplied from a bias power source is applied between the p-layer and the n-layer of the diode, so that substantially the whole region of the high resistance i-layer is converted to a layer of charge carrier depletion. An electric field exists in the depleted i-layer.
At such a case, when a photon having energy larger than the band gap Eg of the semiconductor composing the i-layer is incident and absorbed in the i-layer, electron-hole pairs are generated. The generated electrons and holes are accelerated by the electric field existing in the depleted i-layer, so that the electrons are drifted in the direction of the n-layer, and the holes are drifted in the direction of the p-layer. At that step, when the electrons and the holes encounter each other, they again form electron-hole pairs and disappear due to recombination between them. The concentrations n, and p, of the residual free carriers in the depleted i-layer are ni˜0 and pi˜0. Thus, it is possible to neglect that the concentrations nph, and pph, of the photo-carriers generated by the photo-absorption are reduced due to the recombination between the photo carriers and the residual free carriers. When electrons generated by the photo-absorption reach the n-layer, they are outputted as “photocurrent from the photodiode. The amount of the outputted “photocurrent corresponds to the number of photons (“absorbed photon amount”) which are absorbed in the i-layer to generate the electron-hole pairs. The amount of the outputted “photocurrent” Iph, which is converted by a load resistor Rload into a voltage, is detected as a signal voltage of Vsignal.(=Iph×Rload).
The main factors which limit the response speed of the optic-to-electric conversion by the pin type photodiode are the time constant of the circuit, which is determined by the product (Rload·C) of the load resistor Rload and the electric capacitance C formed by the depletion layer, and the carrier travelling time, which is required for the electrons and holes to pass through the depletion layer.
On the other hand, a photodetector having sensitivity in a wavelength range from the 1.3 μm band to the 1.55 μm band is required in order to perform optical fiber communication at very high speed and over a long distance. Conventionally, a photodetector using a compound semiconductor based material, such as InGaAs, has been used. However, by the use of SiGe or Ge which have sensitivity in the wavelength range from the 1.3 μm band to the 1.55 μm band, it has become possible to realize a low cost photodetector to which a silicon process can be applied.
In a process of manufacturing a p-i-n type Ge photodiode, a Ge layer is, for example, selectively epitaxially grown on a highly doped Si layer by using SiO2, as a mask, and then an upper electrode layer is further grown to laminate thereon, and thereby, a mesa structure is produced. Alternatively, after a heavy doped layer used as an electrode is formed on a planar Substrate, a Ge layer is epitaxially grown thereon; an upper electrode layer is further grown to laminate thereover, and then, the layers are etched to produce a mesa structure therefrom.
It is well known that an avalanche photodiode (APD) which is generated by avalanche multiplication to increase internal gain with high sensitivity and responsivity, may provide much higher responsivity due to its internal carrier multiplication mechanism and silicon is one of the best materials for APD because of its favorable ionization coefficient ratio. A normal incident Ge/Si APD with a conventional separate absorption, charge, and multiplication (SACM) structure has been demonstrated recently for 1.3-μm light detection, in which an i-Si multiplication layer, a p-Si charge layer, and an i-Ge absorbing layer were epitaxially grown on an n+-Si substrate sequentially.
The internal gain of an APD comes from the following semiconductor impact ionization property: at high enough electric field, high kinetic energy carriers bombard electronic bounds, losing their energies and creating multiple carriers. At telecom wavelengths, APDs were conventionally built on III-V materials for photon absorption, however silicon is a much better material for the APD gain multiplication region compared to most III-V materials as it has a much lower impact ionization ratio (the ratio between the impact ionization coefficients of electron and holes, and k=0.02 for bulk silicon) and consequently lower excess noises. However, there is still a need for a high performance APD with high sensitivity and wide bandwidth, and thus a butt-coupled APD has been developed.
It is an object of the present invention to provide a silicon waveguide integrated with integrated with Si/Ge avalanche photodiode detector (APD).
It is another object of the present invention to provide a Si/Ge-based APD with high sensitivity and wide bandwidth efficiently butt-coupled with a large cross-section silicon waveguide.
In one aspect, fabrication of the integrated waveguide-based photodetector having lateral PIN configuration may include a substrate having a base semiconductor layer and an insulator layer disposed thereon. The insulator layer may serve as a bottom cladding layer of the waveguide. Furthermore, a top semiconductor layer is disposed over the insulator layer. In a particular embodiment, the substrate is an SOI (Silicon on Insulator) wafer such that the top and the base semiconductor layers consist essentially of single-crystal silicon and the insulator layer consists essentially of silicon dioxide. A waveguide is defined on the layer, for example, by masking the desired configuration of the waveguide using a patterned photoresist layer and then etching the exposed portions of the layer. In one embodiment, the APD can be fabricated on a 220 nm SOI substrate with 3 μm-thick buried oxide.
An opening is then defined on the substrate. In one embodiment, the opening can be formed by etching the top semiconductor layer. More specifically, the opening can be formed by etching the top semiconductor layer down to 0.6 μm above the insulator layer. The opening can be formed by any method known in the art, for example, by applying a patterned photoresist layer over the top semiconductor layer followed by etching of portions of the layers exposed by the photoresist.
An avalanche photodiode detector (APD) can then be formed in the opening and butt-coupled with the waveguide. More specifically, the APD formed in the opening is butt-coupled with the waveguide such that a butt end of the waveguide is part of the sidewall of the APD.
For a fabrication process of the APD, the top semiconductor layer can be a silicon layer and the opening can be patterned and implanted with phosphorus to form an n+ conductive layer, and two n-type metal contacts can also be formed.
A silicon dioxide layer can be deposited and pattered, and an intrinsic silicon layer can be grown on the n+ conductive layer as a multiplication layer for the APD and boron can be doped on the intrinsic silicon layer to form a charge layer for the APD. In one embodiment, the charge layer can be formed by ion implantation. In another embodiment, the charge layer can be formed by in situ doping during the growth of the silicon layer. A rapid thermal annealing process (e.g. 1000° C./60 second) may be followed after the charge layer is formed. A germanium layer can be grown on top of the charge layer for a predetermined thickness followed by another thermal annealing process and boron is implanted on the germanium layer to form a p-contact for the APD.
In another aspect, a method for manufacturing an integrated avalanche photodetector may include steps of providing a silicon-insulator substrate including a top layer, an insulator layer and a base layer; partially removing the top layer to form an optical waveguide over the insulator layer; forming an opening at least through the cladding layer and the insulator layer extending to a first portion of the base layer; and forming an avalanche photodetector over the first portion of the base layer at least in the opening and optically coupled to the waveguide.
The detailed description set forth below is intended as a description of the presently exemplary device provided in accordance with aspects of the present invention and is not intended to represent the only forms in which the present invention may be prepared or utilized. It is to be understood, rather, that the same or equivalent functions and components may be accomplished by different embodiments that are also intended to be encompassed within the spirit and scope of the invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood to one of ordinary skill in the art to which this invention belongs. Although any methods, devices and materials similar or equivalent to those described can be used in the practice or testing of the invention, the exemplary methods, devices and materials are now described.
All publications mentioned are incorporated by reference for the purpose of describing and disclosing, for example, the designs and methodologies that are described in the publications that might be used in connection with the presently described invention. The publications listed or discussed above, below and throughout the text are provided solely for their disclosure prior to the filing date of the present application. Nothing herein is to be construed as an admission that the inventors are not entitled to antedate such disclosure by virtue of prior invention.
As used in the description herein and throughout the claims that follow, the meaning of “a”, “an”, and “the” includes reference to the plural unless the context clearly dictates otherwise. Also, as used in the description herein and throughout the claims that follow, the terms “comprise or comprising”, “include or including”, “have or having”, “contain or containing” and the like are to be understood to be open-ended, i.e., to mean including but not limited to. As used in the description herein and throughout the claims that follow, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the embodiments. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
In one aspect, as shown in
Referring to
As shown in
A series of cross-section views (along line A-A′ in
A silicon dioxide layer 200 can be deposited and pattered as shown in
As shown in
In another aspect, as shown in
In one embodiment, the avalanche photodetector is butt-coupled to the optical waveguide. In an alternative embodiment, the avalanche photodetector is evanescently coupled to the optical waveguide. In an exemplary embodiment as shown in
While generally described in connection with germanium or silicon-germanium photodetectors integrated with silicon or silicon-based optical waveguides employing silicon or SOI wafers as starting substrates, the invention is not thusly limited and other materials and starting substrates are contemplated without departing from the scope or spirit of the invention.
Having described the invention by the description and illustrations above, it should be understood that these are exemplary of the invention and are not to be considered as limiting. Accordingly, the invention is not to be considered as limited by the foregoing description, but includes any equivalent.
This application claims priority under 35 U.S.C. § 119 (e) to U.S. Provisional Patent Application Ser. No. 62/533,018, filed on Jul. 15, 2017, the entire contents of which are hereby incorporated by reference.
| Number | Date | Country | |
|---|---|---|---|
| 62533018 | Jul 2017 | US |
