1. Field of the Disclosure
The present disclosure relates to a single crystal substrate and a method of fabricating the same, and more particularly, to a single crystal substrate and a single crystal germanium substrate.
2. Description of the Related Art
Single crystal silicon in wafer form, which is the mainstream material for wafers in the semiconductor industry, places a limit on the performance as transistors become smaller. In order to overcome the limitation, silicon-on-insulator (SOI), which has a single crystal silicon layer on an insulator, has been developed. SOI can improve the performance of devices without shrinking the dimensions of the device.
SOI is a high-mobility, single crystal silicon substrate and is a low-power consuming material that can reduce a parasitic capacitance and a short-channel effect, especially a cross-talk between devices. However, the manufacturing cost of a SOI is high.
A method of fabricating a SOI wafer, which is called smart cut, includes an annealing process performed at a high temperature of approximately 1000° C. The method includes coating an oxide layer on an initial bare wafer having a predetermined thickness by heat treatment, forming a boundary layer by injecting hydrogen ions (H+) as impurities underneath a surface of the wafer, bonding the wafer to a separate substrate, separating the boundary layer such that a silicon layer having a predetermined thickness remains on the substrate, and performing high-temperature annealing, etc.
The temperature of the thermal oxidation process reaches 900° C. or higher, and the temperature of the annealing process reaches up to approximately 1100° C. Such high-temperature processes may damage the substrate. Thus, such high-temperature processes in the conventional SOI wafer manufacturing method limit materials for substrates which can be used in the high-temperature processes. Even though a substrate made of a material that is durable at a high temperature is used, the substrate may be thermally impacted.
A semiconductor device manufactured from such a thermally impacted substrate is likely to have natural defects and a low yield. Furthermore, the processes of manufacturing SOI are difficult, and the cost is high. Moreover, the quality of a SOI layer is limited even at the high cost, thereby making it difficult to manufacture high-quality semiconductor devices.
The present invention may provide a single crystal substrate that can be readily fabricated at low cost, and a method of fabricating the single crystal substrate.
According to an aspect of the present invention, there may be provided a single crystal substrate including: a substrate; an insulator formed on the substrate and having a window exposing a portion of the substrate; a selective epitaxial growth layer formed on the portion of the substrate exposed through the window; and a single crystal layer formed on the insulator and the selective epitaxial growth layer, the single crystal layer being crystallized using the selective epitaxial growth layer as a crystallization seed layer.
The substrate may be one of a sapphire substrate, a silicon substrate, and a germanium substrate.
The substrate may be one of the sapphire substrate and a silicon substrate, and then the single crystal is silicon.
The substrate may be a germanium substrate, and then the single crystal is a germanium single crystal.
The insulator may be a Si02 insulating layer, and the insulator may include an Si02 insulating layer and an SiNX layer stacked on the Si02 insulating layer.
A plurality of windows and single crystal layers may be formed, and a boundary may exist between adjacent single crystal layers.
According to another aspect of the present invention, there is provided a method of fabricating a single crystal substrate, the method including: forming an insulator on a substrate; forming a window in the insulator, the window exposing a o portion of the substrate; forming an epitaxial growth seed layer on the portion of the substrate exposed through the window; depositing a crystallization target material layer on the epitaxial growth seed layer and the insulator; and crystallizing the crystallization target material layer by melting and cooling the crystallization target material layer.
The substrate may be one of a sapphire substrate, a silicon substrate, and a germanium substrate. The insulator may be one of a Si02 layer and a SiNX layer, and the insulator may include a Si02 layer and a SiNX layer on the Si02 layer.
The crystallization target material layer may be an amorphous silicon layer or an amorphous germanium layer.
The substrate may be a germanium substrate, and then the single crystal is germanium single crystal.
The above and other features and advantages of the present invention will be described in detailed exemplary embodiments thereof with reference to the attached drawings in which:
Hereinafter, embodiments of a single crystal substrate and a method of fabricating the single crystal substrate according to the present invention will be described in detail with reference to accompanying drawings. A single crystal substrate according to the present invention may be a single crystal silicon substrate or a single crystal germanium substrate.
A Si02 insulator is formed on a silicon substrate or a sapphire substrate.
A window or an opening is formed in the insulator, and a silicon (epi-Si) layer is formed in the window or opening by selective epitaxial growth.
Single crystal silicon (x-Si) layers are formed on the Si02 insulator and the epi-Si layer. The x-Si layers are obtained through the crystallization of amorphous silicon. Here, the epi-Si layer acts as seeds for the crystallization.
The crystallization of the x-Si layer begins with a plurality of seeds, and a boundary between adjacent x-Si layers is located in the middle of the insulator between the x-Si layers. The x-Si layers on both sides of the boundary located on the insulator have highly uniform crystalline structures, and high quality devices can be manufactured from the x-Si layers.
In the single crystal silicon substrate according to the present embodiment, the Si02 insulator has a double layer structure, not the single layer structure. That is, insulators in which a Si02 layer and a SiN, layer are stacked are formed as islands on a silicon substrate or a sapphire substrate. A window (W) or an opening for selective epitaxial growth is formed between adjacent insulators having the double layer structures, and a Si (epi-Si) layer is formed in the window or opening. In addition, a plurality of x-Si layers (two in the present example) with boundaries therebetween are formed on the Si02 insulators and the epi-Si layers.
The SiNX layer, which is a feature of the present embodiment, may be formed of Si3N4. This material layer suppresses the agglomeration of crystal Si by surface tension during the crystallization of the silicon, so that high-quality single crystal silicon (x-Si) can be obtained. Therefore, any material having a lower interface energy with respect to Si02, such as Si3N4, can be used as a material for the layer on the Si02 layer. The particularly preferred material for the layer on the Si02 layer is Si3N4.
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Single crystal germanium (x-Ge) layers are formed on the Si02 insulator and the epi-Ge layer. Like the single crystal silicon (x-Si) layers described in the above embodiment, the x-Ge layers are obtained through the crystallization of amorphous germanium. Here, the epi-Ge layers are used as seeds for the crystallization.
The crystallization of the x-Ge layers begins with a plurality of seeds, and thus a boundary exists between adjacent x-Ge layers. The x-Ge layers formed on both sides of the boundary on each of the insulators have highly uniform crystalline structures.
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A method of fabricating a single crystal silicon substrate having such a structure as described above is described hereafter. A method of fabricating a single crystal germanium substrate can be easily derived from the single crystal silicon substrate fabrication method. When fabricating the single crystal silicon substrate, a silicon wafer or a sapphire substrate is used. When fabricating the single crystal germanium substrate, a germanium wafer is used. Seeds and materials to be crystallized are silicon or germanium.
Hereinafter, a method of fabricating a single crystal silicon substrate according to the present invention is described.
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As described above, a method of fabricating a single crystal germanium substrate can be easily derived from the above-describe method of fabricating a single crystal silicon substrate. The processing conditions are similar to those used to form the single crystal silicon substrate. Instead of the silicon substrate or sapphire substrate, a germanium substrate is used. All the seed layers and materials to be crystallized are germanium.
The complete crystallization of single crystal silicon is related with the gap between epi-Si layers or the width of Si02 insulators. Thus, single crystal silicon can be successfully crystallized by reducing the gap between epi-Si layers or the width of Si02 insulators. This is because there is a limit to the lateral growth of crystal by laser melting and cooling processes. When the width of an insulator is two times greater than the width of the insulator in the present invention, in center portions of the insulators where lateral crystallization cannot reach, polycrystalline silicon is formed through frequent nucleation of liquefied silicon.
As described above, according to the present invention, a single crystal silicon substrate and a single crystal germanium substrate can be easily fabricated at low cost. Therefore, devices can be manufactured at low cost using a method of fabricating such a single crystal substrate according to the present invention.
The present invention can be applied to various fields in which a single crystal silicon or germanium substrate having an SOI structure is required.
The method of fabricating a single crystal substrate according to the present invention can be applied to TFT and devices using silicon, for example, solar batteries.
While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.
Number | Date | Country | Kind |
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10-2004-0099745 | Dec 2004 | KR | national |
10-2005-0016266 | Feb 2005 | KR | national |
This application is a divisional application of U.S. patent application Ser. No. 11/289,311, filed on Nov. 30, 2005, which claims the benefit of Korean Patent Application No. 10-2004-0099745, filed on Dec. 1, 2004, and No. 10-2005-0016266, filed on Feb. 26, 2005 in the Korean Intellectual Property Office, and U.S. Provisional Patent Application No. 60/657,711, filed on Mar. 3, 2005, in the U.S. Patent and Trademark Office, the entire disclosures of which are incorporated herein by reference.
Number | Date | Country | |
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60657711 | Mar 2005 | US |
Number | Date | Country | |
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Parent | 11289311 | Nov 2005 | US |
Child | 12461315 | US |