This application claims priority to China Application Serial Number 201210129658.3, filed Apr. 27, 2012, which is herein incorporated by reference.
1. Technical Field
The present disclosure relates to a solar cell module, and more particularly to a solar cell module including bypass diode.
2. Description of Related Art
Recently, solar cell modules have been extensively used in portable electronic devices, as well as on roofs and external walls of buildings. A solar cell module usually includes a plurality of solar cells. When one of the solar cells in the solar cell module is shaded, the power may not be normally outputted due to shadow effect. Moreover, the shaded solar cell may generate high temperature to damage the solar cell module. A conventional method for solving shadow effect of the solar cell module is to assemble a diode adjacent to each of the solar cells. When one of the solar cells cannot normally provide power, another electric current pass through the diode is provided, such that the solar cell module can be uninterruptedly working without damage.
An aspect of the present disclosure is to provide a solar cell module.
In an embodiment of the present disclosure, a solar cell module includes a first solar cell and a second solar cell. The first solar cell includes a first metal substrate having a first surface and a second surface opposite to the first surface, a first photoelectric conversion layer located on a side the same as the first surface of the first metal substrate, a first top electrode layer located on a side of the first photoelectric conversion layer opposite to the first metal substrate, a first P-N junction semiconductor located on a side the same as the second surface of the first metal substrate, and a first bottom electrode layer located on a side of the first P-N junction semiconductor opposite to the first metal substrate. The second solar cell includes a second metal substrate having a first surface and a second surface opposite to the first surface, a second photoelectric conversion layer located on a side the same as the first surface of the second metal substrate, a second top electrode layer located on a side of the second photoelectric conversion layer opposite to the second metal substrate and electrically coupled to the first metal substrate, a second P-N junction semiconductor located on a side the same as the second surface of the second metal substrate, and a second bottom electrode layer located on a side of the second P-N junction semiconductor opposite to the second metal substrate and electrically coupled to the first metal substrate.
An aspect of the present disclosure is to provide an electronic device.
In an embodiment of the present disclosure, an electronic device includes a display screen for displaying an image, an input receiving unit for receiving an input instruction, a control unit electrically coupled to the display screen and the input receiving unit for controlling the display screen to display the corresponding image in accordance with the input instruction received by the input receiving unit, and the solar cell module electrically coupled to the display screen, the input receiving unit, and the control unit for providing power to the display screen, the input receiving unit, and the control unit.
An aspect of the present disclosure is to provide a manufacturing method for solar cell.
In an embodiment of the present disclosure, a manufacturing method for solar cell includes the steps of:
A first metal substrate having a first surface and a second surface opposite to the first surface is provided.
A first P-type semiconductor layer is deposited or coated on the first surface.
A first I-type semiconductor layer is deposited or coated on the first P-type semiconductor layer.
A first N-type semiconductor layer is deposited or coated on the first I-type semiconductor layer.
A first top electrode layer is formed on the first N-type semiconductor layer.
A second N-type semiconductor layer is deposited or coated on the second surface.
A second P-type semiconductor layer is deposited or coated on the second N-type semiconductor layer.
A first bottom electrode layer is formed on the second P-type semiconductor layer.
An aspect of the present disclosure is to provide a manufacturing method for solar cell.
In an embodiment of the present disclosure, a manufacturing method for solar cell includes the steps of:
A first metal substrate having a first surface and a second surface opposite to the first surface is provided.
A first N-type semiconductor layer is deposited or coated on the first surface.
A first I-type semiconductor layer is deposited or coated on the first N-type semiconductor layer.
A first P-type semiconductor layer is deposited or coated on the first I-type semiconductor layer.
A first top electrode layer is formed on the first P-type semiconductor layer.
A second P-type semiconductor layer is deposited or coated on the second surface.
A second N-type semiconductor layer is deposited or coated on the second P-type semiconductor layer.
A first bottom electrode layer is formed on the second N-type semiconductor layer.
In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the disclosed embodiments. It will be apparent, however, that one or more embodiments may be practiced without these specific details. In other instances, well-known structures and devices are schematically shown in order to simplify the drawings.
The first metal substrate 212 has a first surface 211 and a second surface 213 opposite to the first surface 211. The first photoelectric conversion layer 214 is located on a side the same as the first surface 211 of the first metal substrate 212. The first top electrode layer 216 is located on the first photoelectric conversion layer 214. The first P-N junction semiconductor 218 is located on a side the same as the second surface 213 of the first metal substrate 212. The first bottom electrode layer 222 is located on the first P-N junction semiconductor 218. That is to say, the first top electrode layer 216 is located on a side of the first photoelectric conversion layer 214 opposite to the first metal substrate 212, and the first bottom electrode layer 222 is located on a side of the first P-N junction semiconductor 218 opposite to the first metal substrate 212.
Similarly, the second metal substrate 232 has a first surface 231 and a second surface 233 opposite to the first surface 231. The second photoelectric conversion layer 234 is located on a side the same as the first surface 231 of the second metal substrate 232. The second top electrode layer 236 is located on the second photoelectric conversion layer 234. The second P-N junction semiconductor 238 is located on a side the same as the second surface 233 of the second metal substrate 232. The second bottom electrode layer 242 is located on the second P-N junction semiconductor 238. That is to say, the second top electrode layer 236 is located on a side of the second photoelectric conversion layer 234 opposite to the second metal substrate 232, and the second bottom electrode layer 242 is located on a side of the second P-N junction semiconductor 238 opposite to the second metal substrate 232.
In this embodiment, the first photoelectric conversion layer 214 is in ohmic contact with the first surface 211 of the first metal substrate 212, and the first P-N junction semiconductor 218 is in ohmic contact with the second surface 213 of the first metal substrate 212. Similarly, the second photoelectric conversion layer 234 is in ohmic contact with the first surface 231 of the second metal substrate 232, and the second P-N junction semiconductor 238 is in ohmic contact with the second surface 233 of the second metal substrate 232. The second top electrode layer 236 is electrically coupled to the first surface 211 of the first metal substrate 212 by a ribbon 250, and the second bottom electrode layer 242 is electrically coupled to the second surface 213 of the first metal substrate 212 by a ribbon 260.
Furthermore, the first photoelectric conversion layer 214 may include a first P-type semiconductor layer 215, and a first N-type semiconductor layer 219. The first photoelectric conversion layer 214 may further include a first I-type semiconductor layer 217. The first P-type semiconductor layer 215 is located on a side the same as the first surface 211 of the first metal substrate 212. In this embodiment, the first P-type semiconductor layer 215 is located on the first surface 211 of the first metal substrate 212. The first I-type semiconductor layer 217 is located on the first P-type semiconductor layer 215. The first N-type semiconductor layer 219 is located on the first I-type semiconductor layer 217. The first P-N junction semiconductor 218 may include a second N-type semiconductor layer 224 and a second P-type semiconductor layer 226. The second N-type semiconductor layer 224 is located on a side the same as the second surface 213 of the first metal substrate 212. The second P-type semiconductor layer 226 is located on the second N-type semiconductor layer 224, and is located between the second N-type semiconductor layer 224 and the first bottom electrode layer 222.
Similarly, the second photoelectric conversion layer 234 may include a third P-type semiconductor layer 235, and a third N-type semiconductor layer 239. The second photoelectric conversion layer 234 may further include a second I-type semiconductor layer 237. The third P-type semiconductor layer 235 is located on a side the same as the first surface 231 of the second metal substrate 232. In this embodiment, the third P-type semiconductor layer 235 is located on the first surface 231 of the second metal substrate 232. The second I-type semiconductor layer 237 is located on the third P-type semiconductor layer 235. The third N-type semiconductor layer 239 is located on the second I-type semiconductor layer 237. Moreover, the second P-N junction semiconductor 238 may include a fourth N-type semiconductor layer 244 and a fourth P-type semiconductor layer 246. The fourth N-type semiconductor layer 244 is located on a side the same as the second surface 233 of the second metal substrate 232. The fourth P-type semiconductor layer 246 is located on the fourth N-type semiconductor layer 244, and is located between the fourth N-type semiconductor layer 244 and the second bottom electrode layer 242.
However, in other embodiments, the positive and negative levels of the first photoelectric conversion layer 214, the first P-N junction semiconductor 218, the second photoelectric conversion layer 234, and the second P-N junction semiconductor 238 may be different form the solar cell module 200 shown
In this embodiment, the material of the first and second metal substrates 212, 232 may be selected from the group consisting of gold, silver, copper, iron, tin, indium, aluminum, and platinum. The material of the first top electrode layer 216, the first bottom electrode layer 222, the second top electrode layer 126, and the second bottom electrode layer 242 may include indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, or indium germanium zinc oxide. The material of the first and second photoelectric conversion layers 214, 234 may include amorphous silicon, poly silicon, cadmium telluride, copper indium gallium selenium, gallium arsenide, or polymer. The material of the first and second P-N junction semiconductors 218, 238 may include amorphous silicon, poly silicon, cadmium telluride, copper indium gallium selenium, or gallium arsenide.
It is to be noted that the connection relationships of the aforementioned elements will not be repeated in the following description.
In this embodiment, the sun 300 is only an example as a light source, in other embodiments, the solar cell module 200 may be shined by another light source, such as various lighting devices having bulbs, fluorescent tubes, or light emitting diodes.
As a result, although the first and second solar cells 210, 230 of the solar cell module 200 is not electrically connected to a conventional diode, the solar cell module 200 has a diode equivalent circuit 270 (shown in
Similarly, the second P-N junction semiconductor 238 includes the fourth N-type semiconductor layer 244, a second insulator 284, and the fourth P-type semiconductor layer 246. The fourth N-type semiconductor layer 244 is located on a side the same as the second surface 233 of the second metal substrate 232. The second insulator 284 is located on a side the same as the second surface 233 of the second metal substrate 232, and is adjacent to the fourth N-type semiconductor layer 244. The fourth P-type semiconductor layer 246 is located on the second insulator 284, and is located between the second insulator 284 and the second bottom electrode layer 242.
In this embodiment, since the material usage quantity (e.g., indium tin oxide) of the first and second bottom electrode layer 222, 242 can be decreased, the cost of the solar cell module 200 can be saved.
In the aforementioned embodiments of the present disclosure, the second top electrode layer is located on the second photoelectric conversion layer and is electrically coupled to the first metal substrate. The second P-N junction semiconductor is located on the second surface of the second metal substrate. Moreover, the second bottom electrode layer is located on a side away from the second metal substrate of the second P-N junction semiconductor and is electrically coupled to the first metal substrate. When the solar cell module is used and the second solar cell is not shaded, an electric current flows in the second top electrode layer from the first metal substrate, and the electric current flows out the second substrate through the second photoelectric conversion layer. When the second solar cell is shaded, the electric current flows in the second bottom electrode layer from the first metal substrate, and the electric current flows out the second metal substrate through the second P-N junction semiconductor. As a result, although each of the solar cell of the solar cell module is not electrically connected to a conventional diode, the solar cell module has a diode equivalent circuit to prevent shadow effect so as not to output power, such that the solar cell module can keep working and is not damaged.
Moreover, the second P-N junction semiconductor and the second bottom electrode layer can be formed when the solar cell is manufactured. Therefore, the process difficulty of the solar cell module is not increased, and the manufacturing and material costs of mounting the conventional diode and additional conductive wire adjacent to the solar cell in the past can be economized. Furthermore, the area of the solar cell module is not affected by the conventional diode so as to have more useful area. As a result, the area of the solar cell is increased, such that the power output of the solar cell module is improved. In addition, since the solar cell module can decrease the depth and the area thereof, the solar cell module is advantageous to be applied in an electric device.
The reader's attention is directed to all papers and documents which are filed concurrently with this specification and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.
All the features disclosed in this specification (including any accompanying claims, abstract, and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.
Number | Date | Country | Kind |
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201210129658.3 | Apr 2012 | CN | national |