SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME

Information

  • Patent Application
  • 20070221973
  • Publication Number
    20070221973
  • Date Filed
    March 20, 2007
    17 years ago
  • Date Published
    September 27, 2007
    16 years ago
Abstract
A solid-state imaging device includes: a plurality of photodiodes arranged in a matrix on a semiconductor substrate 1 for storing a signal charge converted from incident light; MOS transistors for reading the signal charge stored in the photodiode, an element isolation region for isolating the photodiode from the MOS transistors, an implanted isolation layer formed below the element isolation region, and an impurity region surrounding the photodiode, the sides and bottom of the element isolation region and the implanted isolation layer. The implanted isolation layer covers the sides and bottom of the element isolation region. The solid-state imaging device can efficiently suppress the sensitivity degradation caused by the outflow of electric charge.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a cross-sectional view showing a relevant portion of a solid-state imaging device according to a first embodiment of the present invention.



FIGS. 2A to 2J are cross-sectional views illustrating the steps of a method for manufacturing the solid-state imaging device of the first embodiment.



FIGS. 3A to 3E are enlarged cross-sectional views of relevant portions of FIGS. 2B to 2F, respectively.



FIG. 4 is a cross-sectional view illustrating another configuration of a high concentration implanted isolation layer of FIG. 3E.



FIG. 5 is a schematic plan view illustrating a configuration of a pixel cell of a solid-state imaging device according to a second embodiment of the present invention.



FIG. 6A is a schematic plan view of a floating diffusion layer of the solid-state imaging device of the second embodiment showing the shape of the floating diffusion layer and a portion thereof on which stress concentrates.



FIG. 6B is a schematic plan view of a floating diffusion layer of a solid-state imaging device of a comparative example showing the shape of the floating diffusion layer and a portion thereof on which stress concentrates.



FIG. 7 is a schematic plan view showing a part of a pixel cell of a conventional solid-state imaging device.



FIG. 8 is a circuit diagram showing a configuration of a MOS-type solid-state imaging device.



FIG. 9 is a plan view showing a configuration of a region of a photodiode and a MOS transistor formed in the solid-state imaging device of FIG. 8.



FIG. 10 is a cross-sectional view taken along the line A-A of FIG. 9.


Claims
  • 1. A solid-state imaging device comprising: a plurality of photodiodes arranged in a matrix on a semiconductor substrate for storing a signal charge converted from incident light;MOS transistors for reading out the signal charge stored in the photodiode;an element isolation region for isolating the photodiode from the MOS transistors;an implanted isolation layer formed below the element isolation region; andan impurity region surrounding the photodiode, the sides and bottom of the element isolation region and the implanted isolation layer,wherein the implanted isolation layer covers the sides and bottom of the element isolation region.
  • 2. The solid-state imaging device according to claim 1, wherein the element isolation region is formed by STI (Shallow Trench Isolation).
  • 3. The solid-state imaging device according to claim 1, wherein a P-type well is formed in the semiconductor substrate,the MOS transistor comprises a source and a drain formed in the P-type well, andan impurity having a conductivity type opposite to that of the source and the drain included in the MOS transistor is implanted into the implanted isolation layer.
  • 4. The solid-state imaging device according to claim 1, wherein the element isolation region is formed to isolate the photodiodes from each other, andthe implanted isolation layer is formed to prevent an outflow of electric charge from the photodiode included in one of the pixel cells to the photodiode included in another pixel cell adjacent thereto.
  • 5. The solid-state imaging device according to claim 1, wherein the implanted isolation layer has an impurity concentration higher than that of the impurity region formed on the sides of the element isolation region.
  • 6. The solid-state imaging device according to claim 1, wherein the implanted isolation layer is formed in a position such that it does not overlap adjacent photodiode.
  • 7. The solid-state imaging device according to claim 1, wherein the photodiode comprises a surface shield layer formed in a surface of the semiconductor substrate and a storage photodiode layer formed below the surface shield layer, andthe implanted isolation layer has an impurity concentration higher than that of the storage photodiode layer.
  • 8. The solid-state imaging device according to claim 1, wherein the solid-state imaging device has a structure in which multiple pixels are included in one cell.
  • 9. A method for manufacturing a solid-state imaging device comprising: a plurality of photodiodes arranged in a matrix on a semiconductor substrate for storing a signal charge converted from incident light; MOS transistors for reading out the signal charge stored in the photodiode; an element isolation region for isolating the photodiode from the MOS transistors; an implanted isolation layer covering the sides and bottom of the element isolation region; and an impurity region surrounding the photodiode, the sides and bottom of the element isolation region and the implanted isolation layer, the method comprising the steps of: forming a trench by trenching the semiconductor substrate so as to form the element isolation region;implanting an impurity obliquely into a sidewall of the trench and then vertically into a bottom of the trench so as to form the implanted isolation layer;forming the element isolation region in the trench after the impurity implanting step; andforming the photodiode and one or more of the MOS transistors after the element isolation region forming step.
  • 10. The method for manufacturing a solid-state imaging device according to claim 9, wherein the semiconductor substrate comprises:an N-type substrate,a P-type well surrounding the photodiode formed in a surface region of the N-type substrate and the sides and bottom of the element isolation region and the implanted isolation layer.
  • 11. The method for manufacturing a solid-state imaging device according to claim 9, wherein the solid-state imaging device has a structure in which multiple pixels are included in one cell, andin the step of implanting an impurity into a sidewall of the trench formed around the photodiode included in each pixel, the impurity is implanted from a direction including a horizontal direction component perpendicular to the sidewall of the trench.
  • 12. The method for manufacturing a solid-state imaging device according to claim 11, wherein the sidewall of the trench comprises a portion that is neither vertical or horizontal relative to the photodiode, andthe impurity is implanted from multiple directions including a horizontal direction component perpendicular to the sidewall of the trench.
Priority Claims (2)
Number Date Country Kind
JP2006-083420 Mar 2006 JP national
JP2007-011742 Jan 2007 JP national