Patent Grant
11037969
The present invention relates to a solid-state imaging device and an electronic device.
An electronic device such as a digital video camera or a digital still camera includes a solid-state imaging device. For example, a CMOS (complementary metal oxide semiconductor) type image sensor is used as the solid-state imaging device.
The solid-state imaging device has a plurality of pixels arranged on a surface of a semiconductor substrate. A photoelectric conversion unit is provided in each pixel. The photoelectric conversion unit is, for example, a photodiode, and generates signal charges by sensing light coming via an externally attached optical system in a light sensing surface and by photoelectric-converting the light.
Among the solid-state imaging devices, each pixel of the CMOS type image sensor includes a readout circuit in addition to the photoelectric conversion unit. The readout circuit includes a plurality of transistors, reads out signal charges generated in the photoelectric conversion unit, and outputs the read-out signal charges to a signal line as an electric signal.
In the CMOS type image sensor, the photoelectric conversion unit reads out the signal charges for each pixel or for each row where a plurality of pixels is arranged. In this case, exposure time for accumulating the signal charges is difficult to match in all the pixels, and thus in some cases, a captured image is distorted. Particularly, if the motion of a subject is great, this defect is noticeably generated.
In order to prevent this defect from being generated, a “global exposure” is performed in which all the pixels start exposure at the same time and finish the exposure at the same time.
The “global exposure” is performed, for example, in a “mechanical shutter method” using a mechanical shutter. Specifically, all the pixels start exposure by opening the mechanical shutter, and finish the exposure by closing the mechanical shutter. However, in this “mechanical shutter method,” the size of a device is difficult to decrease since a mechanical light blocking unit is used. Also, since the speed of the driving operation of the mechanism is difficult to increase, the simultaneous exposure in all the pixels is hard to perform with high accuracy.
The “global exposure” is performed in a “global shutter method” in addition to the “mechanical shutter method.” Specifically, the “global exposure” is performed by simultaneously driving all the pixels through an electrical control without using the mechanical shutter. In the global shutter method, a size of a device can be easily reduced since the mechanical light blocking unit is not used. Further, the speed of the driving operation is easily increased, and the simultaneous exposure in all the pixels can be performed with high accuracy (for example, refer to Japanese Unexamined Patent Application Publications Nos. 2004-055590, 2009-268083 and 2004-140152).
Meanwhile, in the solid-state imaging device, there is a demand for an increase in the number of pixels along with the small size. In this case, since the size of one pixel is small, it is hard for each pixel to sense a sufficient amount of light, and thus it is not easy to improve the image quality of a captured image. For this reason, it is necessary for the solid-state imaging device to have high sensitivity.
In order to realize the high sensitivity, there has been proposed one where a chalcopyrite based compound semiconductor film such as a CuInGaSe2 film with high light absorption coefficient is used in the photoelectric conversion unit (for example, refer to Japanese Unexamined Patent Application Publications No. 2007-123720).
In addition, there has been proposed a “lamination type” where photoelectric conversion units for respective colors are laminated and disposed in a depth direction perpendicular to an imaging surface, instead of disposing the photoelectric conversion units which selectively sense light beams of respective colors in a direction along the imaging surface. In the “lamination type,” each pixel senses not only light of one color but also light of plural colors. For this reason, a light sensing surface is extensively formed and thus use efficiency of light can be improved, thereby improving sensitivity (for example, refer to Japanese Unexamined Patent Application Publications No. 2006-245088).
Further, there has been proposed a “rear surface illumination type” where a photoelectric conversion unit senses light which is incident from a rear surface opposite to a front surface in which circuits, wires and the like are provided, in a semiconductor substrate. In the “rear surface illumination type,” the circuits, the wires and the like, which block or reflect the incident light are not provided in the incident side, and thus sensitivity can be improved (for example, refer to Japanese Unexamined Patent Application Publications No. 2008-182142). In the “rear surface illumination type,” there has been proposed one where a control gate electrode is formed in the photoelectric conversion unit on a surface opposite to the light sensing surface, a potential is controlled by applying a voltage to the photoelectric conversion unit, and signal charges are efficiently transferred (for example, refer to Japanese Unexamined Patent Application Publications No. 2007-258684).
In addition, the inventors of the present invention have recognized that in the solid-state imaging device, light enters an accumulator which accumulates signal charges generated by the photoelectric conversion unit or a readout circuit which reads out the signal charges, which causes noise to be generated, and thus there is a problem in that the image quality of a captured image is deteriorated.
In order to prevent the generation of such a defect, a light blocking film may block light from entering the accumulator or the readout circuit.
However, if the light blocking film is formed between the photoelectric conversion unit and the accumulator or the readout circuit, the area of the light sensing surface becomes small since the aperture ratio is reduced, and thus sensitivity is lowered in some cases.
In addition, light is diffracted or scattered due to the light blocking film, the diffracted light or the scattered light enters the accumulator to generate noise, and thus there are cases where the image quality of a captured image is deteriorated.
In the case of the “rear surface illumination type” solid-state imaging device, the accumulator or the readout circuit is formed on the front surface side opposite to the rear surface side which senses light in the substrate, but, in some cases, the above-described defects are generated since the substrate is thin for reading out the signal charges.
As shown in
In the “rear surface illumination type” solid-state imaging device, photodiodes (not shown) provided inside the silicon substrate 101J sense light passing through the respective portions such as the on-chip lenses ML and the color filters CF. Further, the readout circuit (not shown) provided on the front surface side of the silicon substrate 101J reads out signal charges from the photodiodes (not shown).
As shown in
As such, the inventors of the present invention have recognized that even in the “rear surface illumination type,” the light coming from the rear surface side is not blocked and reaches the front surface side on which the accumulator is provided, and thus there are cases where noise is generated and image quality of a captured image is deteriorated.
Particularly, in a case where imaging is performed in the “global shutter method,” since exposure in all the pixels is performed at the same time and then signal charges are temporarily accumulated in the accumulator, if light enters the accumulator, noise is notably generated.
Therefore, in the solid-state imaging device, there are cases where it is difficult for the small size and the improvement in the image quality of a captured image to be compatible.
Disclosed herein are one or more inventions that provide a solid-state imaging device and an electronic device, of which the size can be easily reduced and which can improve the image quality of a captured image by preventing generation of noise.
According to an embodiment, a solid-state imaging device includes a substrate and a photoelectric conversion region. The substrate has a charge accumulation region. The photoelectric conversion region is configured to generate signal charges to be accumulated in the charge accumulation region. The photoelectric conversion region is provided on the substrate. The photoelectric conversion region comprises a material that is not transparent.
According to an embodiment, an electronic apparatus includes a solid-state imaging device. The solid state imaging device includes (a) a substrate, and (b) a photoelectric conversion region configured to generate signal charges. The photoelectric conversion region is provided on the substrate. The signal processing unit is configured to process an output of the solid-state imaging device. The photoelectric conversion region comprises a material that is not transparent.
According to an embodiment, a method for manufacturing a solid-state imaging device includes forming a charge accumulation region in a substrate, and forming a photoelectric conversion region electrically connected to the charge accumulation region. The charge accumulation region is configured to accumulate signal charges generated by the photoelectric conversion region. The photoelectric conversion region comprises a material that is not transparent.
Accordingly, it is possible to provide a solid-state imaging device and an electronic device, of which a size can be easily reduced and which can suppress generation of defects such as deterioration in image quality of a captured image, by preventing generation of noise.
Hereinafter, devices and constructions embodying principles of the present invention(s) (herein referred to as embodiments) will be described with reference to the accompanying drawings. The description will be carried out in the following order.
1. A first embodiment (a rear surface illumination type)
2. A second embodiment (with a pixel dividing portion (the First))
3. A third embodiment (with a pixel dividing portion (the Second))
4. A fourth embodiment (with a pixel dividing portion (the Third))
5. A fifth embodiment (with an electrode under a photoelectric conversion film)
6. A sixth embodiment (with an electrode under a photoelectric conversion film (a front surface illumination type))
7. A seventh embodiment (in a case of using an off substrate)
8. An eighth embodiment (in a case of laminating a photoelectric conversion film (the First))
9. A ninth embodiment (in a case of laminating a photoelectric conversion film (the Second))
10. A tenth embodiment (in a case of laminating a photoelectric conversion film (the Third))
11. An eleventh embodiment (light blocking with a combination a photoelectric conversion film and a color filter (the First))
12. A twelfth embodiment (light blocking with a combination a photoelectric conversion film and a color filter (the Second))
13. Others
1. A First Embodiment (a Case where a Photoelectric Conversion Film has a Light Blocking Function)
As shown in
The solid-state imaging device 1 senses light (subject image) passing through the optical system 42 using an imaging surface PS and performs a photoelectric conversion for the light, thereby generating signal charges. Here, the solid-state imaging device 1 is driven in response to a control signal output from the control unit 43. Specifically, the solid-state imaging device 1 reads out the signal charges and outputs the read-out signal charges as raw data.
The optical system 42 includes optical members such as an imaging lens and a diaphragm, and is disposed so as to collect the incident light H which is incident as a subject image, on the imaging surface PS of the solid-state imaging device 1.
The control unit 43 outputs various kinds of control signals to the solid-state imaging device 1 and the signal processing circuit 44 so as to control and drive the solid-state imaging device 1 and the signal processing circuit 44.
The signal processing circuit 44 performs a signal process for an electric signal output from the solid-state imaging device 1 and thus generates a digital image of a subject image.
An entire configuration of the solid-state imaging device 1 will be described.
The solid-state imaging device 1 is constituted by, for example, a CMOS type image sensor. The solid-state imaging device 1 includes a silicon substrate 11 as shown in
The imaging area PA has a rectangular shape as shown in
The peripheral area SA is positioned around the imaging area PA as shown in
Specifically, as shown in
The vertical driving circuit 3, as shown in
The column circuit 4, as shown in
The horizontal driving circuit 5 is electrically connected to the column circuit 4 as shown in
The outward output circuit 7, as shown in
The timing generator 8, as shown in
Details thereof will be described later, and the above-described respective portions are operated so as to perform exposure by the “global shutter method.” In other words, incident light is sensed by all the pixels P at the same time, and then the global exposure for finishing the sensing is performed without use of a mechanical light blocking unit. In addition, electric signals output from the respective pixels P are read out to the column circuit 4, and then the accumulated signals in the column circuit 4 are selected by the horizontal driving circuit 5 and sequentially output to the outward output circuit 7.
A detailed configuration of the solid-state imaging device according to this embodiment will be described.
Here,
As shown in
In contrast, a gate MOS 41 is provided on the other side surface (lower surface) of the silicon substrate 11, as shown in
The readout circuit 51, as shown in
Further, a wire layer (not shown) is provided on the other side surface (lower surface) of the silicon substrate 11 so as to cover the respective portions such as the gate MOS 41.
In the solid-state imaging device 1, the photoelectric conversion film 13 senses the incident light H passing through the on-chip lenses ML and the color filters CF from the rear surface (upper surface) side and generates signal charges. The signal charges generated by the photoelectric conversion film 13 are accumulated in an n type impurity area 12 provided in the silicon substrate 11. Thereafter, the signal charges accumulated in the n type impurity area 12 is transferred to an n type impurity region 411 by the gate MOS 41 and are accumulated in the n type impurity region 411. Also, the signal charges are transferred by the gate MOS 42 and read out by the readout circuit 51, and then output to the vertical signal line 27 as electric signals.
That is to say, the solid-state imaging device 1 is constituted by a “rear surface illumination type CMOS image sensor.”
The respective portions will be sequentially described in detail.
In the solid-state imaging device 1, the photoelectric conversion film 13, as shown in
Here, the photoelectric conversion film 13 is provided to cover the n type impurity areas 12 which are formed to correspond to the plural pixels P in the silicon substrate 11. As illustrated, the photoelectric conversion film 13 is adjacent to, in contact with, and/or in direct contact with the n-type impurity areas. Each of the n type impurity areas 12 functions as an accumulator which accumulates the signal charges generated by the photoelectric conversion film 13. In the n type impurity area 12, the impurity is preferably distributed such that concentration of the impurity increases from the upper surface to the lower surface of the silicon substrate. In this way, the signal charges (here, electrons) moved from the photoelectric conversion film 13 can be naturally moved to the gate MOS 41 side in the n type impurity area 12.
In addition, as shown in
The photoelectric conversion film 13 senses the incident light H and performs photoelectric conversion for the light in the respective pixels P, thereby generating signal charges.
As shown in
Specifically, the photoelectric conversion film 13 is connected to a gate of the amplification transistor M21 via the gate MOS 41 and the gate MOS 42, as shown in
The photoelectric conversion film 13 functions as the accumulator which accumulates the signal charges like the n type impurity area 12 and as a light blocking film which blocks the incident light H from reaching the accumulator, in addition to perform the photoelectric conversion. Along therewith, the photoelectric conversion film 13 functions as a light blocking film which blocks the incident light H which travels towards the readout circuit 51, from reaching the readout circuit 51.
Specifically, the photoelectric conversion film 13 is made of a compound semiconductor having a chalcopyrite structure. For example, the photoelectric conversion film 13 is made of CuInSe2 which is the compound semiconductor having the chalcopyrite structure.
As shown in
The photoelectric conversion film 13 may use materials having any crystal structure such as monocrystalline, polycrystalline or amorphous structures as long as the materials have the higher absorption coefficient of visible light than the silicon substrate 11 and realize the photoelectric conversion function.
The photoelectric conversion film 13 may be formed using chalcopyrite materials other than CuInSe2.
As shown in
In addition to the above-described compound semiconductor, the photoelectric conversion film 13 may be formed using a compound semiconductor with the chalcopyrite structure including a copper-aluminum-gallium-indium-zinc-sulfur-selenium based mixed crystal.
As shown in
The conductivity type of the photoelectric conversion film 13 is, for example, a p type. The photoelectric conversion film 13 may be of an i type or an n type, in addition to the p type.
In the solid-state imaging device 1, the gate MOS 41 and the gate MOS 42 are provided for each of the plural pixels P shown in
The gate MOS 41 and the gate MOS 42 output the generated signal charges to the gate of the amplification transistor M21 as the electric signals. Specifically, the gate MOS 41 and the gate MOS 42, as shown in
Here, the gate MOS 41 is provided on the opposite surface (front surface) side to the surface (rear surface) on which the photoelectric conversion film 13 is provided in the silicon substrate 11, as shown in
The gate MOS 41 and the gate MOS 42 have active areas (not shown) formed in the silicon substrate 11, and the gates thereof are made of conductive materials.
In the solid-state imaging device 1, the readout circuits 51 are disposed in plurality so as to correspond to the plural pixels P shown in
As shown in
Although not shown in
In the readout circuit 51, the PD reset transistor M11 resets a potential at the photoelectric conversion film 13.
Specifically, the PD reset transistor M11, as shown in
In the readout circuit 51, the amplification transistor M21 amplifies and outputs the electric signals resulting from the signal charges.
Specifically, the amplification transistor M21, as shown in
In the readout circuit 51, the selection transistor M31 outputs the electric signals output from the amplification transistor M21 to the vertical signal line 27 when the selection signal is input to the selection transistor M31.
Specifically, as shown in
In addition, as shown in
Here, the color filter CF includes filters of the three primary colors, for example, a red filter layer (not shown), a green filter layer (not shown), and a blue filter layer (not shown). Further, the filters of the three primary colors are disposed for each pixel P, for example, in the Bayer arrangement. The arrangement of the filter layers of the respective colors is not limited to the Bayer arrangement, but may be other arrangements.
As shown in
Although not shown in the figure, the wire layer (not shown) is provided on the lower surface (front surface) of the silicon substrate 11 to cover the respective portions such as the gate MOS 41. In the wire layer, a wire (not shown) electrically connected to each circuit element is formed inside an insulating layer (not shown). Specifically, the respective wires constituting the wire layer are laminated and formed so as to function as a wire such as the readout line H41 shown in
The essence of the manufacturing method of the solid-state imaging device 1 will be described.
Here,
First, the photoelectric conversion film 13 is formed as shown in
Here, the respective portions such as the gate MOS 41 are formed on the surface of the silicon substrate 11 before the photoelectric conversion film 13 is formed. Further, the wire layer (not shown) is formed on the surface (front surface) of the silicon substrate 11 so as to cover the respective portions such as the gate MOS 41.
In this embodiment, the respective portions are formed on a silicon layer of a so-called SOI substrate (corresponding to the silicon substrate 11), and then the silicon layer is transcribed onto a surface of another glass substrate (not shown). Thereby, the rear surface side of the silicon substrate 11 which is the silicon layer is seen and (100) surface is exposed. The n type impurity area 12 is formed inside or within a portion of the silicon substrate 11.
Next, as shown in
The photoelectric conversion film 13 is made of the compound semiconductor with the chalcopyrite structure including, for example, CuInSe2 mixed crystal.
In addition, a compound semiconductor with the chalcopyrite structure including copper-aluminum-gallium-indium-sulfur-selenium based mixed crystal may be formed on the silicon substrate 11 so as to lattice-match with the silicon substrate 11, thereby forming the photoelectric conversion film 13.
In this case, the compound semiconductor is epitaxially grown on the silicon substrate 11 by, for example, an MBE method, an MOCVD method, or the like, thereby forming the photoelectric conversion film 13.
The lattice constant of silicon (Si) is 5.431 Å. The CuAlGaInSSe based mixed crystal includes a material corresponding to the lattice constant, and can be formed so as to lattice-match with the silicon substrate 11. Thereby, for example, a CuGa0.52In0.48S2 film is formed on the silicon substrate 11 as the photoelectric conversion film 13.
The photoelectric conversion film 13 is formed so as to have, for example, a p type as a conductivity type. In addition to the p type, the photoelectric conversion film 13 may be formed to have an i type or an n type as the conductivity type.
In this embodiment, the p type CuGa0.52In0.48S2 film is formed and then the photoelectric conversion film 13 is formed such that, for example, concentration of zinc (Zn) which is an n type impurity is reduced according to the crystal growth. Thereby, the photoelectric conversion film 13 can be formed such that the band is tilted in the depth direction z.
The photoelectric conversion film 13 is formed such that the concentration of the impurity becomes, for example, 1014 to 1016 cm−3. In addition, the photoelectric conversion film 13 is formed such that the film thickness becomes 300 nm.
The photoelectric conversion film 13 is formed to cover parts where pixel dividing portions PB are formed on the silicon substrate by epitaxially growing the compound semiconductor.
In the above description, although the case where the n type impurity is contained in the CuGa0.52In0.48S2 film is described, this embodiment is not limited thereto. For example, by appropriately controlling each amount of a group III and a group I to be supplied, the photoelectric conversion film 13 can be formed such that the band is tilted in the depth direction z as in the above description.
In a case where the above-described compound semiconductor is crystal-grown by the MOCVD growth method, for example, the MOCVD device shown in
If the above-described crystal is grown on the substrate (silicon substrate), the substrate can be placed on a susceptor (made of carbon) as shown in
In addition, organic metal raw-materials are bubbled by hydrogen to enter a saturated vapor pressure state, and each raw-material molecule is transferred to a reaction tube. Here, a flow rate of hydrogen which flows towards each raw-material due to a mass flow controller (MFC) is controlled, and a molar amount of the raw-material which is transferred per unit of time is adjusted. The organic metal raw-materials are thermally decomposed on the substrate and grow the crystal. There is a correlation between a ratio of transferred molar amount and a composition ratio of the crystal. Thereby, the composition ratio of the crystal can be arbitrarily adjusted.
As raw gases, the following organic metals may be used.
Specifically, as an organic metal of copper, for example, acetylacetone copper (Cu(C5H7O2)2) is used. In addition, cyclopentadienyl copper triethylene (h5-(C2H5) Cu:P (C2H5)3) may be used.
As an organic metal of gallium (Ga), for example, trimethyl gallium (Ga(CH3)3) is used. In addition, triethyl gallium (Ga(C2H5)3) may be used.
As an organic metal of aluminum (Al), for example, trimethyl aluminum (Al(CH3)3) is used. In addition, triethyl aluminum (Al(C2H5)3) may be used.
As an organic metal of indium (In), for example, trimethyl indium (In(CH3)3) is used. In addition, triethyl indium (In(C2H5)3) may be used.
As an organic metal of selenium (Se), for example, dimethyl selenium (Se(CH3)2) is used. In addition, diethyl selenium (Se(C2H5)2) may be used.
As an organic metal of sulfur (S), for example, dimethyl sulfide (S(CH3)3) is used. In addition, diethyl sulfide (S(C2H5)2) may be used.
As an organic metal of zinc (Zn), for example, dimethyl zinc (Zn(CH3)2) is used. In addition, diethyl zinc (Zn(C2H5)2) may be used.
In addition to the organic metals, for example, as a Se raw-material, hydrogen selenide (H2Se) may be used. Further, as an S raw-material, hydrogen sulfide (H2S) may be used.
In addition, the raw-material such as cyclopentadienyl copper triethylene (h5-(C2H5)Cu:P(C2H5)3), acetylacetone copper (Cu(C5H7O2)2) or trimethyl indium (In(CH3)3) is in a solid phase state at room temperature. In this case, the raw-material enters a liquid phase state through heating. In addition, even in the solid phase state, the raw-material may be used in a high vapor pressure simply at a high temperature.
In a case where the above-described compound semiconductor is crystal-grown by the MBE growth method, for example, the MBE device shown in
In this case, the simple substance raw-material of copper, and each of the simple substance raw-materials of gallium (Ga), aluminum (Al), indium (In), selenium (Se), and sulfur (S) are contained in each Knudsen cell. Further, these raw-materials are heated at an appropriate temperature, and the substrate is irradiated with each of molecular beams so as to perform crystal growth.
In this case, in a raw-material having a particularly high vapor pressure such as sulfur (S), stability of an amount of the molecular beams is lacking. Therefore, in this case, the amount of the molecular beams may be stabilized using a valved cracking cell. In addition, as in the gas source MBE, a portion of raw-materials may use gas sources. For example, as a Se material, hydrogen selenide (H2SE) may be used, and, as a sulfur (S) raw-material, hydrogen sulfide (H2S) may be used.
Next, the transparent electrode 14 is formed as shown in
Here, the transparent electrode 14 is formed to cover the upper surface of the photoelectric conversion film 13. For example, the transparent electrode 14 is made of indium tin oxide (ITO). In addition, the transparent electrode 14 may be made of a transparent conductive material such as zinc oxide or indium zinc oxide.
The transparent electrode 14 is formed as a single body over the plural pixels P shown in
Further, as shown in
An operation of the solid-state imaging device 1 will be described.
Also,
As described above, in this embodiment, the global exposure is performed in which the incident light is sensed by all the pixels P at the same time, and then the sensing is finished without using a mechanical light blocking unit. That is to say, the exposure is performed by the “global shutter method.”
Specifically, as shown in
In addition, as shown in
The signal charges are transferred to the n type impurity region 421 (FD) by the gate MOS 42 and then accumulated.
This operation is performed in all the pixels P. The readout circuit 51 reads out the signal charges for each pixel P and outputs the read-out signal charges to the vertical signal line 27 as electric signals.
In the above description, the fixed pattern noise in the amplification transistor M21 can be removed through the subtraction between the signals before and after the reset by the CDS circuit. However, the PD reset is made immediately after the signal charges accumulated in the n type impurity area 12 (accumulator 1) are transferred to the n type impurity region 411 (accumulator 2). For this reason, a variation in the reset signal voltage which is used as a reference when the CDS process is performed occurs, and thus kTC noise is included.
In this embodiment, the photoelectric conversion film 13 functions as a light blocking film along with the photoelectric conversion function. Thereby, as shown in
As shown in
As such, in this embodiment, since the incident light H coming from the upper surface (rear surface) can be blocked, and the light does not reach the respective portions such as the accumulators, it is possible to prevent the generation of noise and improve the image quality of a captured image.
As described above, in this embodiment, in the pixels P, the photoelectric conversion film 13 generates the signal charges by sensing and photoelectric-converting the incident light H. The signal charges generated by the photoelectric conversion film 13 are read out by the readout circuit 51. Also, the signal charges generated by the photoelectric conversion film 13 are accumulated in the n type impurity areas 12 and 411 which are the accumulators. Here, the photoelectric conversion film 13 is provided at the side where the incident light H enters when seen from the readout circuit 51 and the n type impurity areas 12 and 411 in the silicon substrate 11, and thus blocks the incident light H from entering the readout circuit 51 and the n type impurity areas 12 and 411.
For this reason, in this embodiment, it is possible to realize a small size, prevent the generation of noise, and improve the image quality of a captured image.
Further, in this embodiment, the pixels P include the photoelectric conversion film 13, and the photoelectric conversion film 13 is made of the compound semiconductor having the chalcopyrite structure. The photoelectric conversion film 13 is formed on the silicon substrate 11 so as to lattice-match with the silicon substrate 11. In this case, since the misfit dislocation occurring in the heterointerface can be reduced, the crystallinity of the photoelectric conversion film 13 is improved. Thus, the crystal defect is reduced, and thereby it is possible to suppress the generation of a dark current and prevent deterioration of the image quality due to white dots. Further, since high sensitivity can be realized, a high quality imaging can be performed even in a dark imaging environment (for example, night time).
In the above description, the definition of the “lattice matching” includes a state close to the lattice matching under a condition of the thickness of the photoelectric conversion film being within a critical film thickness.
In other words, if the thickness is within the critical film thickness, the lattice matching is not completely made, but the crystallinity can become good since the misfit dislocation is not included.
Further, the “critical film thickness” is defined by the equation (1) by “Matthews and Blakeslee” (for example, refer to J. W. Mathews and A. E. Blakeslee, J. Cryst. Growth 27(1974) 118-125) and the equation (2) by “People and Bean” (for example, refer to R. People and J. C. Bean, Appl. Phys. Lett. 47(1985) 322-324). In the following equations, a denotes a lattice constant, b denotes a Burgers vector for dislocation, v denotes a Poisson ratio, and f denotes a lattice mismatching |Δa/a|.
In the above description, although the case where the photoelectric conversion film 13 is made of the chalcopyrite materials has been described, the present invention is not limited thereto.
The photoelectric conversion film 13 may be made of silicide based materials.
The light absorption coefficient α indicates the following relation with respect to the absorption index k and the wavelength λ.
α=4πk/λ
For this reason, as can be seen from
In addition, a β-iron silicide material (β-FeSi2) is double digits higher than Si in the light absorption coefficient (refer to H. Katsumata, et al., J. Appl. Phys. 80 (10), 5955 (1996)).
In addition, the β-iron silicide material (β-FeSi2) can be epitaxially grown on a silicon substrate (refer to John E. Mahan, et al., Appl. Phys. Lett. 56 (21), 2126 (1990)). Thereby, the photoelectric conversion film 13 can be formed so as to realize both the photoelectric conversion function and the light blocking function by using the β-iron silicide material (β-FeSi2).
Further, a Barium silicide based material (BaSi2) or Ba1−xSrxSi2 is about double digits higher than silicon (Si) in the light absorption coefficient (refer to the following reference). In the same manner, silicide materials such as SiGe, Mg2SiGe, SrSi2, MnSi1.7, CrSi2, Ni—Si, Cu/Si, Co/Si, or Pt/Si are higher than Si in the light absorption coefficient.
Therefore, the photoelectric conversion film 13 can be formed so as to also function as a light blocking film by using silicide materials.
In addition to the above-described inorganic materials, the photoelectric conversion film 13 may be formed using organic materials.
For example, quinacridone or coumarin based organic materials, or the like have the light absorption coefficient almost twice higher than Si, and the photoelectric conversion film 13 can be formed so as to have the light blocking function along with the photoelectric conversion function by using them.
In the first embodiment, as described above, the kTC noise is included in the signal, but the kTC noise may be removed as described below.
Also,
As shown in
Specifically, the FD reset transistor M12, as shown in
In this modified example, as shown in
Also, the “FD reset” is made and then the potential at the floating diffusion FD is reset.
After a predetermined time for accumulation has elapsed, a potential at the n type impurity area 12 (accumulator 1) is reset to 0V or the power source voltage Vdd (V) through the “PD reset” (here, the case where reset to Vdd (V) is shown). Immediately after the reset, the signal charges begin to accumulate. In other words, after the potential at the n type impurity area 12 (accumulator 1) is reset by the PD reset transistor M11 as shown in
As shown in
This operation is performed in all the pixels P.
Thereafter, the selection transistor M31 is turned on using the selection line H31 for each pixel P or each row of the pixels P, a voltage variation in the n type impurity region 411 (accumulator 2 also used as FD) is amplified by the amplification transistor M21, and then the signals are sequentially read out.
At this time, by the CDS circuit, a difference between the amplified voltage and an initial voltage is read out as a signal.
In the above description, as shown in
In addition, in this embodiment as well, the photoelectric conversion film 13 functions as a light blocking film along with the photoelectric conversion function. Thereby, as shown in
Therefore, in this modified example as well, since the incident light H coming from the upper surface (rear surface) can be blocked by the photoelectric conversion film 13, and the light does not reach the accumulators, it is possible to prevent the generation of noise and improve the image quality of a captured image.
Also,
In
As shown in
Specifically, first, a signal of a zero bias or a negative bias is applied to the transparent electrode 14. Thereby, the generated photoinduced charges are moved to the n type impurity area 12 (accumulator 1) and then begin to be accumulated.
Next, the “PD reset” is made. Thereby, the n type impurity area 12 (accumulator 1) is reset to the voltage 0V or Vdd (V), and immediately thereafter, the accumulation begins again. In addition,
Then, immediately after the “FD reset” is made, the photoinduced charges are transferred to the n type impurity region 411 (FD) using the readout line H41. Further, immediately thereafter, using the selection line H31 for each pixel P or each row of the pixels P, a voltage variation in the n type impurity region 411 (FD) is amplified by the amplification transistor M21, and then a signal thereof is read out. This is sequentially repeated.
In this way, it is possible to suppress a dark current from being generated by shortening the time for the accumulation in the n type impurity region 411 (FD). In addition, at this time, the kTC noise can be removed by reading out a difference between the pixel signal voltage and the reset signal voltage as a signal using the CDS circuit. This structure is effective for a fine pixel since the number of transistors necessary for each pixel is reduced.
In the modified example 1-2 described above, since the n type impurity region 411 (accumulator 2 also used as FD) comes into direct contact with the surface of the silicon substrate 11, a dark current is generated at a surface level.
In order to lower the dark current at a surface level, the following configuration may be employed.
Also,
As shown in
Specifically, the FD reset transistor M12, as shown in
In this modified example as well, as shown in
In addition, as shown in
Also, after a predetermined time for the accumulation has elapsed, the gate MOS 41 is turned on so as to transfer the signal charges from the n type impurity area 12 (accumulator 1) to the n type impurity region 411 (accumulator 2) (the “readout 1” is performed).
Through the “FD reset,” a potential at the n type impurity region 421 (FD) functioning as a floating diffusion is reset.
Further, immediately after the “FD reset,” as shown in
Immediately thereafter, a voltage variation in the n type impurity region 421 (FD) is amplified by the amplification transistor M21 for each pixel P or each row of the pixels P, the readout circuit 51 reads out the signals thereof and outputs the read-out signal to the vertical signal line 27 as electric signals.
In the modified example 1-2, the n type impurity region 411 functioning as the accumulator and FD is formed on the surface of the silicon substrate 11, and thus it is difficult to suppress a dark current generated at a surface level.
However, in this modified example, the n type impurity region 421 (FD) functioning as FD is formed separately, and the n type impurity region 411 (accumulator 2) does not function as FD.
Although not shown, a p+ layer in which a p type impurity is diffused with high concentration is formed in the surface of the n type impurity region 421. In other words, the p+ layer in which a impurity diffusion layer having the conductivity type different from the n type impurity region 421 (accumulator) is provided in the surface layer of the silicon substrate 11.
Moreover, it is possible to suppress a dark current from being generated by shortening the time for the accumulation in the n type impurity region 421 (FD). In addition, at this time, the kTC noise can be removed by reading out a difference between the pixel signal voltage and the reset signal voltage as a signal using the CDS circuit.
Thereby, in this modified example, in the same manner as the modified example 1-2, it is possible to prevent the generation of the kTC noise and prevent the generation of a dark current.
As shown in
Specifically, the control gate 15 may be formed so as to cover the part where the n type impurity area 12 (accumulator 1) is formed in the surface of the silicon substrate 11.
In the control gate 15, for example, an electric field is applied such that the signal charges (here, electrons) generated by the photoelectric conversion film 13 are moved to the n type impurity area 12 through drift.
In addition, an electric field may be applied to the control gate 15 such that the signal charges generated by the photoelectric conversion film 13 are temporarily accumulated and then moved to the n type impurity area 12 (accumulator 1).
As shown in
Specifically, as shown in
If the control gate 15 is formed, this modified example is not limited to the above-described configuration.
As shown in
A lattice matching chalcopyrite material may not be constant in the band structure. In other words, as shown in
For example, as disclosed in D. S. Substrate and W. Neumann, Appl. Phys. Lett. 73, 785, (1998), since a CuAu type regular phase is formed according to a growth condition, this alters the band structure, and the electron affinity (an energy difference between a bottom and a vacuum level in the conduction band) may vary.
For this reason, there are cases of not forming the relation of (the electron affinity of the silicon substrate 11)>(the electron affinity of the photoelectric conversion film 13) unlike the case in
As shown in
In order to prevent the generation of such a defect, as shown in
The electron affinity of the intermediate layer IT is formed to lie between the electron affinity of the silicon substrate 11 and the electron affinity of the photoelectric conversion film 13 in order to lower the potential barrier between the silicon substrate 11 and the photoelectric conversion film 13. In other words, the electron affinity of the intermediate layer IT has the following relation.
(the electron affinity of the silicon substrate 11)<(the electron affinity of the intermediate layer IT)<(the electron affinity of the photoelectric conversion film 13)
Most preferably, the electron affinity of the intermediate layer IT is exactly half the electron affinity of the silicon substrate 11 and the electron affinity of the photoelectric conversion film 13.
For example, the intermediate layer IT is preferably formed under the conditions of the following materials and film thickness.
Materials (composition): CuGa0.64In0.36S2
Film thickness: 5 nm
In addition, as long as the intermediate layer IT has the film thickness within a critical film thickness, the intermediate layer IT may not be lattice-matched with the silicon substrate 11. For example, in the case of the intermediate layer IT (CuGa0.64In0.36S2), the lattice mismatching with the Si substrate becomes Δa/a=5.12×10−3. At this time, if the film thickness is 5 nm, the film thickness is smaller than the critical film thickness defined by the equation (1) by “Matthews and Blakeslee” (J. W. Mathews and A. E. Blakeslee, J. Cryst. Growth 27(1974) 118-125) and the equation (2) by “People and Bean” (R. People and J. C. Bean, Appl. Phys. Lett. 47(1985) 322-324).
As shown in
The pixel dividing portion PB, as shown in
Here, the pixel dividing portion PB, as shown in
In this embodiment, the pixel dividing portion PB is made of semiconductors including p type impurities. For example, the pixel dividing portion PB is made of a chalcopyrite based compound semiconductor including p type impurities with high concentration.
That is to say, the pixel dividing portion PB is formed to block the incident light H from entering the n type impurity areas 12, 411 and 421 which function as an accumulator in the same manner as the photoelectric conversion film 13.
The p+ layer 14p, as shown in
Here, the p+ layer 14p is formed with a high concentration of the impurity such that holes generated in the photoelectric conversion film 13 enter the p+ layer 14p and are moved in the transverse direction.
For example, the p+ layer 14p is made of a compound semiconductor with the chalcopyrite structure in the same manner as the photoelectric conversion film 13 and the pixel dividing portion PB.
As shown in
The essence of the manufacturing method of the solid-state imaging device will be described.
Here,
First, the photoelectric conversion film 13 and the p+ layer 14p are formed as shown in
Here, the respective portions such as the gate MOS 41 are formed on the surface (front surface) of the silicon substrate 11 before the photoelectric conversion film 13 and the p+ layer 14p are formed in the same manner as the first embodiment. Further, the wire layer (not shown) is formed on the surface (front surface) of the silicon substrate 11 so as to cover the respective portions such as the gate MOS 41.
Next, as shown in
The photoelectric conversion film 13 is made of the compound semiconductor with the chalcopyrite structure in the same manner as the first embodiment. In this embodiment, the photoelectric conversion film 13 is formed to cover a part in which the pixel dividing portion PB is formed on the upper surface of the silicon substrate 11.
Further, the p+ layer 14p is formed to cover the upper surface of the photoelectric conversion film 13. The p+ layer 14p is also made of the compound semiconductor with the chalcopyrite structure.
The p+ layer 14p is formed through the crystal growth of the compound semiconductor with the chalcopyrite structure under the condition of including a lot of an impurity such as Ga, In, As, or P, by the MOCVD method, the MBE method, or the like. Here, the p+ layer 14p is formed with high concentration such that holes enter the p+ layer 14p and are moved in the transverse direction.
For example, the p+ layer 14p is formed to have the impurity concentration of 1017 to 1019 cm−3. In addition, the p+ layer 14p is formed to have the film thickness of 10 to 100 nm.
Next, as shown in
Here, as shown in
In this embodiment, the resist pattern PR has apertures in order to expose a part of the upper surface of the p+ layer 14p under which the pixel dividing portion PB will be formed and to cover parts other than the exposed part.
Specifically, a photoresist film (not shown) is formed on the p+ layer 14p through application, and the resist pattern PR is formed by patterning the photoresist film by lithography.
Next, as shown in
Here, as shown in
In this embodiment, a p type impurity such as Ga, In, As or P is ion-implanted into the part where the pixel dividing portion PB is formed in the photoelectric conversion film 13, and the p type impurity is contained with a high concentration.
For example, the ion implantation is performed such that the concentration of the p type impurity is 1017 to 1019 cm−3 in the part where the pixel dividing portion PB is formed.
The resist pattern PR is removed from the upper surface of the p+ layer 14p.
Next, as shown in
Here, the pixel dividing portion PB is formed by activation through annealing.
Specifically, the pixel dividing portion PB is formed through the annealing at a temperature of 400° C. or more.
In this way, the pixel dividing portion PB is formed by selectively doping the part forming the pixel dividing portion PB inside the photoelectric conversion film 13 which is formed to include the part forming the pixel dividing portion PB on the silicon substrate 11.
Also, as shown in
In this embodiment, in the same manner as the first embodiment, the photoelectric conversion film 13 is provided at the side where the incident light H enters when seen from the respective portions such as the n type impurity areas 12 and 411 in the silicon substrate 11, and thus blocks the incident light H from entering the n type impurity areas 12 and 411 (refer to
In addition, in this embodiment, the pixel dividing portion PB is formed to be interposed between the plural pixels P. The pixel dividing portion PB is made of the compound semiconductor of which the doping concentration is controlled, so as to form potential barriers between the photoelectric conversion films 13 which are formed corresponding to the plural pixels P.
Thereby, in this embodiment, it is possible to prevent a color mixture using the pixel dividing portion PB. In the related art in which there is no pixel dividing portion PB, the electrons generated through the photoelectric conversion are freely moved between the pixels. Assuming that the electrons are moved equally in all directions, about 30% of the electrons in a pixel of 1.5 μm are moved to neighboring pixels. The movement almost disappears due to the pixel dividing portion PB formed between the pixels P.
Further, in this embodiment, the p+ layer 14p, which is a diffusion layer of the impurity with high concentration, is formed on the surface of the photoelectric conversion film 13 at the side which the incident light enters. Therefore, it is possible to suppress the generation of a dark current.
Also, in this embodiment, the p+ layer 14p is formed to be connected to each other among the plural pixels P. For this reason, holes enters the p+ layer 14p from the photoelectric conversion film 13 and then are moved to the pixels P in the transverse direction, and electrons generated in the photoelectric conversion film 13 are moved to the silicon substrate 11 side. Thereby, the transparent electrode may not be formed on the upper surface of the photoelectric conversion film 13.
As shown in
As shown in
Here, in the silicon substrate 11, the insulating film 80 is provided at the part forming the pixel dividing portion PB on the surface (rear surface) side opposite to the surface (front surface) on which the respective portions such as the gate MOS 41 and the like are provided. For example, a silicon oxide film is provided as the insulating film 80. In addition, the insulating film 80 may be made of a material such as silicon nitride.
Details will be described later, and the insulating film 80 is provided on surfaces of parts other than the parts forming the photoelectric conversion film 13 such that the photoelectric conversion film 13 is selectively crystal-grown on the surface (rear surface) of the silicon substrate 11.
The pixel dividing portion PB is provided on the silicon substrate 11 with the insulating film 80 interposed therebetween.
The essence of the manufacturing method of the solid-state imaging device will be described.
Here,
First, the insulating film 80 is formed as shown in
Here, the respective portions such as the gate MOS 41 are formed on the surface of the silicon substrate 11 before the insulating film 80 is formed in the same manner as the first embodiment. Further, the wire layer (not shown) is formed on the surface (front surface) of the silicon substrate 11 so as to cover the respective portions such as the gate MOS 41.
Next, as shown in
Specifically, for example, a silicon oxide film (not shown) is formed to cover the rear surface (upper surface) of the silicon substrate 11. Thereafter, the silicon oxide film is patterned to form the insulating film 80 by the photolithography method.
For example, the insulating film 80 is formed to have the film thickness of 50 to 100 nm.
Next, as shown in
Here, as shown in
The photoelectric conversion film 13 is formed on the silicon substrate 11 through the epitaxial growth of the compound semiconductor by the MOCVD method, the MBE method, or the like.
In this embodiment, unlike the case of the first embodiment, the compound semiconductor is epitaxially grown to selectively cover the parts forming the photoelectric conversion films on the upper surface of the silicon substrate 11, and the photoelectric conversion films 13 are formed.
As shown in
Next, the pixel dividing portion PB and the p+ layer 14p are formed as shown in
Here, as shown in
For example, each of the pixel dividing portion PB and the p+ layer 14p is made of a compound semiconductor with the chalcopyrite structure.
Specifically, the compound semiconductor is laterally grown under the condition of including a lot of an impurity such as Ga, In, As, or P. Thereby, the compound semiconductor is implanted into the trench TR between the photoelectric conversion films 13, thus the pixel dividing portion PB is formed and the p+ layer 14p is formed on the photoelectric conversion film 13.
For example, the pixel dividing portion PB and the p+ layer 14p are formed to have the impurity concentration of 1017 to 1019 cm−3.
In this way, on the silicon substrate 11, the pixel dividing portion PB is formed through the crystal growth of the compound semiconductor so as to cover the part forming the pixel dividing portion PB. Along therewith, the p+ layer 14p is formed through the crystal growth of the compound semiconductor so as to cover the upper surface of the photoelectric conversion film 13.
Also, as shown in
As described above, in this embodiment, in the same manner as the second embodiment, the photoelectric conversion film 13 is provided at the side where the incident light H enters when seen from the respective portions such as the n type impurity areas 12 and 411 in the silicon substrate 11, and thus blocks the incident light H from entering the n type impurity areas 12 and 411 (refer to
In addition, in this embodiment, the pixel dividing portion PB is formed to be interposed between the pixels P in the same manner as the second embodiment. The pixel dividing portion PB is provide so as to form potential barriers between the photoelectric conversion films 13 which are formed corresponding to the plural pixels P. Thereby, in this embodiment, it is possible to prevent a color mixture using the pixel dividing portion PB.
This embodiment is appropriate in terms of manufacturing costs since the number of process steps such as the ion implantation and the annealing is reduced as compared with the above-described embodiments. Further, since the ion implantation or the annealing is not performed, there is no damage caused by the processes (for example, damage during the ion implantation or an adverse effect on the wire layer during the annealing).
As shown in
The pixel dividing portion PBc, as shown in
In this embodiment, the pixel dividing portion PBc is made of a semiconductor which does not include p type impurities unlike the second embodiment. For example, the pixel dividing portion PBc is made of a chalcopyrite based compound semiconductor having a wide band gap. For example, the pixel dividing portion PBc is formed such that the band gap is kT=27 meV or more. In this way, potential barriers are formed between the plural photoelectric conversion films 13 formed corresponding to the pixels P, and the pixels P are divided by the pixel dividing portion PBc.
The essence of the manufacturing method of the solid-state imaging device will be described.
Here,
First, as shown in
Here, the insulating film 80 and the photoelectric conversion film 13 are formed in the same manner as the second embodiment before the pixel dividing portion PBc is formed (refer to
Next, as shown in
In this step, the pixel dividing portion PBc is formed, for example, using a chalcopyrite based compound semiconductor having a wide band gap.
Specifically, unlike the third embodiment, the compound semiconductor is laterally grown under a condition of not including p type impurities. Thereby, the compound semiconductor is implanted into the trench TR between the photoelectric conversion films 13.
For example, the pixel dividing portion PBc is formed such that a composition ratio of copper-aluminum-gallium-indium-sulfur-selenium is 1.0:0.36:0.64:0:1.28:0.72, or 1.0:0.24:0.23:0.53:2.0:0. That is to say, the pixel dividing portion PBc is formed to give CuAl0.36Ga0.64S1.28Se0.72 Or CuAl0.24Ga0.23In0.53S2.
As shown in
For example, the p+ layer 14p is made of a compound semiconductor with the chalcopyrite structure in the same manner as the second embodiment.
Specifically, the compound semiconductor is crystal-grown under the condition of including a lot of an impurity such as Ga, In, As, or P, thereby forming the p+ layer 14p.
Also, as shown in
As described above, in this embodiment, in the same manner as the second embodiment, the photoelectric conversion film 13 is provided at the side where the incident light H enters when seen from the respective portions such as the n type impurity areas 12 and 411 in the silicon substrate 11, and thus blocks the incident light H from entering the n type impurity areas 12 and 411 (refer to
In this embodiment, the pixel dividing portion PBc is made of the compound semiconductor of which the composition is controlled, so as to form potential barriers between the photoelectric conversion films 13 which are formed corresponding to the plural pixels P. Thereby, in this embodiment, it is possible to prevent a color mixture using the pixel dividing portion PBc.
Since the potential barriers are formed through the control of composition and the doping is not performed in this embodiment, the crystallinity of the pixel dividing portion PBc is good as compared with the cases of other embodiments. In addition, this embodiment is appropriate in terms of manufacturing costs since the number of process steps such as the ion implantation and the annealing is reduced as compared with other embodiments.
As shown in
A set of the electrodes 511 and 531 and the contact 521 are formed corresponding to each pixel P as shown in
The electrodes 511 and 531 and the contact 521 make an electric connection between the photoelectric conversion film 13 and the n type impurity area 12, and thus the signal charges generated in the photoelectric conversion film 13 are moved to the n type impurity area 12 via the electrodes 511 and 531 and the contact 521.
The electrodes 511 and 531 are formed using metal materials, and block light from above.
In this embodiment, in the same manner as the first embodiment, the photoelectric conversion film 13 is provided at the side where the incident light H enters when seen from the respective portions such as the n type impurity areas 12 and 411 in the silicon substrate 11, and thus blocks the incident light H from entering the n type impurity areas 12 and 411 (refer to
For this reason, in this embodiment in the same manner as the first embodiment, it is possible to realize a small size, prevent the generation of noise, and improve the image quality of a captured image.
Also, although the case where the photoelectric conversion film 13 has a light blocking function has been described, this embodiment is not limited thereto. Through the combination of the photoelectric conversion film 13 and the electrodes 511 and 531, light may be blocked from entering the n type impurity area 12. That is to say, the entire photoelectric conversion unit including the photoelectric conversion film 13 and the electrodes 511 and 531 functioning as the lower electrodes may realize the light blocking function.
As shown in
As shown in
The n type impurity area 12 is provided inside the silicon substrate 11 in the same manner as the fifth embodiment. However, unlike the fifth embodiment, the n type impurity area 12 is provided on the upper surface side of the silicon substrate 11 and is not provided around the lower surface.
The wire layer (not shown) is not provided on the upper surface of the silicon substrate 11 unlike the fifth embodiment.
In this embodiment, the photoelectric conversion film 13 senses the incident light H coming from the upper surface (front surface) on which the respective portions such as the photoelectric conversion film 13 are provided on the silicon substrate 11. In other words, the solid-state imaging device in this embodiment is a “front surface illumination type CMOS image sensor.”
In this embodiment, in the same manner as the fifth embodiment, the photoelectric conversion film 13 is provided at the side where the incident light H enters when seen from the respective portions such as the n type impurity areas 12 and 411 in the silicon substrate 11, and thus blocks the incident light H from entering the n type impurity areas 12 and 411 (refer to
For this reason, in this embodiment in the same manner as the fifth embodiment, it is possible to realize a small size, prevent the generation of noise, and improve the image quality of a captured image.
Also, although the case where the photoelectric conversion film 13 has a light blocking function has been described, this embodiment is not limited thereto. Through the combination of the photoelectric conversion film 13 and the electrodes 511 and 531, light may be blocked from entering the n type impurity area 12. That is to say, the entire photoelectric conversion unit including the photoelectric conversion film 13 and the electrodes 511 and 531 functioning as the lower electrodes may realize the light blocking function.
In the above-described embodiments, the silicon substrate of which a main surface is the (100) plane is used, the above-described compound semiconductor is epitaxially grown in the main surface, thereby forming the photoelectric conversion film. In other words, the case of using the {100} substrate has been described. However, the present invention is not limited thereto.
When the above-described compound semiconductor is epitaxially grown using an ionic element as a material on a nonpolar silicon substrate with no ionic property, there are cases where a defect called an antiphase domain occurs. That is to say, cation and anion locally have antiphase and are grown, thereby generating the antiphase domain.
For this reason, as the silicon substrate, an off substrate may be used. It is possible to suppress the generation of the antiphase domain through the epitaxial growth on the off substrate (refer to Mitsuhisa Kawabe, Hidetoshi Takasugi, Toshio Ueda, and Akira Yokoyama, and Yoshio Bando: Initial Growth Process of GaAs on Si; Division of Crystals Science and Technology, 4th Crystal Engineering Symposium Text (1987 Jul. 17) pp. 1-8)
In
Among the figures,
As shown in
On the silicon substrate ilk which is an off substrate, the cation (positive ionic atom) of the group I or the group III and the anion (negative ionic atom) of the group VI are regularly arranged to form the photoelectric conversion film 13k.
In this case, the cation and the anion are grown in the antiphase locally as in the area B (area marked with the chain lines), thereby generating the antiphase domain.
However, as shown in
As shown in
Also, as shown in
For this reason, in this embodiment, it is possible to suppress the antiphase domain from being generated.
In
For example, the height of the triangle of the area B becomes about 5 nm. At present, the thickness necessary for the photoelectric conversion film is equal to or more than about 120 nm at the light absorption coefficient of 105 cm−1 (at this time, 70° or more of light is absorbed). If the tilted angle θ1 is 2° C., the height of the triangle of the area B is settled to a degree of about 15 nm. In this case, since areas with no defect such as the antiphase domain exist at least 100 nm or more from the surface, it is possible to achieve the effect of reducing a dark current. Also, the upper limit value is an angle until a stepwise substrate structure can be maintained. Specifically, θ1 allows 90° to the maximum.
As described above, unlike other embodiments, the photoelectric conversion film 13k is formed by epitaxially growing the compound semiconductor on the silicon substrate ilk which is an off substrate. Thereby, as described above, it is possible to suppress the antiphase domain from being generated.
Here,
As shown in
As shown in
The red photoelectric conversion film 13R of the photoelectric conversion film 13 is provided in the upper side of the surface of the silicon substrate 11 as shown in
The green photoelectric conversion film 13G of the photoelectric conversion film 13 is provided on the upper side of the surface of the silicon substrate 11 with the red photoelectric conversion film 13R interposed between it and the substrate as shown in
As shown in
The red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B are respectively provided with the upper electrodes 14R, 14G and 14B and the lower electrodes 53R, 53G and 53B between them and the silicon substrate 11 in the depth direction z of the silicon substrate 11.
Here, as shown in
Also, as shown in
Although not shown, insulating films are interposed between the combinations of the respective red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B, and the upper electrodes 14R, 14G and 14B and the lower electrodes 53R, 53G and 53B.
In the above description, the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B are respectively formed using, for example, organic materials.
As shown in
Each of the upper electrodes 14R, 14G and 14B and the lower electrodes 53R, 53G and 53B is a transparent electrode, and allows light to pass therethrough. For example, each of them is formed by forming a film of metal oxide such as indium tin oxide (ITO) using a film forming method such as a sputtering method.
As described above, the solid-state imaging device in this embodiment is a “photoelectric conversion film laminated type” image sensor, and disperses the incident light H into the respective colors of red, green and blue in the depth direction z for the photoelectric conversion.
Due to the combination of the plural laminated photoelectric conversion films 13R, 13G and 13B, the incident light H is blocked from entering the silicon substrate 11.
As shown in
For this reason, as shown in
Therefore, the visible light does not enter the accumulators 12R, 12G and 12B provided in the lower side of the photoelectric conversion film 13 but is blocked by the photoelectric conversion film 13. In addition, light in the infrared region is cut by forming an infrared cutoff filter in the upper side of the photoelectric conversion film 13. Further, light in the ultraviolet region is cut by forming an ultraviolet cutoff filter in the upper side of the photoelectric conversion film 13.
As described above, the plural photoelectric conversion films 13R, 13G and 13B having different absorption spectra are provided, and the plural photoelectric conversion films 13R, 13G and 13B are laminated. Due to the combination of the plural laminated photoelectric conversion films 13R, 13G and 13B, the incident light H is blocked from entering the silicon substrate 11.
For this reason, in this embodiment, since the plural photoelectric conversion films 13R, 13G and 13B block the incident light H from entering the n type impurity area 12 and the like, in the same manner as other embodiments, it is possible to realize a small size, prevent the generation of noise, and improve the image quality of a captured image.
Here,
As shown in
As shown in
As shown in
In this embodiment, the color filters CF are provided over the photoelectric conversion film 13. For this reason, the light passing through the color filters CF is sensed by the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B. For example, in the color filters CF, a red light beam passing through a red filter layer (not shown) is sensed by the red photoelectric conversion film 13R and undergoes the photoelectric conversion. Also, in the color filters CF, a green light beam passing through a green filter layer (not shown) is sensed by the green photoelectric conversion film 13G and undergoes the photoelectric conversion. Further, in the color filters CF, a blue light beam passing through a blue filter layer (not shown) is sensed by the blue photoelectric conversion film 13B and undergoes the photoelectric conversion.
In the above description, the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B are respectively are formed using, for example, organic materials in the same manner the eighth embodiment. In addition, materials such as a chalcopyrite based material may be used.
As described above, the solid-state imaging device in this embodiment is a “photoelectric conversion film laminated type” image sensor, and disperses the incident light H into the respective colors of red, green and blue in the depth direction z for the photoelectric conversion.
Due to the combination of the plural laminated photoelectric conversion films 13R, 13G and 13B, the incident light H is blocked from entering the silicon substrate 11.
As shown in
Particularly, in this embodiment, since the light passing through the color filters CF is absorbed by the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B, the light is efficiently blocked.
As described above, in this embodiment, the plural photoelectric conversion films 13R, 13G and 13B having different absorption spectra are provided, and the plural photoelectric conversion films 13R, 13G and 13B are laminated. Due to the combination of the plural laminated photoelectric conversion films 13R, 13G and 13B, the incident light H is blocked from entering the silicon substrate 11.
For this reason, in this embodiment, since the plural photoelectric conversion films 13R, 13G and 13B block the incident light H from entering the n type impurity area 12 and the like, in the same manner as other embodiments, it is possible to realize a small size, prevent the generation of noise, and improve the image quality of a captured image.
Here,
As shown in
As shown in
As shown in
In other words, the solid-state imaging device in this embodiment is a “photoelectric conversion film laminated type” image sensor, and disperses the incident light H into the respective colors of red, green and blue in the depth direction z for the photoelectric conversion.
Further, in the same manner as the ninth embodiment, due to the combination of the plural laminated photoelectric conversion films 13R, 13G and 13B, the incident light H is blocked from entering the silicon substrate 11.
For this reason, if the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B are combined, the light is absorbed throughout the visible region. Therefore, the visible light does not enter the n type impurity area 12 provided in the lower side of the photoelectric conversion film 13 but is blocked by the photoelectric conversion film 13.
As described above, in this embodiment, in the same manner as the ninth embodiment, the plural photoelectric conversion films 13R, 13G and 13B having different absorption spectra are provided, and the plural photoelectric conversion films 13R, 13G and 13B are laminated. Due to the combination of the plural laminated photoelectric conversion films 13R, 13G and 13B, the incident light H is blocked from entering the silicon substrate 11.
For this reason, in this embodiment, since the plural photoelectric conversion films 13R, 13G and 13B block the incident light H from entering the n type impurity area 12 and the like, in the same manner as other embodiments, it is possible to realize a small size, prevent the generation of noise, and improve the image quality of a captured image.
Here,
As shown in
As shown in
In this embodiment, the photoelectric conversion film 13 blocks the incident light H due to the combination of the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B, the red filter layer CFR, the green filter layer CFG, and the blue filter layer CFB.
Specifically, as shown in
Further, as shown in
Also, although not shown in
In this way, the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B are arranged in the Bayer arrangement in the same manner as the red filter layer CFR, the green filter layer CFG, and the blue filter layer CFB constituting the color filter CF.
As shown in
For this reason, as shown in
In the same manner as the combination of the green photoelectric conversion film 13G and the green filter layer CFG, if the red photoelectric conversion film 13R and the red filter layer CFR are combined as well, the light is absorbed throughout the visible region. Therefore, the visible light does not enter the n type impurity area 12 provided in the lower side of the red photoelectric conversion film 13R but is blocked by the photoelectric conversion film 13.
Likewise, if the blue photoelectric conversion film 13B and the blue filter layer CFB are combined as well, the light is absorbed throughout the visible region. Therefore, the visible light does not enter the n type impurity area 12 provided in the lower side of the blue photoelectric conversion film 13B but is blocked by the photoelectric conversion film 13.
As described above, in this embodiment, the photoelectric conversion film 13 blocks the incident light H due to the combination of the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B, the red filter layer CFR, the green filter layer CFG, and the blue filter layer CFG.
For this reason, in this embodiment, since the plural photoelectric conversion film 13 blocks the incident light H from entering the n type impurity area 12 and the like, in the same manner as other embodiments, it is possible to realize a small size, prevent the generation of noise, and improve the image quality of a captured image.
Here,
As shown in
As shown in
As shown in
In the same manner as the eleventh embodiment, the photoelectric conversion film 13 blocks the incident light H due to the combination of the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B, the red filter layer CFR, the green filter layer CFG, and the blue filter layer CFB.
In this way, the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B are arranged in the Bayer arrangement in the same manner as the red filter layer CFR, the green filter layer CFG, and the blue filter layer CFB constituting the color filter CF.
As described above, in this embodiment, the photoelectric conversion film 13 blocks the incident light H due to the combination of the red photoelectric conversion film 13R, the green photoelectric conversion film 13G, and the blue photoelectric conversion film 13B, the red filter layer CFR, the green filter layer CFG, and the blue filter layer CFB.
For this reason, in this embodiment, since the photoelectric conversion film 13 blocks the incident light H from entering the n type impurity area 12 and the like, in the same manner as other embodiments, it is possible to realize a small size, prevent the generation of noise, and improve the image quality of a captured image.
In practice, the present invention is not limited to the above-described embodiments, but may have a variety of modifications.
In the embodiments, although the case where the present invention is applied a camera has been described, it is not limited thereto. The present invention may be applied to other electronic devices including a solid-state imaging device such as a scanner or a copier.
Further, in the embodiments, although the case where the solid-state imaging device is the CMOS image sensor has been described, the present invention is not limited thereto. If necessary, the present invention may be applied to a CCD type image sensor in addition to the CMOS image sensor.
In the embodiments, although the case where the readout circuit is singly provided for each photoelectric conversion unit has been described, the present invention is not limited thereto. For example, a readout circuit may be singly provided in a plurality of photoelectric conversion units. That is to say, plural pixels may share transistors so as to reduce the number of the transistors. Thereby, finer pixels can be realized.
Also, in the embodiments, although the case where a second conductivity type (for example, an n type) impurity area is formed in a first conductivity type (for example, a p type) silicon substrate has been described (refer to
In the embodiments, although the case where “electrons” are read out as a signal has been described, the present invention is not limited thereto. There may be a configuration where “holes” are read out as a signal. In this case, the conductivity type for each portion shown in each embodiment is made reverse, and thus the “holes” can be read out as a signal.
Further, the structures or the operations disclosed in Japanese Unexamined Patent Application Publications No. 2009-268083 and the like may be appropriately employed. For example, as shown in FIG. 45 in Japanese Unexamined Patent Application Publications No. 2009-268083, the present invention may be applied in a case of not forming the PD reset transistor M11 (refer to
In addition to the typical CDS driving, an operation by a DDS driving may be performed. Particularly, if the photoelectric conversion unit does not have a HAD structure like a case of using an organic photoelectric conversion film, the FD is reset after the signal charges are accumulated, which is preferable since the generation of noise can be suppressed. In other words, through the readout of the reset level after the readout of the signal level, it is possible to reduce image quality deterioration due to an after-image phenomenon when the reset operation is performed, since random noise or unevenness in a surface at the time of the reset decreases.
In addition, the above-described respective embodiments may be appropriately combined.
It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.
Although modifications and changes may be suggested by those skilled in the art, it is the intention of the inventors to embody within the patent warranted hereon all changes and modifications as reasonably and properly come within the scope of their contribution to the art.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-139689 | Jun 2010 | JP | national |
This application is a continuation of U.S. patent application Ser. No. 15/489,243, filed on Apr. 17, 2017, which is a continuation of U.S. patent application Ser. No. 15/048,741, filed Feb. 19, 2016, which is a continuation of U.S. patent application Ser. No. 13/155,060, filed Jun. 7, 2011, now U.S. Pat. No. 9,570,495, which claims priority to Japanese Patent Application JP 2010-139689, filed in the Japan Patent Office on Jun. 18, 2010, the entire disclosures of which are hereby incorporated herein by reference.
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| Number | Date | Country | |
|---|---|---|---|
| Parent | 15489243 | Apr 2017 | US |
| Child | 16675084 | US | |
| Parent | 15048741 | Feb 2016 | US |
| Child | 15489243 | US | |
| Parent | 13155060 | Jun 2011 | US |
| Child | 15048741 | US |
