Patent Application
20060080583
The present invention relates generally to the testing of chips and, more particularly, to the on-board software access of register scan data.
To test a chip, it may be necessary to examine the internal workings of the hardware, which are not directly accessible by software. For example, the hardware may hang on a branch instruction, or a multiplier may occasionally produce a 1 instead of a 0 in a bit. To examine the internal state of the chip when these errors occur, it is necessary to examine registers, which store intermediate values used in the execution of instructions. These register values are not accessible to software. Extensive use is made of the registers. For example, there may be six intermediate values in a call to a multiplier.
External monitoring can be used to gain access to the values of these registers. The values of the registers are passed to pins on the chip, and the pins are connected to the external device. The scan test architecture is a built-in method for passing the values of these registers to the pins. In this architecture, the registers are connected in a scan chain or ring, separately from their normal functional connection. Input data can be serially shifted into the registers, and output data serially shifted out of them to the pins. To examine the contents of the registers at a particular point in their operation, they are switched to scan mode, and the values in the registers are moved out using the scan protocol.
This method of gaining access to the register values has limited utility. First, the use of these devices can be expensive. Further, considerable testing time may be required. External monitoring requires that the external device be connected to the chip while the chip is running. If an error occurs only rarely, the external device must be connected until the bug occurs. It cannot be connected to the chip after the error has occurred.
Therefore, there is a need for a method and system of testing chips that can access the values stored in the internal registers without the need for costly external devices.
In the present invention, register values are obtained by scanning, and are then written to one or more trace arrays on the chip. The scan data in the one or more trace arrays can be read out by software.
For a more complete understanding of the present invention and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawing, in which:
In the following discussion, numerous specific details are set forth to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced without such specific details. In other instances, well-known elements have been illustrated in schematic or block diagram form in order not to obscure the present invention in unnecessary detail.
It is further noted that, unless indicated otherwise, all functions described herein may be performed in either hardware or software, or some combination thereof. In a preferred embodiment, however, the functions are performed by a processor such as a computer or an electronic data processor in accordance with code such as computer program code, software, and/or integrated circuits that are coded to perform such functions, unless indicated otherwise.
The scan read controller 216 controls whether and how to scan. Scan read controller 216 selects between a functional mode and a scan mode for the registers 202 through 210, and the registers in other scan rings, by sending input to the scan gates of the registers 202 through 210, and to the registers in the other scan chains. Scan read controller 216 selects between active and inactive modes by sending input to the Run(Hold-b) inputs of the registers 202 through 210 and registers in other scan rings. It also controls the selection of a scan ring or rings to be scanned. A chip can contain a million registers, comprised of a thousand different scan chains. To perform a scan of the selected ring or rings, the scan read controller 216 would send an input of 1 to the scan gates of the registers in those rings, putting them in scan mode. The scan read controller would render the registers in the non-selected rings inactive by sending a 0 to the Run(Hold-b) inputs of those registers.
The scan read controller 216 also controls whether to recirculate the values of the registers 202 through 210 in the scan chain. Recirculation can restore the values of the registers before the scan. The system can thereby resume its operation at the state before the scan. Thus, the system 200 can take successive snapshots of register values by performing scans and recirculating the values among the registers in the chains that were scanned. In addition, the system 200 can gather register values in excess of the capacity of the data storage array 214. It repeats the process of performing a scan of registers, writing the register values to the data storage array 214, and recirculating the values. Each time, the system 200 scans a set of registers not scanned before. During these successive scans, the registers retain their values and are not switched into functional mode. The values in the data storage array 214 are read out before the desired register values are overwritten.
The scan read controller 216 also controls the disposition of the output from the scan ring. The scan ring output can be written to the data storage array 214, under the control of the scan read controller 216. The scan ring controller 216 directs a multiplexer 212 to pass through the values from this scan chain to the data storage array 214. The data in the data storage array 214 can then be accessed by software. Similarly, to store values from another scan ring, the scan ring controller 216 directs the multiplex 212 to pass through the values from the other scan chain to the data storage array 214. Additionally, the scan ring output can be directed to the external scan control logic 220, and read by an external device.
The scan read controller 216 provides an interface to software programs attempting to access scan chain values. The software programs can send one or more scan requests to the scan read controller 216. The scan ring input allows the registers 202 through 210 to be initialized. For example, if a certain operation produces an error, the registers 202 through 210 can be initialized with the initial state for the operation. The multiplexer 218, under the control of the scan read controller 216, can load into a register or registers of the scan chain, a value from the scan ring in port or a value from another register, which is a third input to the multiplexer 218. The operation can then be performed, and the register values scanned.
This system 200 for scanning registers and storing the values on-chip allows accessing the values stored in the internal registers without the need for costly external devices. The values of the registers are scanned and stored in the data storage array 214. The values can then be accessed by software.
Other embodiments of the invention can have additional elements. A counter or counters can be added to the system 200 to allow the counting of the number of successive scans of a particular scan chain or scan chains. The scanning can be stopped after a particular count of scans. The counter can also allow the sampling of successive scans. For example, the registers in a scan chain can be scanned every 100th cycle of functional operation.
In step 314, the scan gate is disabled. The ScanGate input of the registers is set to return the registers to functional mode. In step 316, normal operation is re-enabled. In step 318, as a result of the scan of the data in the registers in the scan chain, and the storing of the data into a trace array or other memory element, the data is accessible to software. The software program that requested the scan can now read the scan information. As a result of the execution of this method, the scan data is accessible without resort to an expensive external device.
Having thus described the present invention by reference to certain of its preferred embodiments, it is noted that the embodiments disclosed are illustrative rather than limiting in nature and that a wide range of variations, modifications, changes, and substitutions are contemplated in the foregoing disclosure and, in some instances, some features of the present invention may be employed without a corresponding use of the other features. Many such variations and modifications may be considered desirable by those skilled in the art based upon a review of the foregoing description of preferred embodiments. Accordingly, it is appropriate that the appended claims be construed broadly and in a manner consistent with the scope of the invention.
