The present disclosure relates generally to the field of integrated circuit fabrication and, more particularly, to fabricating an insulating layer on a semiconductor substrate for submicron integrated circuit technologies.
An integrated circuit (IC) is formed by creating one or more devices (e.g., circuit components) on a substrate using a fabrication process. The IC's active device density (i.e., the number of devices per IC area), as well as the IC's functional density (i.e., the number of interconnected devices per IC area), are limited by the fabrication process. An IC fabrication process generally has a number of limitations that affect the formation of a device. One of these limitations is a minimum feature size, which may be viewed as the smallest component (or line) that may be created using the process. Another limitation relates to the formation of insulating layers that serve to isolate the various conductive layers and devices that form an IC.
Insulating layers are widely used in IC manufacturing to provide isolation between conducting and/or semiconducting regions. As the feature sizes of IC components have become smaller and the aspect ratios of features have become higher, the formation of insulating layers has become more difficult. One difficulty is providing a uniform insulating layer without exceeding the thermal budget (i.e., the maximum amount of thermal energy received during processing before degradation occurs) of the semiconductor substrate. Small architectures generally need to be fabricated using relatively low thermal budgets to prevent the diffusion of dopants from previously doped regions. However, conventional methods of insulator fabrication may require processing temperatures and durations that exceed the thermal budget of today's smaller devices.
Another difficulty with the formation of insulating layers involves providing uniform coverage for small formations and deep trenches. For example, forming an insulating layer in a deep trench using conventional methods may result in uneven layer depths or incomplete distribution, both of which may adversely impact IC performance and stability.
Therefore, a system and method are needed for improving the formation of insulating layers at relatively low temperatures.
The present disclosure provides for a method and for fabricating an insulating layer on a substrate. The method provides a fluid to a substrate, wherein the fluid is provided in an aerosol form. The method also provides for generating a supercritical process environment proximate to the substrate. The method further provides a proximate supercritical process environment having a supercritical process temperature and a supercritical process pressure for altering the fluid, and placing the substrate in contact with the altered fluid, wherein the insulating layer is formed on the substrate by a reaction between the substrate and the fluid.
The present disclosure also introduces a system for fabricating an insulating layer on a substrate. The system includes a proximate supercritical process environment including a substrate in a processing chamber. The system also provides for a proximate supercritical process environment having a supercritical process temperature and a supercritical process pressure, and control device for controlling the proximate supercritical process environment at a supercritical level. The system also includes a fluid distribution device for providing a non-supercritical fluid to the proximate supercritical process environment in an aerosol form. The system further includes a heating device for heating the substrate to a supercritical temperature, wherein the fluid becomes a supercritical fluid due to the pressure and the temperature proximate the substrate, and wherein the insulator layer is formed by contact between the substrate and the supercritical fluid.
The foregoing has outlined preferred and alternative features of several embodiments so that those skilled in the art may better understand the detailed description that follows. Additional features will be described below that further form the subject of the claims herein. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure.
Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is emphasized that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
b illustrates a sectional view of one embodiment of various devices of constructed according to aspects of the present disclosure.
The present disclosure relates generally to the field of integrated circuit fabrication and, more particularly, to fabricating an insulating layer on a semiconductor substrate for submicron integrated circuit technologies. It is understood, however, that the following disclosure provides many different embodiments, or examples, for implementing different features of the disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
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It is noted that the supercritical conditions may be generated in a number of ways. For example, although the pressure conditions within the processing chamber may be held within the supercritical range during processing, the temperature of the processing chamber may remain in a sub-critical range as long as the temperature in the immediate vicinity of the substrate may be within the supercritical range. This allows more processing flexibility as a uniform temperature need not be maintained within the processing chamber. For example, the substrate may be heated to supercritical temperatures using a heated pedestal positioned within the processing chamber. The pedestal may be heated by a resistive coil that may be embedded within or positioned in the vicinity of the pedestal. In one embodiment, the substrate may be heated to a supercritical temperature using a rapid thermal process in which the semiconductor substrate is heated by an infra-red radiation source. The infra-red radiation source may be configured to allow the wavelength of the infra-red radiation source to closely match the infra-red absorption characteristics of silicon and/or other materials.
In step 104, fluid is introduced into the processing chamber. For example, the water may be metered and vaporized processing conditions using a liquid mass flow controller coupled with a vaporization module that utilizes an inert or oxygen containing gas to effectively generate the fluid vapor (as shown in
In step 106, the supercritical conditions are maintained as the semiconductor substrate is exposed to the fluid, causing an insulating layer to form on the substrate. The fluid may be supplied to the substrate continuously until the insulating layer reaches a desired thickness.
In step 108, the flow of fluid into the processing chamber is stopped and, in step 110, a determination is made as to whether the insulating layer is satisfactory (e.g., desired thickness, evenly distributed, etc.). If it is determined in step 110 that the insulation layer is satisfactory, the method 100 ends. However, if it is determined in step 110 that the insulation layer is not satisfactory, the method 100 returns to step 104, where water is again introduced into the processing chamber.
It is understood that step 110 may be used to supply the fluid to the substrate in cycles. For example, the water may be supplied to the substrate for a period ti and then the supply would be stopped for another period, t2. This process (steps 104-110) may be repeated until the insulating layer reaches the desired thickness. Using this cycling method of applying fluid may allow improved control over the thickness of the insulating layer because the likelihood of overshooting the desired thickness is minimized. Such an application cycle may also provide a denser insulating layer.
One example of an insulating layer that may be formed by the method 100 using supercritical fluid, a silicon substrate, and a wet oxidation process is silicon dioxide (SiO2). SiO2 may be thermally grown using a wet oxidation reaction: Si+2H2O→SiO2+2H2. However, traditional methods of wet oxidation use a relatively high processing temperature (e.g., 1150° C.), a relatively low processing pressure (e.g., 1 atmosphere), and have a relatively slow grow rate, such as a range between about 1 and about 2 Angstroms/minute. The high temperatures required and the slow growth rate may adversely affect the use of traditional wet oxidation processes for devices that have low thermal budgets. Additional drawbacks to traditional wet oxidation processes may include high energy costs and non-uniform temperatures inside the processing chamber.
As illustrated by the method 100, one way to improve the traditional wet oxidation process is to use supercritical fluid in the wet oxidation reaction. The use of supercritical fluid may improve the formation of insulating layers in a number of ways. First, supercritical fluid oxidation may be performed at relatively low temperatures compared to traditional wet oxidation processes. For example, supercritical fluid suitable for oxidation may be generated at a pressure of about 22.1 MPa and a temperature of about 374° C. This represents a significant temperature reduction from the 1150° C. temperature commonly used in traditional wet oxidation.
The use of supercritical fluid also enhances the rate of oxidation. For example, even at the lowered processing temperatures associated with supercritical processing, the rate of oxidation may exceed traditional wet oxidation methods. This increased rate of oxidation may occur because, as water density is lowered, diffusivity and ion mobility become higher. As one example, processing conditions of about 374° C. and about 221 atmospheres may cause silicon exposed to supercritical-water to oxidize at a rate of more than about 5 Angstroms per minute.
Supercritical water may also provide improved insulating layer formation, especially for high aspect ratio features. Supercritical water may be characterized by low viscosity and low surface tension, properties which permit the supercritical water to penetrate into narrow trenches and provide uniform coverage. Consequently, uniform oxide formation may occur even in extremely narrow and deep features.
Supercritical fluid may also provide in situ cleaning of a semiconductor substrate because its low polarity and low surface tension may aid in removing organic contaminates from the substrate surface. The low polarity, due primarily to the loss of hydrogen bonding under the supercritical processing conditions, may allow nonpolar organics to become soluble in the supercritical water or combine with the O2 in the processing chamber, allowing the nonpolar organics to be driven off of the substrate by effluent water, CO2, or another suitable fluid.
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In one embodiment, the field effect transistor (FET) 300 may comprise a diamond substrate 302 including a plurality of boron doped regions and a plurality of deuterium-boron complex regions. The boron doped regions comprising a plurality of p-type regions, and the deuterium-boron complex regions comprising a plurality of n-type regions. The boron doped regions and the deuterium-boron complex regions may be utilized to form a plurality of source and drain regions for a plurality of microelectronics devices upon the substrate 302.
The boron doped regions (boron doped diamond) may be formed using high density plasma source with a carbon to deuterium ratio ranging between about 0.1 percent and about 5 percent in a vacuum process ambient. Boron doping may be provided by the mixing of a boron containing gas with the carbon/hydrogen gas. The boron containing gas may include B2H6, B2D6, or other boron containing gases. The concentration of boron doping may depend upon the amount of boron containing gas that may be leaked into the process. The process ambient pressure may range between 0.1 mTorr and about 500 Torr. The substrate 302 may be held at a temperature between 150° C. and about 1100° C. The high density plasma may be produced by a microwave electron cyclotron resonance (ECR) plasma, a helicon plasma, a inductively coupled plasma, or other high density plasma sources. For example, the ECR plasma may utilize microwave powers ranging between about 800 Watts and about 2500 Watts.
The n-type deuterium-boron complex regions of the substrate 302 may be formed by a subsequent treatment employing a deuterium plasma of the boron doped region. Selected areas of the field effect transistor (FET) 300 may be covered by a mask (not shown) and uncovered boron doped regions may be treated with a deuterium containing plasma. The deuterium ions provide termination of dangling bonds, thereby transmuting the p-type region into a n-type region. Alternatively, deuterium may be replaced with tritium, hydrogen, or other hydrogen containing gases. The concentration of the n-type region (deuterium-boron complex region) may be controlled by a direct current (DC) or a radio frequency (RF) bias of the substrate 302.
An insulating layer 306 may then be formed between the doped wells 304 using the method 100 of
A spacer 310 may be formed around the insulating layer 306 and the conductive layer 308 using the method 100 of
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A first sacrificial layer 704 may be formed using the method 100 of
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A valve 818 may be manipulated to permit the fluid to enter a process chamber 820 where a substrate (not shown) may be provided. The process chamber 820 may contain valves (not shown) that may be closed to temporarily stop the flow of the supercritical fluid into the process chamber 820. During this time, the pressure in the process chamber 820 may be released to allow a processed substrate to be replaced with an un-processed substrate. The pressure in the process chamber 820 may range between about 50 and about 800 atmospheres during processing. A chamber pressure regulator 824 may be attached to the process chamber 820 which, together with a pressure gauge 822, allows the pressure in the process chamber 820 to be controlled.
Inert gases such as Ar, N2, H2, and O2 may be supplied to the process chamber 820 for mixing with the supercritical water. The pressure gauge 822 and pressure regulator 824 may be used to control the flow of water into a lower pressure expansion vessel 826, which may be held at a lower temperature and pressure than the process chamber 820. Generally, the lower pressure expansion vessel 826 may have a temperature ranging between about 0° C. and about 32° C. and a pressure ranging between about 15 and about 2000 psi. After leaving the expansion vessel 826, the water may enter an exhaust system 828, where the pressure may be slightly below about 1 atmosphere and the temperature may be lower than that of the expansion vessel 826. Alternatively, the exhaust system 828 may be a reclamation system for the water. The water may be recycled, purified, and redirected to the working tank using the reclamation system 828.
The present disclosure has been described relative to a preferred embodiment. Improvements or modifications that become apparent to persons of ordinary skill in the art only after reading this disclosure are deemed within the spirit and scope of the application. For example, it is understood that the method 100 of