Meng et al, Automatic Synthesis of Asynchronous Circuits from High-Level Specifications, IEEE Trans. on Computer Aided Design on Integ Circuits Nov. 1989. |
Berthet et al, Synthesis of Speed-Independent Circuits from Algebraic Specifications, Circuits & Systems, 1988 IEEE Intl. Symposium, pp. 1869-1872. |
Dill et al, Automatic Verification of Speed-Independent Circuits with Petri Net Specifications, ICCD '89, Intl. Conf. pp. 212-216. |
Lam, et al., "Hierarchical Design of Delay-Insensitive systems", IEE Proceedings E, vol. 137, No. 1, Jan. 1990, pp. 41-56. |
Jacobs, et al., "A Fully Asynchronous Digital Signal Processor Using Self-Timed Circuits", IEEE Journal of Solid-State Circuits, vol. 25, No. 6, Dec. 1990, pp. 1526-1536. |
Amon, et al., "Sizing Synchronization Queues: A Case Study in Higher Level Synthesis", 28th ACM/IEEE Design Automation Conference, Paper 39.5, Jun. 1991, pp. 690-693. |