System and methods for power conservation for AMOLED pixel drivers

Abstract
A system is provided for conserving energy in an AMOLED display having pixels that include a drive transistor and an organic light emitting device, and an adjustable source of a supply voltage for the drive transistor. The system monitors the content of a selected segment of the display, sets the supply voltage to the minimum supply voltage required for the current content of the selected segment of the display, determines whether the number of pixels requiring a supply voltage larger than the set value is greater than a predetermined threshold number, and, when the answer is negative, reduces the supply voltage by a predetermined step amount.
Description
FIELD OF THE INVENTION

The present invention generally relates to AMOLED displays, and particularly conserving power consumption on such displays for certain high brightness conditions.


BACKGROUND

Currently, active matrix organic light emitting device (“AMOLED) displays are being proposed. The advantages of such displays include lower power consumption, manufacturing flexibility and faster refresh rate. In contrast to conventional LCD displays, there is no backlighting in an AMOLED display, and each pixel consists of different OLEDs, emitting light independently. The power consumed in each pixel has a relation with the magnitude of the generated light in that pixel. A typical pixel includes the organic light emitting device and a thin film drive transistor. A programming voltage is applied to the gate of the drive transistor which is roughly proportional to the current flowing through the drive transistor to the light emitting device. However, the use of current makes the performance of the pixel dependent on the drive transistor whose characteristics may change since many such transistors are currently fabricated from amorphous silicon. For example, the threshold voltage of amorphous silicon transistors may shift over long term use resulting in data from the programming voltage being incorrectly applied due to the shift.


While the active matrix organic light emitting diode (AMOLED) display is well-known for its low average power consumption, power consumption may still be higher than an active matrix liquid crystal display (AMLCD) at peak brightness. This makes an AMOLED display less appealing for applications such as emails, web surfing and eBooks due to the largely white (high brightness) background required to display such applications. The power dissipation in the AMOLED display is governed by that associated with the thin film drive transistor and the OLED itself. Although the development of a higher efficiency OLED continues to significantly lower the power consumption of the display, the power consumption of current OLED displays in applications requiring high brightness are greater than a comparable AMLCD. New approaches in TFT operation are therefore needed for further reduction in power. Thus a method to reduce power consumption to compensate for increased power requirements in certain brightness conditions is needed.


SUMMARY

Aspects of the present disclosure include a current-biased, voltage-programmed circuit for a pixel of a display. The circuit includes a controllable supply voltage source outputting a supply voltage. An organic light emitting device emitting light has a brightness level as a function of current flow. A drive transistor has a drain coupled to the controllable supply voltage source and a source coupled to the organic light emitting device. The drive transistor has a gate input controlled by a programming voltage input to determine the current flow through the light emitting device. To conserve energy, the system monitors the content of a selected segment of the display, sets the supply voltage to the minimum supply voltage required for the current content of the selected segment of the display, determines whether the number of pixels requiring a supply voltage larger than the set value is greater than a predetermined threshold number, and, when the answer is negative, reduces the supply voltage by a predetermined step amount.


The foregoing and additional aspects and embodiments of the present invention will be apparent to those of ordinary skill in the art in view of the detailed description of various embodiments and/or aspects, which is made with reference to the drawings, a brief description of which is provided next.





BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other advantages of the invention will become apparent upon reading the following detailed description and upon reference to the drawings.



FIG. 1 is a block diagram of an AMOLED display;



FIG. 2 is a block diagram of a pixel driver circuit for the AMOLED display in FIG. 1;



FIG. 3 is a graph of voltage levels for different modes for power consumption savings for the pixel driver circuit in FIG. 2;



FIG. 4 is an alternate pixel driver circuit that may use the power consumption control while controlling for voltage drop and preventing threshold voltage shift;



FIG. 5 is a timing diagram for the control and data signals for the driver circuit in FIG. 4; and



FIG. 6 is a power consumption graph of the example driver circuit against a conventional AMOLED display for different graphics images.



FIG. 7 is a diagrammatic illustration of the sources of power dissipation in an electroluminescent display.



FIG. 8 is a flowchart of a technique for adjusting the supply voltage for a pixel circuit based on the content of a selected segment of a display and a predetermined threshold value.



FIG. 9 is a flow chart of an algorithm for finding the value of the minimum supply voltage for the content of a selected segment of a display.



FIG. 10 is a flow chart of a procedure for compensating for the supply voltage variation in respect to other compensation factors.



FIG. 11 is a flow chart of a modified procedure that compensates for supply voltage variations using effect matrices.





While the invention is susceptible to various modifications and alternative forms, specific embodiments have been shown by way of example in the drawings and will be described in detail herein. It should be understood, however, that the invention is not intended to be limited to the particular forms disclosed. Rather, the invention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.


DETAILED DESCRIPTION


FIG. 1 is an electronic display system 100 having an active matrix area or pixel array 102 in which an array of pixels 104 are arranged in a row and column configuration. For ease of illustration, only two rows and columns are shown. External to the active matrix area of the pixel array 102 is a peripheral area 106 where peripheral circuitry for driving and controlling the pixel array 102 are disposed. The peripheral circuitry includes a gate or address driver circuit 108, a source or data driver circuit 110, a controller 112, and a supply voltage (e.g., Vdd) driver 114. The controller 112 controls the gate, source, and supply voltage drivers 108, 110, 114. The gate driver 108, under control of the controller 112, operates on address or select lines SEL[i], SEL[i+1], and so forth, one for each row of pixels 104 in the pixel array 102. A video source 120 feeds processed video data into the controller 112 for display on the display system 100. The video source 120 represents any video output from devices using the display system 100 such as a computer, cell phone, PDA and the like. The controller 112 converts the processed video data to the appropriate voltage programming information to the pixels 104 on the display 100 system 100.


In pixel sharing configurations described below, the gate or address driver circuit 108 can also optionally operate on global select lines GSEL[j] and optionally/GSEL[j], which operate on multiple rows of pixels 104 in the pixel array 102, such as every two rows of pixels 104. The source driver circuit 110, under control of the controller 112, operates on voltage data lines Vdata[k], Vdata[k+1], and so forth, one for each column of pixels 104 in the pixel array 102. The voltage data lines carry voltage programming information to each pixel 104 indicative of a brightness of each light emitting device in the pixel 104. A storage element, such as a capacitor, in each pixel 104 stores the voltage programming information until an emission or driving cycle turns on the light emitting device. The supply voltage driver 114, under control of the controller 112, controls the level of voltage on a supply voltage (EL_Vdd) line, one for each row of pixels 104 in the pixel array 102. Alternatively, the voltage driver 114 may individually control the level of supply voltage for each row of pixels 104 in the pixel array 102 or each column of pixels 104 in the pixel array 102. As will be explained, the level of the supply voltage is adjusted to conserve power consumed by the pixel array 102 depending on the brightness required.


As is known, each pixel 104 in the display system 100 needs to be programmed with information indicating the brightness of the organic light emitting device in the pixel 104 for a particular frame. A frame defines the time period that includes a programming cycle or phase during which each and every pixel in the display system 100 is programmed with a programming voltage indicative of a brightness and a driving or emission cycle or phase during which each light emitting device in each pixel is turned on to emit light at a brightness commensurate with the programming voltage stored in a storage element. A frame is thus one of many still images that compose a complete moving picture displayed on the display system 100. There are at least two schemes for programming and driving the pixels: row-by-row, or frame-by-frame. In row-by-row programming, a row of pixels is programmed and then driven before the next row of pixels is programmed and driven. In frame-by-frame programming, all rows of pixels in the display system 100 are programmed first, and all of the pixels are driven row-by-row. Either scheme can employ a brief vertical blanking time at the beginning or end of each frame during which the pixels are neither programmed nor driven.


The components located outside of the pixel array 102 can be disposed in a peripheral area 106 around the pixel array 102 on the same physical substrate on which the pixel array 102 is disposed. These components include the gate driver 108, the source driver 110 and the supply voltage controller 114. Alternatively, some of the components in the peripheral area can be disposed on the same substrate as the pixel array 102 while other components are disposed on a different substrate, or all of the components in the peripheral area can be disposed on a substrate different from the substrate on which the pixel array 102 is disposed. Together, the gate driver 108, the source driver 110, and the supply voltage control 114 make up a display driver circuit. The display driver circuit in some configurations can include the gate driver 108 and the source driver 110 but not the supply voltage controller 114.


The use of the AMOLED display system 100 in FIG. 1 for applications with bright backgrounds such as emails, Internet surfing, etc. requires higher power consumption due to the need for each pixel to serve as a light for such applications. However, the same supply voltage applied to the drive transistors of each pixel is still used when the pixel is switched to varying degrees of gray scales (brightness). The current example therefore manages the supply power of the drive transistors for video data that requires higher brightness, therefore resulting in power savings while maintaining the necessary luminescence compared to an ordinary AMOLED display with a constant supply voltage to the drive transistors.



FIG. 2 is a circuit diagram of a simple individual driver circuit 200 for a pixel such as the pixel 104 in FIG. 1. As explained above, each pixel 104 in the pixel array 102 in FIG. 1 is driven by the driver circuit 200 in FIG. 2. The driver circuit 200 includes a drive transistor 202 coupled to an organic light emitting device 204. In this example, the organic light emitting device 204 is a luminous organic material which is activated by current flow and whose brightness is a function of the magnitude of the current. A supply voltage input 206 is coupled to the drain of the drive transistor 202. The supply voltage input 206 in conjunction with the drive transistor 202 creates current in the light emitting device 204. The current level may be controlled via a programming voltage input 208 coupled to the gate of the drive transistor 202. The programming voltage input 208 is therefore coupled to the source driver 110 in FIG. 1. In this example, the drive transistor 202 is a thin film transistor fabricated from hydrogenated amorphous silicon. Of course, the techniques described herein may be employed with drive transistors fabricated from other semi-conductor materials. Other circuit components such as capacitors and transistors (not shown) may be added to the simple driver circuit 200 to allow the pixel to operate with various enable, select and control signals such as those input by the gate driver 108 in FIG. 1. Such components are used for faster programming of the pixels, holding the programming of the pixel during different frames and other functions.


When the pixel 104 is required to have maximum brightness such as in applications such as e-mail or web surfing, the gate of the drive transistor 202 is driven so the transistor 202 is in saturation mode and therefore fully open allowing high current to flow through the organic light emitting device 204 creating maximum brightness. Lower levels of brightness for the light emitting device 204, such as those for lower gray scales, are controlled by controlling the voltage to the gate of the drive transistor 202 in the linear region. When the drive transistor 202 operate in this region, the gate voltage controls the current supplied to the light emitting device 204 linearly and therefore the brightness of the light emitting device. In a power saving mode in this example, the power consumption associated with the drive transistor 202 is reduced because as the drive transistor 202 is driven into saturation mode at a certain threshold voltage, a lower supply voltage above the threshold voltage will still maintain a level of current to the light emitting device 204 that produces roughly the same brightness as a higher supply voltage would.



FIG. 3 shows four different modes of power consumption that regulate the supply voltage level 300. A first mode has a relatively high driver voltage level 302 which results in the highest brightness. A second mode has a relatively lower voltage level 304 as the pixel is not required to be as bright such as a gray scale requiring a region to allow sufficient gate voltage control of the necessary brightness. A third mode has a lower voltage level 306 resulting in a darker shade. A fourth mode reduces the driver voltage to a low level 308. A constant supply voltage level 310 represents a conventional AMOLED driver circuit where the supply voltage is kept at one level. The varying of supply voltages to the drive transistor depending on the brightness requirements of the pixel 104 results in savings in power consumption of around 40% over a conventional OLED pixel represented by the voltage level 310. It is to be understood that there may be any number of different power supply levels.


The level of the supply voltage from the supply voltage input 206 in FIG. 2 is controlled by the voltage controller 114 in FIG. 1. The control of the supply voltage may be based on the current required by the display system 100 based on sensed display current compared to certain threshold levels. One example of measuring display current is determining the total current from the power supply connected to the display system 100. In this example, the controller 112 will compare the sensed display current with threshold levels and adjust the supply voltages supplied by the voltage controller 114 to save power consumption as the different threshold levels are exceeded. A higher current may indicate that the supply voltages may be lowered to a level that still achieves the needed brightness. A lower current will allow lower voltages to be used in situations where the pixel is largely in darker gray scales not requiring bright levels.


Alternatively, the determination may be made during video processing based on the amount of overall brightness required in a particular video frame based on the video data received from the video source 120 in FIG. 1. Such a determination could be made via video processing software on the device associated with the video source 120 using the display system 100 in FIG. 1 or by the controller 112. For example, in the cases of a smooth gradient image (gradual transition from black to full white), if the gradient stays the same between frames with no sudden jumps, contouring effects or color shifts, the controller 112 may determine that the image quality is not changed and adjustments may be made to the supply voltage. In this example, the supply voltage is controlled at the same level for each pixel in the display 100 via a common voltage supply line. However, different segments of pixels may have their supply voltages controlled independently such as the supply voltages for each row of pixels or column of pixels for more precise power saving. The independent voltage control for the drive transistors of different segments of pixels may be preferably performed for larger displays having more variation of brightness levels for a given frame over the different pixels.


The drive transistor 202 has a saturation region where current is constant against the voltage applied across the source and the drain such as the supply voltage from the supply voltage input 206 in FIG. 2. At lower gate voltage levels, the level of current through the transistor has a linear relationship with the gate voltage. A transition region exists between the linear region and the saturation region. The saturation region maintains a substantially constant current for any voltage level above the threshold voltage. Operating in saturation has been necessary due to the high contact resistance associated with an amorphous silicon thin film transistor such as the drive transistor 202 in particular.


Thus, the operating voltage for a pixel should be chosen such that the drive transistor 202 stays in deep saturation to reduce cross talk stemming from voltage drop on the supply voltage input 206 in a power saving mode. The pixel 104 is therefore programmed with a high current to the light emitting device 204 therefore making it become an almost linear function of the voltage across the drive transistor 202. In this case, the high current required for the light emitting device 204 effectively leads to source degeneration, thus reducing the effect of the voltage drop on the drive transistor 202. Also, during the leakage time, the pixel current is brought to normal levels, which further compensates for the voltage drop. As a result the display luminance stays the same. This effect reduces the power of the drive transistor 202 by over 50% and total power consumption by 40% when the pixel 104 is at the highest brightness levels required for applications such as e-mail and web browsing.


However, since the drive transistor 202 is shifted toward the linear region of operation by lower supply voltages in order to maintain the necessary high current for the light emitting device 204, the image quality is affected by ground bouncing and voltage drop. However, since the gray scales are further apart in applications requiring primarily bright pixels such as e-mail, the image quality will not be affected significantly. In order to maintain the same luminance, the programming voltage input to the gate of the drive transistor 202 may be controlled by adjusting gamma curves. FIG. 4 shows an alternate driver circuit 400 for a display pixel such as the pixels 104 in FIG. 1 that may employ the voltage supply control but tolerate voltage drop and ground bouncing. The driver circuit 400 is capable of operating in the saturation-linear transition region or even further down in the linear region of the driver transistor, resulting in significant power reduction without causing any image artifacts.


The driver circuit 400 includes a drive transistor 402 having a source coupled to an organic light emitting device 404. A programming voltage input 406 is coupled to the gate of the drive transistor 402 through a select transistor 408. The select transistor 408 has a gate that is coupled to a select input 410. A select signal on the select input 410 allows a programming voltage signal on the program voltage input 406 to adjust the current through the drive transistor 402 to the light emitting device 404. The program voltage input 406 is coupled to the drain of the select transistor 406. The source of the select transistor 408 is coupled to the gate of the drive transistor 402 and the gate of a bias transistor 412 that is wired in series to another bias transistor 414. A source capacitor 416 is charged to the programming voltage when the select transistor 408 is turned on. A control signal input 420 is coupled to the gate of the bias transistor 414. A controlled supply voltage input 422 is coupled to the drain of the drive transistor 402. The input supply voltage 422 is controlled via a voltage controller such as the voltage controller 114 in FIG. 1 to adjust the supply voltage level and therefore save power for the driver circuit 400.



FIG. 5 is a timing diagram of the signals for the select input 410, the control input 420 and the programming input 406 in FIG. 4 during one frame of the pixel powered by the driver circuit 400. When the select signal on the signal input 410 is input to the select transistor 408, the transistor 408 is turned on allowing the programming voltage signal input 406 to charge the source capacitor 416 to the programming voltage level that will produce the proper current flow through the drive transistor 402 to the organic light emitting device 404. This part of the cycle programs the pixel circuit 400 with the proper brightness level based on the programming voltage signal input 406. The voltage drop and ground bouncing are eliminated by the use of the bias transistors 412 and 414.


As shown in FIG. 5, the next part of the cycle turns off the select signal on the signal input 410 and turns on the control signal to the control signal input 420 coupled to the gate of the transistor 414. When the select signal on the select signal input 410 is strobed low, the select transistor 408 is turned off causing the programming voltage to be held by the stored voltage in the capacitor 416. The control signal input 420 turns on the bias transistor 414 on. The control signal on the control signal input 420 thus enables voltage compensation with charge leakage. In the next cycle, the control signal on the control signal input 420 is then strobed low which turns off the transistor 414 causing the programming voltage stored on the capacitor 416 to be coupled between the source and the gate of the drive transistor 402. The data programming voltage to the gate causes the current to the light emitting device 404 to be regulated by the drive transistor 402. The pixel is therefore turned on during this period and holds the program voltage level from the programming voltage input 106. The control signal to the control signal input 420 then goes high again which turns the pixel off and therefore relaxes the current flowing through the drive transistor 402. Because of the negative bias caused by the bias transistors 412 and 414, the transistor 402 thus recovers a significant part of the threshold voltage shift and thereby lengthens the life of the transistor 402.


The display circuit 400 in FIG. 4 is therefore off for a small part of the frame time when the control signal input 420 is strobed a second time. Since the circuit 400 is not on for most of the frame time, during the off period, the threshold voltage shift may be recovered. While the circuit is off, the drive transistor 402 is stressed with a high current level via the supply voltage signal 422. The cycle evens the threshold voltage shift of all the pixels in the display thereby reducing the effect of differential aging. The drive transistor 402 is negatively biased during the recovery period, thereby recovering a significant part of the threshold voltage shift serving to prolong the lifetime of the drive transistor 402 and therefore the pixel. This reduces the threshold voltage of the drive transistor 402 by nearly a factor of 3. The driver circuit 400 in FIG. 4 therefore allows the use of lower supply voltage to the drive transistor 402 while compensating for the effects of voltage drop and cross talk.


The driver circuit 400 in FIG. 4 also allows the compensation for voltage shifts in the threshold voltage of the drive transistor 402 due to oversaturation from the lower drive voltage levels. When a lower voltage is applied across the drive transistor 402, it may result in higher voltage threshold shift stemming from increased carriers of the channel which in turn leads to faster aging of the transistor 402. Since the voltages in FIG. 4 are relatively higher due to the bias transistor pair 412 and 414, the drive transistor 402 is not driven in transition for as much time as using a relative lower voltage therefore stabilizing long term threshold voltage shift and increasing the lifetime of the transistor 402.



FIG. 6 is a graph showing the savings in power of an AMOLED pixel display using adjustable supply voltage control in comparison with a standard AMOLED pixel display using a constant supply voltage. Significant power savings may be made in applications with high brightness output. A bar 602 shows the lower power level from an AMOLED display using the procedures outlined above in comparison to a bar 612 from a standard AMOLED display when displaying a total white screen. Other applications such as a bright image (e.g., start menu) as represented by the bar 608 showing the lower power consumption of an adjustable supply voltage AMOLED display in comparison to a bar 618 showing the power consumption of a standard AMOLED display. Bars 604 and 606 show the smaller power savings in cases where the pixels are darker (less bright) in comparison to bars 614 and 616 representing the power consumed by a conventional AMOLED display.



FIG. 7 is a diagrammatic illustration of the sources of power dissipation in an electroluminescent display. As shown, the sources of power consumption are the parasitic resistance (contact:Rcon, line resistance: Rsup1 and Rsup2), and the voltage drops across the drive element and load element. The power consumption can be reduced by improving the load efficiency to operate at lower voltage and lower current levels, and by improving the performance of the drive element to reduce the operation voltage. Also, the driving conditions can be optimized to require only the lowest possible power for any given devices.


In most displays, the supply voltage is adjusted to the worst case, which includes the worst voltage drop across the parasitic resistance plus the worst voltage drop across the drive element and load element. The supply voltage may be adjusted based on the content of the display. In this case, the supply voltage is adjusted based on long hysteresis curves to eliminate any sudden change in the display. Therefore, it does not work effectively when displaying dynamic content (e.g., videos).



FIG. 8 is a flowchart of one implementation of a technique for adjusting the supply voltage based on the content of a segment of the display and a threshold value. This technique eliminates the need for hysteresis curves. The supply voltage is adjusted prior to or after updating a small segment of the display. Since the change in the content of the display segment is minimal during these adjustments, the change in supply voltage is gradual. Thus, sudden changes in the voltages are avoided.


At step 801 in FIG. 8, the delay required to change the supply voltage is calculated or measured, or the delay may be set to a default value. Then at step 802 the supply voltage is set to the minimum voltage required for the current content of the display segment, accounting for the delay. Step 803 calculates the minimum supply voltage that results in a number of pixels having a required supply voltage larger than the set value, that is smaller than a predetermined threshold number. The supply voltage is then set at the calculated value at step 804, and the content of the display segment is updated at step 805.



FIG. 9 is a flow chart of a detailed implementation of an algorithm for finding the value of the minimum supply voltage used in step 803 in FIG. 8. In FIG. 9, the first two steps 901 and 902 are the same as the first two steps 801 and 802 in FIG. 8. Then at step 903 the supply voltage is set to a selected value, after which step 904 determines whether the number of pixels requiring a supply voltage larger than the set value, is greater than a predetermined threshold number. The threshold number used in step 904 is defined as the number of pixels that can operate with a supply voltage smaller than the required supply voltage without substantially affecting the image quality. If the answer at step 904 is negative, step 905 reduces the set value of the supply voltage by a predetermined step amount. This enables the display to operate at lower supply voltages, since the number of pixels that require a high supply voltage, based on the image content, is typically a small number in any given image (or frame), and the step to the next lower supply voltage is large. If the answer at step 904 is positive, step 906 sets the actual supply voltage to the value selected in step 902, and then the content of the display segment is updated at step 907.


In a further embodiment, the drive element is pushed to operate in a linear regime where the drive element is sensitive to the supply voltage variation. This mode can be used for cases where the image content is limited (e.g., only few gray levels). However, the use of this operation can be extended by compensating for the supply voltage variation across the panel. Compensation for other factors of the display, such as non-uniformity or aging, should be considered since they can affect the supply voltage variation significantly. There are different techniques for extracting voltage variation across a display, and two of these techniques will be described in accordance with other compensation factors. These two techniques can be swapped with other techniques.



FIG. 10 is a flow chart of a procedure for compensating for the supply voltage variation in respect to other compensation factors. Here, the effective resistance for a few virtual (or physical) points in the display is calculated at step 1001. The video signal is compensated for cases that can directly affect the pixel current, such as gamma, brightness, color point, and efficiency compensation of the load element, at step 1002a, and the current passing through each of the selected points is calculated at step 1002. Using the effective resistance of each point, the voltage drop for each point is then calculated and used to calculate the cumulative voltage drop for each point at step 1003. Using the extracted voltage drop, the effective voltage drop for each pixel is calculated at step 1004, using a different method such as interpolation.


Step 1005 compensates for the supply voltage variation and other compensation factors (e.g., the second part of the backplane and OLED's). Here, the order of compensation factors can be based on reducing the computation error and reducing the complexity of the calculation. The signal values are adjusted at step 1006, based on the pixel voltage drop. Step 1007 compensates for the last part of the backplane and OLED's), and then the display panel is programmed at step 1008.



FIG. 11 is a flow chart of a modified embodiment that compensates for supply voltage variations using effect matrices. The effect matrix is measured or calculated for each point at step 1101. This matrix shows the effect of the current passing through the point, on the supply voltage of other points. Thus, the calculation of the supply voltage variation is carried out using the effect matrices, by calculating the current going through each point (step 1102), calculating the effect of each current using the matrix effect (step 1103), and calculating the effective voltage drop for each pixel step 1104). Then the same compensating, adjusting and programming steps described above are executed at steps 1105 through 1107.


While particular embodiments and applications of the present invention have been illustrated and described, it is to be understood that the invention is not limited to the precise construction and compositions disclosed herein and that various modifications, changes, and variations can be apparent from the foregoing descriptions without departing from the spirit and scope of the invention as defined in the appended claims.

Claims
  • 1. A method of conserving energy in an AMOLED display having pixels that include a drive transistor and an organic light emitting device, and an adjustable source of a supply voltage for the drive transistor, the method comprising monitoring the content of a selected segment of the display,setting the supply voltage to the minimum supply voltage required for the current content of said selected segment of the display, anddetermining whether the number of pixels in said selected segment that require a supply voltage larger than the set value, is greater than a predetermined threshold number and, when the answer is negative, reducing the supply voltage by a predetermined step amount.
  • 2. The method of claim 1 in which said monitoring of said content of said selected segment of the display comprises monitoring the voltage supplied to the gate input of said drive transistor input.
  • 3. An active matrix organic light emitting device display, comprising: an adjustable supply voltage source;a plurality of pixels, each coupled to the adjustable supply voltage source, each pixel including:an organic light emitting device;a drive transistor having a source and a drain, one of which is coupled to the organic light emitting device and the other of which is coupled to the adjustable supply voltage source;a plurality of programming voltage inputs coupled to the gates of the drive transistors of the plurality of pixels, the programming voltage inputs providing a programming voltage indicative of a desired brightness of each of the plurality of pixels; anda supply voltage controller coupled to the adjustable voltage source to regulate the level of a supply voltage supplied to each of the drive transistors, the supply voltage controllermonitoring the content of a selected segment of the display,setting the supply voltage to the minimum supply voltage required for the current content of said selected segment of the display, andreducing the supply voltage by a predetermined step amount when the number of pixels in the selected segment that require a supply voltage larger than the set value, is greater than a predetermined threshold number.
  • 4. The active matrix organic light emitting device display of claim 3 in which said content of said selected segment of the display is monitored by monitoring the voltage supplied to the gate input of said drive transistor input.
Priority Claims (1)
Number Date Country Kind
2687631 Dec 2009 CA national
CROSS-REFERENCE TO RELATED APPLICATION

This application is a continuation-in-part of, and claims priority to, pending U.S. patent application Ser. No. 12/958,938, filed Dec. 2, 2010, entitled “Systems and Methods for Power Conservation for AMOLED Pixel Drivers,” which in turn claims the benefit of Canadian Patent Application Serial No. 2,687,631, filed Dec. 6, 2009, entitled “Low Power Driving Scheme For Display Applications,” which are incorporated herein by reference in their entirety.

US Referenced Citations (555)
Number Name Date Kind
3506851 Polkinghorn et al. Apr 1970 A
3750987 Gobel Aug 1973 A
3774055 Bapat et al. Nov 1973 A
4090096 Nagami May 1978 A
4160934 Kirsch Jul 1979 A
4354162 Wright Oct 1982 A
4943956 Noro Jul 1990 A
4996523 Bell et al. Feb 1991 A
5134387 Smith et al. Jul 1992 A
5153420 Hack et al. Oct 1992 A
5170158 Shinya Dec 1992 A
5198803 Shie et al. Mar 1993 A
5204661 Hack et al. Apr 1993 A
5266515 Robb et al. Nov 1993 A
5278542 Smith et al. Jan 1994 A
5408267 Main Apr 1995 A
5489918 Mosier Feb 1996 A
5498880 Lee et al. Mar 1996 A
5572444 Lentz et al. Nov 1996 A
5589847 Lewis Dec 1996 A
5619033 Weisfield Apr 1997 A
5648276 Hara et al. Jul 1997 A
5670973 Bassetti et al. Sep 1997 A
5691783 Numao et al. Nov 1997 A
5701505 Yamashita et al. Dec 1997 A
5714968 Ikeda Feb 1998 A
5723950 Wei et al. Mar 1998 A
5744824 Kousai et al. Apr 1998 A
5745660 Kolpatzik et al. Apr 1998 A
5748160 Shieh et al. May 1998 A
5758129 Gray et al. May 1998 A
5815303 Berlin Sep 1998 A
5835376 Smith et al. Nov 1998 A
5870071 Kawahata Feb 1999 A
5874803 Garbuzov et al. Feb 1999 A
5880582 Sawada Mar 1999 A
5903248 Irwin May 1999 A
5917280 Burrows et al. Jun 1999 A
5923794 McGrath et al. Jul 1999 A
5945972 Okumura et al. Aug 1999 A
5949398 Kim Sep 1999 A
5952789 Stewart et al. Sep 1999 A
5952991 Akiyama et al. Sep 1999 A
5982104 Sasaki et al. Nov 1999 A
5990629 Yamada et al. Nov 1999 A
6023259 Howard et al. Feb 2000 A
6069365 Chow et al. May 2000 A
6091203 Kawashima et al. Jul 2000 A
6097360 Holloman Aug 2000 A
6100868 Lee et al. Aug 2000 A
6144222 Ho Nov 2000 A
6177915 Beeteson et al. Jan 2001 B1
6229506 Dawson et al. May 2001 B1
6229508 Kane May 2001 B1
6246180 Nishigaki Jun 2001 B1
6252248 Sano et al. Jun 2001 B1
6259424 Kurogane Jul 2001 B1
6262589 Tamukai Jul 2001 B1
6268841 Cairns et al. Jul 2001 B1
6271825 Greene et al. Aug 2001 B1
6288696 Holloman Sep 2001 B1
6304039 Appelberg et al. Oct 2001 B1
6307322 Dawson et al. Oct 2001 B1
6310962 Chung et al. Oct 2001 B1
6320325 Cok et al. Nov 2001 B1
6323631 Juang Nov 2001 B1
6333729 Ha Dec 2001 B1
6356029 Hunter Mar 2002 B1
6373454 Knapp et al. Apr 2002 B1
6388653 Goto et al. May 2002 B1
6392617 Gleason May 2002 B1
6396469 Miwa et al. May 2002 B1
6414661 Shen et al. Jul 2002 B1
6417825 Stewart et al. Jul 2002 B1
6430496 Smith et al. Aug 2002 B1
6433488 Bu Aug 2002 B1
6437106 Stoner et al. Aug 2002 B1
6445369 Yang et al. Sep 2002 B1
6473065 Fan Oct 2002 B1
6475845 Kimura Nov 2002 B2
6501098 Yamazaki Dec 2002 B2
6501466 Yamagishi et al. Dec 2002 B1
6522315 Ozawa et al. Feb 2003 B2
6525683 Gu Feb 2003 B1
6531827 Kawashima Mar 2003 B2
6535185 Kim et al. Mar 2003 B2
6542138 Shannon et al. Apr 2003 B1
6580408 Bae et al. Jun 2003 B1
6580657 Sanford et al. Jun 2003 B2
6583398 Harkin Jun 2003 B2
6583775 Sekiya et al. Jun 2003 B1
6594606 Everitt Jul 2003 B2
6618030 Kane et al. Sep 2003 B2
6639244 Yamazaki et al. Oct 2003 B1
6668645 Gilmour et al. Dec 2003 B1
6677713 Sung Jan 2004 B1
6680580 Sung Jan 2004 B1
6686699 Yumoto Feb 2004 B2
6687266 Ma et al. Feb 2004 B1
6690000 Muramatsu et al. Feb 2004 B1
6690344 Takeuchi et al. Feb 2004 B1
6693388 Oomura Feb 2004 B2
6693610 Shannon et al. Feb 2004 B2
6694248 Smith et al. Feb 2004 B2
6697057 Koyama et al. Feb 2004 B2
6720942 Lee et al. Apr 2004 B2
6724151 Yoo Apr 2004 B2
6734636 Sanford et al. May 2004 B2
6738034 Kaneko et al. May 2004 B2
6738035 Fan May 2004 B1
6753655 Shih et al. Jun 2004 B2
6753834 Mikami et al. Jun 2004 B2
6756741 Li Jun 2004 B2
6756952 Decaux et al. Jun 2004 B1
6756958 Furuhashi et al. Jun 2004 B2
6771028 Winters Aug 2004 B1
6777712 Sanford et al. Aug 2004 B2
6777888 Kondo Aug 2004 B2
6781567 Kimura Aug 2004 B2
6788231 Hsueh Sep 2004 B1
6806497 Jo Oct 2004 B2
6806638 Lih et al. Oct 2004 B2
6806857 Sempel et al. Oct 2004 B2
6809706 Shimoda Oct 2004 B2
6815975 Nara et al. Nov 2004 B2
6828950 Koyama Dec 2004 B2
6853371 Miyajima et al. Feb 2005 B2
6858991 Miyazawa Feb 2005 B2
6859193 Yumoto Feb 2005 B1
6873117 Ishizuka Mar 2005 B2
6876346 Anzai et al. Apr 2005 B2
6885356 Hashimoto Apr 2005 B2
6900485 Lee May 2005 B2
6903734 Eu Jun 2005 B2
6909243 Inukai Jun 2005 B2
6909419 Zavracky et al. Jun 2005 B2
6911960 Yokoyama Jun 2005 B1
6911964 Lee et al. Jun 2005 B2
6914448 Jinno Jul 2005 B2
6919871 Kwon Jul 2005 B2
6924602 Komiya Aug 2005 B2
6937215 Lo Aug 2005 B2
6937220 Kitaura et al. Aug 2005 B2
6940214 Komiya et al. Sep 2005 B1
6943500 LeChevalier Sep 2005 B2
6947022 McCartney Sep 2005 B2
6954194 Matsumoto et al. Oct 2005 B2
6956547 Bae et al. Oct 2005 B2
6970149 Chung et al. Nov 2005 B2
6975142 Azami et al. Dec 2005 B2
6975332 Arnold et al. Dec 2005 B2
6995510 Murakami et al. Feb 2006 B2
6995519 Arnold et al. Feb 2006 B2
7023408 Chen et al. Apr 2006 B2
7027015 Booth, Jr. et al. Apr 2006 B2
7027078 Reihl Apr 2006 B2
7034793 Sekiya et al. Apr 2006 B2
7038392 Libsch et al. May 2006 B2
7057359 Hung et al. Jun 2006 B2
7057588 Asano et al. Jun 2006 B2
7061451 Kimura Jun 2006 B2
7064733 Cok et al. Jun 2006 B2
7071932 Libsch et al. Jul 2006 B2
7088051 Cok Aug 2006 B1
7088052 Kimura Aug 2006 B2
7102378 Kuo et al. Sep 2006 B2
7106285 Naugler Sep 2006 B2
7112820 Change et al. Sep 2006 B2
7113864 Smith et al. Sep 2006 B2
7116058 Lo et al. Oct 2006 B2
7119493 Fryer et al. Oct 2006 B2
7122835 Ikeda et al. Oct 2006 B1
7127380 Iverson et al. Oct 2006 B1
7129914 Knapp et al. Oct 2006 B2
7164417 Cok Jan 2007 B2
7193589 Yoshida et al. Mar 2007 B2
7224332 Cok May 2007 B2
7227519 Kawase et al. Jun 2007 B1
7245277 Ishizuka Jul 2007 B2
7248236 Nathan et al. Jul 2007 B2
7259737 Ono et al. Aug 2007 B2
7262753 Tanghe et al. Aug 2007 B2
7274363 Ishizuka et al. Sep 2007 B2
7310092 Imamura Dec 2007 B2
7315295 Kimura Jan 2008 B2
7317434 Lan et al. Jan 2008 B2
7321348 Cok et al. Jan 2008 B2
7327357 Jeong Feb 2008 B2
7333077 Koyama et al. Feb 2008 B2
7339560 Sun Mar 2008 B2
7343243 Smith et al. Mar 2008 B2
7355574 Leon et al. Apr 2008 B1
7358941 Ono et al. Apr 2008 B2
7368868 Sakamoto May 2008 B2
7411571 Huh Aug 2008 B2
7414600 Nathan et al. Aug 2008 B2
7423617 Giraldo et al. Sep 2008 B2
7466166 Date et al. Dec 2008 B2
7474285 Kimura Jan 2009 B2
7495501 Iwabuchi et al. Feb 2009 B2
7502000 Yuki et al. Mar 2009 B2
7515124 Yaguma et al. Apr 2009 B2
7528812 Tsuge et al. May 2009 B2
7535449 Miyazawa May 2009 B2
7554512 Steer Jun 2009 B2
7569849 Nathan et al. Aug 2009 B2
7576718 Miyazawa Aug 2009 B2
7580012 Kim et al. Aug 2009 B2
7589707 Chou Sep 2009 B2
7595776 Hashimoto et al. Sep 2009 B2
7604718 Zhang et al. Oct 2009 B2
7609239 Chang Oct 2009 B2
7612745 Yumoto et al. Nov 2009 B2
7619594 Hu Nov 2009 B2
7619597 Nathan et al. Nov 2009 B2
7633470 Kane Dec 2009 B2
7639211 Miyazawa Dec 2009 B2
7656370 Schneider et al. Feb 2010 B2
7683899 Hirakata et al. Mar 2010 B2
7688289 Abe et al. Mar 2010 B2
7760162 Miyazawa Jul 2010 B2
7800558 Routley et al. Sep 2010 B2
7808008 Miyake Oct 2010 B2
7847764 Cok et al. Dec 2010 B2
7859492 Kohno Dec 2010 B2
7859520 Kimura Dec 2010 B2
7868859 Tomida et al. Jan 2011 B2
7876294 Sasaki et al. Jan 2011 B2
7889159 Nathan et al. Feb 2011 B2
7903127 Kwon Mar 2011 B2
7920116 Woo et al. Apr 2011 B2
7924249 Nathan et al. Apr 2011 B2
7932883 Klompenhouwer et al. Apr 2011 B2
7944414 Shirasaki et al. May 2011 B2
7969390 Yoshida Jun 2011 B2
7978170 Park et al. Jul 2011 B2
7978187 Nathan et al. Jul 2011 B2
7989392 Crockett et al. Aug 2011 B2
7994712 Sung et al. Aug 2011 B2
7995008 Miwa Aug 2011 B2
8026876 Nathan et al. Sep 2011 B2
8049420 Tamura et al. Nov 2011 B2
8063852 Kwak et al. Nov 2011 B2
8077123 Naugler, Jr. Dec 2011 B2
8115707 Nathan et al. Feb 2012 B2
8144081 Miyazawa Mar 2012 B2
8159007 Bama et al. Apr 2012 B2
8223177 Nathan et al. Jul 2012 B2
8232939 Nathan et al. Jul 2012 B2
8242979 Anzai et al. Aug 2012 B2
8259044 Nathan et al. Sep 2012 B2
8264431 Bulovic et al. Sep 2012 B2
8279143 Nathan et al. Oct 2012 B2
8319712 Nathan et al. Nov 2012 B2
8339386 Leon et al. Dec 2012 B2
20010002703 Koyama Jun 2001 A1
20010009283 Arao et al. Jul 2001 A1
20010024181 Kubota Sep 2001 A1
20010024186 Kane et al. Sep 2001 A1
20010026257 Kimura Oct 2001 A1
20010030323 Ikeda Oct 2001 A1
20010040541 Yoneda et al. Nov 2001 A1
20010043173 Troutman Nov 2001 A1
20010045929 Prache Nov 2001 A1
20010052606 Sempel et al. Dec 2001 A1
20010052940 Hagihara et al. Dec 2001 A1
20020000576 Inukai Jan 2002 A1
20020011796 Koyama Jan 2002 A1
20020011799 Kimura Jan 2002 A1
20020012057 Kimura Jan 2002 A1
20020014851 Tai et al. Feb 2002 A1
20020018034 Ohki et al. Feb 2002 A1
20020030190 Ohtani et al. Mar 2002 A1
20020047565 Nara et al. Apr 2002 A1
20020052086 Maeda May 2002 A1
20020067134 Kawashima Jun 2002 A1
20020080108 Wang Jun 2002 A1
20020084463 Sanford et al. Jul 2002 A1
20020101172 Bu Aug 2002 A1
20020105279 Kimura Aug 2002 A1
20020117722 Osada et al. Aug 2002 A1
20020122308 Ikeda Sep 2002 A1
20020140712 Ouchi et al. Oct 2002 A1
20020158587 Komiya Oct 2002 A1
20020158666 Azami et al. Oct 2002 A1
20020158823 Zavracky et al. Oct 2002 A1
20020167474 Everitt Nov 2002 A1
20020171613 Goto et al. Nov 2002 A1
20020180369 Koyama Dec 2002 A1
20020180721 Kimura et al. Dec 2002 A1
20020186214 Siwinski Dec 2002 A1
20020190924 Asano et al. Dec 2002 A1
20020190971 Nakamura et al. Dec 2002 A1
20020195967 Kim et al. Dec 2002 A1
20020195968 Sanford et al. Dec 2002 A1
20030001828 Asano Jan 2003 A1
20030020413 Oomura Jan 2003 A1
20030030603 Shimoda Feb 2003 A1
20030043088 Booth et al. Mar 2003 A1
20030057895 Kimura Mar 2003 A1
20030058226 Bertram et al. Mar 2003 A1
20030062524 Kimura Apr 2003 A1
20030062844 Miyazawa Apr 2003 A1
20030063081 Kimura et al. Apr 2003 A1
20030071821 Sundahl et al. Apr 2003 A1
20030076048 Rutherford Apr 2003 A1
20030090445 Chen et al. May 2003 A1
20030090447 Kimura May 2003 A1
20030090481 Kimura May 2003 A1
20030095087 Libsch May 2003 A1
20030098829 Chen et al. May 2003 A1
20030107560 Yumoto et al. Jun 2003 A1
20030107561 Uchino et al. Jun 2003 A1
20030111966 Mikami et al. Jun 2003 A1
20030112205 Yamada Jun 2003 A1
20030112208 Okabe et al. Jun 2003 A1
20030112231 Kurumisawa Jun 2003 A1
20030117348 Knapp et al. Jun 2003 A1
20030122474 Lee Jul 2003 A1
20030122745 Miyazawa Jul 2003 A1
20030122747 Shannon et al. Jul 2003 A1
20030122813 Ishizuki et al. Jul 2003 A1
20030128199 Kimura Jul 2003 A1
20030142088 LeChevalier Jul 2003 A1
20030151569 Lee et al. Aug 2003 A1
20030156101 Le Chevalier Aug 2003 A1
20030156104 Morita Aug 2003 A1
20030169241 LeChevalier Sep 2003 A1
20030169247 Kawabe et al. Sep 2003 A1
20030174152 Noguchi Sep 2003 A1
20030179626 Sanford et al. Sep 2003 A1
20030189535 Matsumoto et al. Oct 2003 A1
20030197663 Lee et al. Oct 2003 A1
20030210256 Mori et al. Nov 2003 A1
20030214465 Kimura Nov 2003 A1
20030230141 Gilmour et al. Dec 2003 A1
20030230980 Forrest et al. Dec 2003 A1
20030231148 Lin et al. Dec 2003 A1
20040004589 Shih Jan 2004 A1
20040032382 Cok et al. Feb 2004 A1
20040041750 Abe Mar 2004 A1
20040066357 Kawasaki Apr 2004 A1
20040070557 Asano et al. Apr 2004 A1
20040070565 Nayar et al. Apr 2004 A1
20040090186 Kanauchi et al. May 2004 A1
20040090400 Yoo May 2004 A1
20040095297 Libsch et al. May 2004 A1
20040100427 Miyazawa May 2004 A1
20040108518 Jo Jun 2004 A1
20040129933 Nathan et al. Jul 2004 A1
20040130516 Nathan et al. Jul 2004 A1
20040135749 Kondakov et al. Jul 2004 A1
20040145547 Oh Jul 2004 A1
20040150592 Mizukoshi et al. Aug 2004 A1
20040150594 Koyama et al. Aug 2004 A1
20040150595 Kasai Aug 2004 A1
20040155841 Kasai Aug 2004 A1
20040171619 Barkoczy et al. Sep 2004 A1
20040174347 Sun et al. Sep 2004 A1
20040174349 Libsch Sep 2004 A1
20040174354 Ono et al. Sep 2004 A1
20040178743 Miller et al. Sep 2004 A1
20040183759 Stevenson et al. Sep 2004 A1
20040189627 Shirasaki et al. Sep 2004 A1
20040196275 Hattori Oct 2004 A1
20040207615 Yumoto Oct 2004 A1
20040239596 Ono et al. Dec 2004 A1
20040239696 Okabe Dec 2004 A1
20040251844 Hashido et al. Dec 2004 A1
20040252085 Miyagawa Dec 2004 A1
20040252089 Ono et al. Dec 2004 A1
20040256617 Yamada et al. Dec 2004 A1
20040257313 Kawashima et al. Dec 2004 A1
20040257353 Imamura et al. Dec 2004 A1
20040257355 Naugler Dec 2004 A1
20040263437 Hattori Dec 2004 A1
20040263444 Kimura Dec 2004 A1
20040263445 Inukai et al. Dec 2004 A1
20040263541 Takeuchi et al. Dec 2004 A1
20050007355 Miura Jan 2005 A1
20050007357 Yamashita et al. Jan 2005 A1
20050017650 Fryer et al. Jan 2005 A1
20050024081 Kuo et al. Feb 2005 A1
20050024393 Kondo et al. Feb 2005 A1
20050030267 Tanghe et al. Feb 2005 A1
20050052379 Waterman Mar 2005 A1
20050057459 Miyazawa Mar 2005 A1
20050057580 Yamano et al. Mar 2005 A1
20050067970 Libsch et al. Mar 2005 A1
20050067971 Kane Mar 2005 A1
20050068270 Awakura Mar 2005 A1
20050068275 Kane Mar 2005 A1
20050073264 Matsumoto Apr 2005 A1
20050083270 Miyazawa Apr 2005 A1
20050083323 Suzuki et al. Apr 2005 A1
20050088103 Kageyama et al. Apr 2005 A1
20050110420 Arnold et al. May 2005 A1
20050110727 Shin May 2005 A1
20050110807 Chang May 2005 A1
20050123193 Lamberg et al. Jun 2005 A1
20050140598 Kim et al. Jun 2005 A1
20050140610 Smith et al. Jun 2005 A1
20050145891 Abe Jul 2005 A1
20050156831 Yamazaki et al. Jul 2005 A1
20050168416 Hashimoto et al. Aug 2005 A1
20050179626 Yuki et al. Aug 2005 A1
20050179628 Kimura Aug 2005 A1
20050185200 Tobol Aug 2005 A1
20050200575 Kim et al. Sep 2005 A1
20050206590 Sasaki et al. Sep 2005 A1
20050219184 Zehner et al. Oct 2005 A1
20050219188 Kawabe et al. Oct 2005 A1
20050243037 Eom et al. Nov 2005 A1
20050248515 Naugler et al. Nov 2005 A1
20050258867 Miyazawa Nov 2005 A1
20050269959 Uchino et al. Dec 2005 A1
20050269960 Ono et al. Dec 2005 A1
20050280615 Cok et al. Dec 2005 A1
20050280766 Johnson et al. Dec 2005 A1
20050285822 Reddy et al. Dec 2005 A1
20050285825 Eom et al. Dec 2005 A1
20060001613 Routley et al. Jan 2006 A1
20060007072 Choi et al. Jan 2006 A1
20060012310 Chen et al. Jan 2006 A1
20060012311 Ogawa Jan 2006 A1
20060027807 Nathan et al. Feb 2006 A1
20060030084 Young Feb 2006 A1
20060038750 Inoue et al. Feb 2006 A1
20060038758 Routley et al. Feb 2006 A1
20060038762 Chou Feb 2006 A1
20060066533 Sato et al. Mar 2006 A1
20060077077 Kwon Apr 2006 A1
20060077135 Cok et al. Apr 2006 A1
20060082523 Guo et al. Apr 2006 A1
20060092185 Jo et al. May 2006 A1
20060097628 Suh et al. May 2006 A1
20060097631 Lee May 2006 A1
20060103611 Choi May 2006 A1
20060125408 Nathan et al. Jun 2006 A1
20060139253 Choi et al. Jun 2006 A1
20060145964 Park et al. Jul 2006 A1
20060149493 Sambandan et al. Jul 2006 A1
20060170623 Naugler, Jr. et al. Aug 2006 A1
20060176250 Nathan et al. Aug 2006 A1
20060191178 Sempel et al. Aug 2006 A1
20060208961 Nathan et al. Sep 2006 A1
20060209012 Hagood, IV Sep 2006 A1
20060221009 Miwa Oct 2006 A1
20060227082 Ogata et al. Oct 2006 A1
20060232522 Roy et al. Oct 2006 A1
20060244391 Shishido et al. Nov 2006 A1
20060244697 Lee et al. Nov 2006 A1
20060261841 Fish Nov 2006 A1
20060273997 Nathan et al. Dec 2006 A1
20060284801 Yoon et al. Dec 2006 A1
20060284895 Marcu et al. Dec 2006 A1
20060290614 Nathan et al. Dec 2006 A1
20060290618 Goto Dec 2006 A1
20070001937 Park et al. Jan 2007 A1
20070001939 Hashimoto et al. Jan 2007 A1
20070001945 Yoshida et al. Jan 2007 A1
20070008268 Park et al. Jan 2007 A1
20070008297 Bassetti Jan 2007 A1
20070035489 Lee Feb 2007 A1
20070035707 Margulis Feb 2007 A1
20070040773 Lee et al. Feb 2007 A1
20070057873 Uchino et al. Mar 2007 A1
20070063932 Nathan et al. Mar 2007 A1
20070069998 Naugler et al. Mar 2007 A1
20070075727 Nakano et al. Apr 2007 A1
20070076226 Klompenhouwer et al. Apr 2007 A1
20070080905 Takahara Apr 2007 A1
20070080906 Tanabe Apr 2007 A1
20070080908 Nathan et al. Apr 2007 A1
20070085801 Park et al. Apr 2007 A1
20070097038 Yamazaki et al. May 2007 A1
20070097041 Park et al. May 2007 A1
20070103419 Uchino et al. May 2007 A1
20070109232 Yamamoto et al. May 2007 A1
20070115221 Buchhauser et al. May 2007 A1
20070128583 Miyazawa Jun 2007 A1
20070164941 Park et al. Jul 2007 A1
20070182671 Nathan et al. Aug 2007 A1
20070236430 Fish Oct 2007 A1
20070236517 Kimpe Oct 2007 A1
20070241999 Lin Oct 2007 A1
20070242008 Cummings Oct 2007 A1
20070273294 Nagayama Nov 2007 A1
20070285359 Ono Dec 2007 A1
20070290958 Cok Dec 2007 A1
20070296672 Kim et al. Dec 2007 A1
20080001525 Chao et al. Jan 2008 A1
20080001544 Murakami et al. Jan 2008 A1
20080036708 Shirasaki Feb 2008 A1
20080042942 Takahashi Feb 2008 A1
20080042948 Yamashita et al. Feb 2008 A1
20080043044 Woo et al. Feb 2008 A1
20080048951 Naugler, Jr. et al. Feb 2008 A1
20080055134 Li et al. Mar 2008 A1
20080055209 Cok Mar 2008 A1
20080074360 Lu et al. Mar 2008 A1
20080074413 Ogura Mar 2008 A1
20080088549 Nathan et al. Apr 2008 A1
20080088648 Nathan et al. Apr 2008 A1
20080094426 Kimpe Apr 2008 A1
20080117144 Nakano et al. May 2008 A1
20080122819 Cho et al. May 2008 A1
20080150847 Kim et al. Jun 2008 A1
20080228562 Smith et al. Sep 2008 A1
20080231558 Naugler Sep 2008 A1
20080231562 Kwon Sep 2008 A1
20080231641 Miyashita Sep 2008 A1
20080252571 Hente et al. Oct 2008 A1
20080290805 Yamada et al. Nov 2008 A1
20080297055 Miyake et al. Dec 2008 A1
20090009459 Miyashita Jan 2009 A1
20090015532 Katayama et al. Jan 2009 A1
20090058772 Lee Mar 2009 A1
20090121988 Amo et al. May 2009 A1
20090146926 Sung et al. Jun 2009 A1
20090153459 Han et al. Jun 2009 A9
20090160743 Tomida et al. Jun 2009 A1
20090174628 Wang et al. Jul 2009 A1
20090184901 Kwon Jul 2009 A1
20090195483 Naugler, Jr. et al. Aug 2009 A1
20090201281 Routley et al. Aug 2009 A1
20090213046 Nam Aug 2009 A1
20090251486 Sakakibara et al. Oct 2009 A1
20090278777 Wang et al. Nov 2009 A1
20100004891 Ahlers et al. Jan 2010 A1
20100026725 Smith Feb 2010 A1
20100039451 Jung Feb 2010 A1
20100039453 Nathan et al. Feb 2010 A1
20100060911 Marcu et al. Mar 2010 A1
20100165002 Ahn Jul 2010 A1
20100194670 Cok Aug 2010 A1
20100207920 Chaji et al. Aug 2010 A1
20100207960 Kimpe et al. Aug 2010 A1
20100225634 Levey et al. Sep 2010 A1
20100251295 Amento et al. Sep 2010 A1
20100269889 Reinhold et al. Oct 2010 A1
20100277400 Jeong Nov 2010 A1
20100315319 Cok et al. Dec 2010 A1
20110069051 Nakamura et al. Mar 2011 A1
20110069089 Kopf et al. Mar 2011 A1
20110074750 Leon et al. Mar 2011 A1
20110149166 Botzas et al. Jun 2011 A1
20110227964 Chaji et al. Sep 2011 A1
20110293480 Mueller Dec 2011 A1
20120019506 Hekstra et al. Jan 2012 A1
20120056558 Toshiya et al. Mar 2012 A1
20120062565 Fuchs et al. Mar 2012 A1
20120299978 Chaji Nov 2012 A1
20130027381 Nathan et al. Jan 2013 A1
20130057595 Nathan et al. Mar 2013 A1
Foreign Referenced Citations (146)
Number Date Country
729652 Jun 1997 AU
764896 Dec 2001 AU
1 294 034 Jan 1992 CA
2 109 951 Nov 1992 CA
2 249 592 Jul 1998 CA
2 303 302 Mar 1999 CA
2 368 386 Sep 1999 CA
2 242 720 Jan 2000 CA
2 354 018 Jun 2000 CA
2 432 530 Jul 2002 CA
2 436 451 Aug 2002 CA
2 438 577 Aug 2002 CA
2 507 276 Aug 2002 CA
2 463 653 Jan 2004 CA
2 498 136 Mar 2004 CA
2 522 396 Nov 2004 CA
2 438 363 Feb 2005 CA
2 443 206 Mar 2005 CA
2 519 097 Mar 2005 CA
2 472 671 Dec 2005 CA
2 523 841 Jan 2006 CA
2 567 076 Jan 2006 CA
2 526 782 Apr 2006 CA
2 495 726 Jul 2006 CA
2 557 713 Nov 2006 CA
2 651 893 Nov 2007 CA
2 550 102 Apr 2008 CA
2 672 590 Oct 2009 CA
1381032 Nov 2002 CN
1448908 Oct 2003 CN
1760945 Apr 2006 CN
202006007613 Sep 2006 DE
0 158 366 Oct 1985 EP
0 478 186 Apr 1992 EP
1 028 471 Aug 2000 EP
1 111 577 Jun 2001 EP
1 130 565 Sep 2001 EP
1 194 013 Apr 2002 EP
1 321 922 Jun 2003 EP
1 335 430 Aug 2003 EP
1 372 136 Dec 2003 EP
1 381 019 Jan 2004 EP
1 418 566 May 2004 EP
1 429 312 Jun 2004 EP
1 439 520 Jul 2004 EP
1 465 143 Oct 2004 EP
1 469 448 Oct 2004 EP
1 473 689 Nov 2004 EP
1 517 290 Mar 2005 EP
1 521 203 Apr 2005 EP
1 594 347 Nov 2005 EP
1 784 055 May 2007 EP
1 879 169 Jan 2008 EP
1 879 172 Jan 2008 EP
2 389 951 Dec 2003 GB
2 399 935 Sep 2004 GB
2 460 018 Nov 2009 GB
1272298 Oct 1989 JP
4-042619 Feb 1992 JP
6-314977 Nov 1994 JP
8-340243 Dec 1996 JP
09-090405 Apr 1997 JP
10-254410 Sep 1998 JP
11-202295 Jul 1999 JP
11-219146 Aug 1999 JP
11 231805 Aug 1999 JP
11-282419 Oct 1999 JP
2000-056847 Feb 2000 JP
2000-81607 Mar 2000 JP
2001-134217 May 2001 JP
2001-195014 Jul 2001 JP
2002-055654 Feb 2002 JP
2002-91376 Mar 2002 JP
2002-514320 May 2002 JP
2002-278513 Sep 2002 JP
2002-333862 Nov 2002 JP
2003-076331 Mar 2003 JP
2003-124519 Apr 2003 JP
2003-177709 Jun 2003 JP
2003-271095 Sep 2003 JP
2003-308046 Oct 2003 JP
2003-317944 Nov 2003 JP
2004-054188 Feb 2004 JP
2004-145197 May 2004 JP
2004-287345 Oct 2004 JP
2005-057217 Mar 2005 JP
2005-099715 Apr 2005 JP
2005-338819 Dec 2005 JP
2007316356 Dec 2007 JP
2008083085 Apr 2008 JP
4-158570 Oct 2008 JP
2009522621 Jun 2009 JP
2004-0100887 Dec 2004 KR
342486 Oct 1998 TW
473622 Jan 2002 TW
485337 May 2002 TW
502233 Sep 2002 TW
538650 Jun 2003 TW
569173 Jan 2004 TW
1221268 Sep 2004 TW
1223092 Nov 2004 TW
200526065 Aug 2005 TW
1239501 Sep 2005 TW
200727247 Jul 2007 TW
WO 9811554 Mar 1998 WO
WO 9848403 Oct 1998 WO
WO 9948079 Sep 1999 WO
WO 0106484 Jan 2001 WO
WO 0127910 Apr 2001 WO
WO 0163587 Aug 2001 WO
WO 02067327 Aug 2002 WO
WO 03001496 Jan 2003 WO
WO 03034389 Apr 2003 WO
WO 03058594 Jul 2003 WO
WO 03063124 Jul 2003 WO
WO 03075256 Sep 2003 WO
WO 03077231 Sep 2003 WO
WO 2004003877 Jan 2004 WO
WO 2004015668 Feb 2004 WO
WO 2004025615 Mar 2004 WO
WO 2004034364 Apr 2004 WO
WO 2004047058 Jun 2004 WO
WO 2004104975 Dec 2004 WO
WO 2005022498 Mar 2005 WO
WO 2005022500 Mar 2005 WO
WO 2005029455 Mar 2005 WO
WO 2005029456 Mar 2005 WO
WO 2005055185 Jun 2005 WO
WO 2005055186 Jun 2005 WO
WO 2005069267 Jul 2005 WO
WO 2005122121 Dec 2005 WO
WO 2006000101 Jan 2006 WO
WO 2006053424 May 2006 WO
WO 2006063448 Jun 2006 WO
WO 2006084360 Aug 2006 WO
WO 2006128069 Nov 2006 WO
WO 2007003877 Jan 2007 WO
WO 2007079572 Jul 2007 WO
WO 2007120849 Oct 2007 WO
WO 2009055920 May 2009 WO
WO 2009059028 May 2009 WO
WO 2009127065 Oct 2009 WO
WO 2010023270 Mar 2010 WO
WO 2010066030 Jun 2010 WO
WO 2010120733 Oct 2010 WO
WO 2011041224 Apr 2011 WO
Non-Patent Literature Citations (145)
Entry
Extended European Search Report mailed Apr. 27, 2011 issued during prosecution of European patent application No. EP 09733076.5 (13 pages).
Extended European Search Report mailed Aug. 6, 2013, issued in European Patent Application No. 11739485.8 (14 pages).
Extended European Search Report mailed Jul. 11, 2012 which issued in corresponding European Patent Application No. EP 11191641.7 (14 pages).
Extended European Search Report mailed Nov. 29, 2012, issued in European Patent Application No. EP 11168677.0 (13 page).
Extended European Search Report mailed Nov. 8, 2011 issued in European Patent Application No. 11175223.4 (8 pages).
Extended European Search Report, Application No. 06752777.0, dated Dec. 6, 2010 (21 pages).
Extended European Search Report, Application No. 09732338.0, dated May 24, 2011 (8 pages).
Fan et al. “LTPS—TFT Pixel Circuit Compensation for TFT Threshold Voltage Shift and IR-Drop on the Power Line for Amolded Displays” 5 pages copyright 2012.
Fossum, Eric R.. “Active Pixel Sensors: Are CCD's Dinosaurs?” SPIE: Symposium on Electronic Imaging. Feb. 1, 1993 (13 pages).
Goh et al., “A New a-Si:H Thin-Film Transistor Pixel Circuit for Active-Matrix Organic Light-Emitting Diodes”, IEEE Electron Device Letters, Vol, 24, No. 9, Sep. 2003, pp. 583-585.
International Preliminary Report on Patentability for International Application No. PCT/CA2005/001007 dated Oct. 16, 2006, 4 pages.
International Search Report corresponding to co-pending International Patent Application Serial No. PCT/IB2013/054251, Canadian Intellectual Property Office, dated Sep. 11, 2013; (4 pages).
International Search Report corresponding to International Application No. PCT/IB2011/050502, dated Jun. 27, 2011 (6 pages).
International Search Report corresponding to International Application No. PCT/CA2004/001742, Canadian Patent Office, dated Feb. 21, 2005 (2 pages).
International Search Report corresponding to International Application No. PCT/IB2010/055541 filed Dec. 1, 2010, dated May 26, 2011; 5 pages.
International Search Report corresponding to International Application No. PCT/IB2011/055135, Canadian Patent Office, dated Apr. 16, 2012 (5 pages).
Lee, Wonbok: “Thermal Management in Microprocessor Chips and Dynamic Backlight Control in Liquid Crystal Displays”, Ph.D. Dissertation, University of Southern California (124 pages).
Ma e y et al: “Organic Light-Emitting Diode/Thin Film Transistor Integration for foldable Displays” Conference record of the 1997 International display research conference and international workshops on LCD technology and emissive technology. Toronto, Sep. 15-19, 1997 (6 pages).
Matsueda y et al.: “35.1: 2.5-in. AMOLED with Integrated 6-bit Gamma Compensated Digital Data Driver”; dated May 2004 (4 pages).
Mendes E., et al. “A High Resolution Switch-Current Memory Base Cell.” IEEE: Circuits and Systems. vol. 2, Aug. 1999 (pp. 718-721).
Nathan A. et al., “Thin Film imaging technology on glass and plastic” ICM 2000, proceedings of the 12 international conference on microelectronics, dated Oct. 31, 2001 (4 pages).
Nathan et al., “Amorphous Silicon Thin Film Transistor Circuit Integration for Organic LED Displays on Glass and Plastic”, IEEE Journal of Solid-State Circuits, vol. 39, No. 9, Sep. 2004, pp. 1477-1486.
Nathan et al.: “Backplane Requirements for active Matrix Organic Light Emitting Diode Displays,”; dated 2006 (16 pages).
Nathan et al.: “Call for papers second international workshop on compact thin-film transistor (TFT) modeling for circuit simulation”; dated Sep. 2009 (1 page).
Nathan et al.: “Driving schemes for a-Si and LTPS AMOLED displays”; dated Dec. 2005 (11 pages).
Nathan et al.: “Invited Paper: a -Si for AMOLED—Meeting the Performance and Cost Demands of Display Applications (Cell Phone to HDTV)”; dated Jun. 2006 (4 pages).
Office Action in Japanese patent application No. JP2006-527247 dated Mar. 15, 2010. (8 pages).
Office Action in Japanese patent application No. JP2007-545796 dated Sep. 5, 2011. (8 pages).
Ono et al., “Shared Pixel Compensation Circuit for AM-OLED Displays,” Proceedings of the 9th Asian Symposium on Information Display (ASID), pp. 462-465, New Delhi, dated Oct. 8-12, 2006 (4 pages).
Partial European Search Report mailed Mar. 20, 2012 which issued in corresponding European Patent Application No. EP 11191641.7 (8 pages).
Partial European Search Report mailed Sep. 22, 2011 corresponding to European Patent Application No. EP 11168677.0 (5 pages).
Philipp: “Charge transfer sensing” Sensor Review, vol. 19, No. 2, Dec. 31, 1999, 10 pages.
Office Action in Japanese Patent Application No. JP2012-542651, dated Jul. 30, 2015 (6 pages).
Ahnood et al.: “Effect of threshold voltage instability on field effect mobility in thin film transistors deduced from constant current measurements”; dated Aug. 2009.
Alexander et al.: “Pixel circuits and drive schemes for glass and elastic AMOLED displays”; dated Jul. 2005 (9 pages).
Alexander et al.: “Unique Electrical Measurement Technology for Compensation, Inspection, and Process Diagnostics of AMOLED HDTV”; dated May 2010 (4 pages).
Ashtiani et al.: “AMOLED Pixel Circuit With Electronic Compensation of Luminance Degradation”; dated Mar. 2007 (4 pages).
Chaji et al.: “A Current-Mode Comparator for Digital Calibration of Amorphous Silicon AMOLED Displays”; dated Jul. 2008 (5 pages).
Chaji et al.: “A fast settling current driver based on the CCII for AMOLED displays”; dated Dec. 2009 (6 pages).
Chaji et al.: “A Low-Cost Stable Amorphous Silicon AMOLED Display with Full V˜T- and V˜O˜L˜E˜D Shift Compensation”; dated May 2007 (4 pages).
Chaji et al.: “A low-power driving scheme for a-Si:H active-matrix organic light-emitting diode displays”; dated Jun. 2005 (4 pages).
Chaji et al.: “A low-power high-performance digital circuit for deep submicron technologies”; dated Jun. 2005 (4 pages).
Chaji et al.: “A novel a-Si:H AMOLED pixel circuit based on short-term stress stability of a-Si:H TFTs”; dated Oct. 2005 (3 pages).
Chaji et al.: “A Novel Driving Scheme and Pixel Circuit for AMOLED Displays”; dated Jun. 2006 (4 pages).
Chaji et al.: “A Novel Driving Scheme for High Resolution Large-area a-Si:H AMOLED displays”; dated Aug. 2005 (3 pages).
Chaji et al.: “A Stable Voltage-Programmed Pixel Circuit for a-Si:H AMOLED Displays”; dated Dec. 2006 (12 pages).
Chaji et al.: “A Sub-μA fast-settling current-programmed pixel circuit for AMOLED displays”; dated Sep. 2007.
Chaji et al.: “An Enhanced and Simplified Optical Feedback Pixel Circuit for AMOLED Displays”; dated Oct. 2006.
Chaji et al.: “Compensation technique for DC and transient instability of thin film transistor circuits for large-area devices”; dated Aug. 2008.
Chaji et al.: “Driving scheme for stable operation of 2-TFT a-Si AMOLED pixel”; dated Apr. 2005 (2 pages).
Chaji et al.: “Dynamic-effect compensating technique for stable a-Si:H AMOLED displays”; dated Aug. 2005 (4 pages).
Chaji et al.: “Electrical Compensation of OLED Luminance Degradation”; dated Dec. 2007 (3 pages).
Chaji et al.: “eUTDSP: a design study of a new VLIW-based DSP architecture”; dated May 2003 (4 pages).
Chaji et al.: “Fast and Offset-Leakage Insensitive Current-Mode Line Driver for Active Matrix Displays and Sensors”; dated Feb. 2009 (8 pages).
Chaji et al.: “High Speed Low Power Adder Design With a New Logic Style: Pseudo Dynamic Logic (SDL)”; dated Oct. 2001 (4 pages).
Chaji et al.: “High-precision, fast current source for large-area current-programmed a-Si flat panels”; dated Sep. 2006 (4 pages).
Chaji et al.: “Low-Cost AMOLED Television with IGNIS Compensating Technology”; dated May 2008 (4 pages).
Chaji et al.: “Low-Cost Stable a-Si:H AMOLED Display for Portable Applications”; dated Jun. 2006 (4 pages).
Chaji et al.: “Low-Power Low-Cost Voltage-Programmed a-Si:H AMOLED Display”; dated Jun. 2008 (5 pages).
Chaji et al.: “Merged phototransistor pixel with enhanced near infrared response and flicker noise reduction for biomolecular imaging”; dated Nov. 2008 (3 pages).
Chaji et al.: “Parallel Addressing Scheme for Voltage-Programmed Active-Matrix OLED Displays”; dated May 2007 (6 pages).
Chaji et al.: “Pseudo dynamic logic (SDL): a high-speed and low-power dynamic logic family”; dated 2002 (4 pages).
Chaji et al.: “Stable a-Si:H circuits based on short-term stress stability of amorphous silicon thin film transistors”; dated May 2006 (4 pages).
Chaji et al.: “Stable Pixel Circuit for Small-Area High-Resolution a-Si:H AMOLED Displays”; dated Oct. 2008 (6 pages).
Chaji et al.: “Stable RGBW AMOLED display with OLED degradation compensation using electrical feedback”; dated Feb. 2010 (2 pages).
Chaji et al.: “Thin-Film Transistor Integration for Biomedical Imaging and AMOLED Displays”; dated 2008 (177 pages).
Chapter 3: Color Spaces“Keith Jack: “Video Demystified:”A Handbook for the Digital Engineer” 2001, Referex ORD-0000-00-00, USA EP040425529, ISBN: 1-878707-56-6, pp. 32-33.
Chapter 8: Alternative Flat Panel Display 1-25 Technologies; Willem den Boer: “Active Matrix Liquid Crystal Display: Fundamentals and Applications” 2005, Referex ORD-0000-00-00 U.K.; XP040426102 ISBN: 0-7506-7813-5, pp. 206-209, p. 208.
European Partial Search Report corresponding to European Patent Application Serial No. 12156251.6, European Patent Office, dated May 30, 2012 (7 pages).
European Patent Office Communication in European Application No. 05821114 dated Jan. 11, 2013 (9 pages).
European Patent Office Communication with Supplemental European Search Report for EP Application No. 07701644.2, dated Aug. 18, 2009 (12 pages).
Extended European Search Report corresponding to Application EP 10175764, dated Oct. 18, 2010 (2 pages).
European Search Report corresponding to European Patent Application Serial No. 12156251.6, European Patent Office, dated Oct. 12, 2012 (18 pages).
European Search Report corresponding to European Patent Application No. 10829593.2, European Patent Office, dated May 17, 2013 (7 pages).
European Search Report for Application No. 11175225.9 dated Nov. 4, 2011 (9 pages).
European Search Report for EP Application No. EP 10166143, dated Sep. 3, 2010 (2 pages).
European Search Report for European Application No. EP 011122313 dated Sep. 14, 2005 (4 pages).
European Search Report for European Application No. EP 04786661 dated Mar. 9, 2009.
European Search Report for European Application No. EP 05 80 7905 dated Apr. 2, 2009 (5 pages).
European Search Report for European Application No. EP 05 82 1114 dated Mar. 27, 2009 (2 pages).
European Search Report for European Application No. EP 05759141 dated Oct. 30, 2009 (2 pages).
European Search Report for European Application No. EP 05819617 dated Jan. 30, 2009.
European Search Report for European Application No. EP 06 70 5133 dated Jul. 18, 2008.
European Search Report for European Application No. EP 06721798 dated Nov. 12, 2009 (2 pages).
Extended European Search Report for European Application No. EP 07 70 1644 dated Aug. 5, 2009.
European Search Report for European Application No. EP 07710608.6 dated Mar. 19, 2010 (7 pages).
European Search Report for European Application No. EP 07719579 dated May 20, 2009.
European Search Report for European Application No. EP 07815784 dated Jul. 20, 2010 (2 pages).
European Search Report for European Application No. EP 11739485.8-1904 dated Aug. 6, 2013, (14 pages).
European Search Report for European Application No. PCT/CA2006/000177 dated Jun. 2, 2006.
European Search Report, Application No. 10834294.0-1903, dated Apr. 8, 2013 (9 pages).
European Supplementary Search Report corresponding to European Application No. EP 04786662 dated Jan. 19, 2007 (2 pages).
European Supplementary Search Report for EP 09 80 2309, dated May 8, 2011 (14 pages).
European Supplementary Search Report for European Application No. 09831339.8 dated Mar. 26, 2012 (11 pages).
Extended European Search Report corresponding to European Patent Application No. 12174465.0, European Patent Office, dated Sep. 7, 2012 (9 pages).
International Search Report corresponding to International Patent Application No. PCT/IB2010/002898 Canadian Intellectual Property Office, dated Jul. 28, 2009 (5 pages).
International Search Report for Application No. PCT/IB2010/055486, Dated Apr. 19, 2011, 5 pages.
International Search Report for International Application No. PCT/CA2005/001007 dated Oct. 18, 2005.
International Search Report for International Application No. PCT/CA2007/000652 dated Jul. 25, 2007.
International Search Report for International Application No. PCT/CA2004/001741 dated Feb. 21, 2005.
International Search Report for International Application No. PCT/CA2005/001844 dated Mar. 28, 2006 (2 pages).
International Search Report for International Application No. PCT/CA2007/000013 dated May 7, 2007.
International Search Report for International Application No. PCT/CA2006/000941 dated Oct. 3, 2006 (2 pages).
International Search Report for International Application No. PCT/CA2009/001769 dated Apr. 8, 2010.
International Search Report issued in International Application No. PCT/CA2009/001049, mailed Dec. 7, 2009 (4 pages).
International Search Report mailed Dec. 3, 2002, issued in International Patent Application No. PCT/JP02/09668 (4 pages).
International Search Report mailed Jul. 30, 2009 for International Application No. PCT/CA2009/000501 (4 pages).
International Search Report mailed Mar. 21, 2006 issued in International Patent Application No. PCT/CA2005/001897 (2 pages).
International Search Report, International Application PCT/IB2012/052651, 5 pages, dated Sep. 11, 2012.
International Search Report, PCT/IB2011/051103, dated Jul. 8, 2011, 3 pages.
International Search Report, PCT/IB2012/052372, mailed Sep. 12, 2012 (3 pages).
International Searching Authority Search Report, PCT/IB2010/055481, dated Apr. 7, 2011 (3 pages).
International Searching Authority Written Opinion, PCT/IB2010/055481, dated Apr. 7, 2011 (6 pages).
International Written Opinion corresponding to co-pending International Patent Application Serial No. PCT/IB2013/054251, Canadian Intellectual Property Office, dated Sep. 11, 2013; (5 pages).
International Written Opinion corresponding to International Application No. PCT/CA2004/001742, Canadian Patent Office, dated Feb. 21, 2005 (5 pages).
International Written Opinion corresponding to International Application No. PCT/IB2011/055135, Canadian Patent Office, dated Apr. 16, 2012 (5 pages).
International Written Opinion for Application No. PCT/IB2010/055486, Dated Apr. 19, 2011, 8 pages.
International Written Opinion for International Application No. PCT/CA2009/000501 mailed Jul. 30, 2009 (6 pages).
International Written Opinion mailed Mar. 21, 2006 corresponding to International Patent Application No. PCT/CA2005/001897 (4 pages).
International Written Opinion of the International Searching Authority corresponding to International Application No. PCT/IB2011/050502, dated Jun. 27, 2011 (7 pages).
International Written Opinion of the International Searching Authority corresponding to International Application No. PCT/IB2010/055541, dated May 26, 2011; 6 pages.
International Written Opinion, International Application PCT/IB2012/052651, 6 pages, dated Sep. 11, 2012.
International Written Opinion, PCT/IB2011/051103, dated Jul. 8, 2011, 6 pages.
International Written Opinion, PCT/IB2012/052372, mailed Sep. 12, 2012 (6 pages).
Jafarabadiashtiani et al.: “A New Driving Method for a-Si AMOLED Displays Based on Voltage Feedback”; dated 2005 (4 pages).
Kanicki, J., et al. “Amorphous Silicon Thin-Film Transistors Based Active-Matrix Organic Light-Emitting Displays.” Asia Display: International Display Workshops, Sep. 2001 (pp. 315-318).
Karim, K. S., et al. “Amorphous Silicon Active Pixel Sensor Readout Circuit for Digital Imaging.” IEEE: Transactions on Electron Devices. vol. 50, No. 1, Jan. 2003 (pp. 200-208).
Lee et al.: “Ambipolar Thin-Film Transistors Fabricated by PECVD Nanocrystalline Silicon”; dated May 2006 (6 pages).
Rafati et al.: “Comparison of a 17 b multiplier in Dual-rail domino and in Dual-rail D L (D L) logic styles”; dated 2002 (4 pages).
Safavian et al.: “3-TFT active pixel sensor with correlated double sampling readout circuit for real-time medical x-ray imaging”; dated Jun. 2006 (4 pages).
Safavian et al.: “A novel current scaling active pixel sensor with correlated double sampling readout circuit for real time medical x-ray imaging”; dated May 2007 (7 pages).
Safavian et al.: “A novel hybrid active-passive pixel with correlated double sampling CMOS readout circuit for medical x-ray imaging”; dated May 2008 (4 pages).
Safavian et al.: “Self-compensated a-Si:H detector with current-mode readout circuit for digital X-ray fluoroscopy”; dated Aug. 2005 (4 pages).
Safavian et al.: “TFT active image sensor with current-mode readout circuit for digital x-ray fluoroscopy [5969D-82]”; dated Sep. 2005 (9 pages).
Safavian et al.: “Three-TFT image sensor for real-time digital X-ray imaging”; dated Feb. 2, 2006 (2 pages).
Search Report for Taiwan Invention Patent Application No. 093128894 dated May 1, 2012. (1 page).
Search Report for Taiwan Invention Patent Application No. 94144535 dated Nov. 1, 2012. (1 page).
Spindler et al., System Considerations for RGBW OLED Displays, Journal of the SID 14/1, 2006, pp. 37-48.
Stewart M. et al., “Polysilicon TFT technology for active matrix OLED displays” IEEE transactions on electron devices, vol. 48, No. 5 May 2001 (7 pages).
Vygranenko et al.: “Stability of indium-oxide thin-film transistors by reactive ion beam assisted deposition”; dated 2009.
Wang et al.: “Indium oxides by reactive ion beam assisted evaporation: From material study to device application”; dated Mar. 2009 (6 pages).
Written Opinion corresponding to International Patent Application No. PCT/IB2010/002898, Canadian Intellectual Property Office, dated Mar. 30, 2011 (8 pages).
Written Opinion for International Application No. PCT/CA2009/001769 dated Apr. 8, 2010 (8 pages).
Yi He et al., “Current-Source a-Si:H Thin Film Transistor Circuit for Active-Matrix Organic Light-Emitting Displays”, IEEE Electron Device Letters, vol. 21, No. 12, Dec. 2000, pp. 590-592.
Yu, Jennifer: “Improve OLED Technology for Display”, Ph.D. Dissertation, Massachusetts Institute of Technology, Sep. 2008 (151 pages).
Related Publications (1)
Number Date Country
20140043316 A1 Feb 2014 US
Continuation in Parts (1)
Number Date Country
Parent 12958938 Dec 2010 US
Child 14058623 US