Patent Application
20060178767
This invention relates generally to semiconductor manufacturing, and more particularly, to methods and systems for performing dynamic sampling of semiconductor wafers for inspection during manufacture.
Generally, hundreds of processing steps are performed on wafers using various processing tools. During manufacture, all or some wafers on a production line are inspected. Results of the inspection may be used for yield analysis, tool adjustment, or other application.
Typically, inspection tool capacity is much lower than that of corresponding processing tools. Bottlenecks may occur in an inspection step because of an improper sampling of wafers for the inspection.
Conventionally, wafer lots are sampled according to the last character in the identification number thereof. For example, wafer lots having “0” and “5” as the last character in the IDs thereof may be selected for inspection at a preset processing stage. When a wafer lot is processed by a tool, it is determined whether the wafer lot is to be inspected. It is determined whether the last character of the lot ID is “0” or “5”, and if so, the wafer lot is added into a queue line for an inspection tool for inspection performing, otherwise the wafer lot is sent to another processing tool for successive processing.
The conventional method, however, focuses on the fix ratio of sampling, such that several problems rise therefrom. This sampling mechanism selects wafer lots with particular IDs for inspection, even though the queue line may be too long for the capacity of the inspection tool. In this case, a bottleneck occurs in the inspection stage, requiring manual removal of wafer lots from the queue. When the inspection tool has excess capacity, the sampling mechanism cannot raise the sampling rate dynamically, leaving the inspection tool idle. Additionally, wafer lots selected for inspection may not distributed evenly among several processing tool sets. For example, a processing station may comprise tools A, B, and C for performing a processing step. During a 24-hour period, 10 wafer lots are taken as samples for inspection, and all selected wafer lots are processed by tool C. Status of tool C can be monitored using the inspection results, while there is no inspection result pertaining to tools A and B during the 24-hour period.
Systems for fabrication with inspection control are provided. In embodiments of a fabrication system comprising a processing tool, inspection tool, and a controller, the processing tool performs a fabrication process on a workpiece associated with identification information. The inspection tool performs inspection on the workpiece. The controller, coupled to the processing and inspection tools, determines whether the processing tool corresponds to an inspection result obtained during a preset time period, and determines whether the workpiece is to be inspected by the inspection tool according to the workpiece ID, capacity and operation information of the inspection tool, and the inspection result corresponding to the processing tool.
Also disclosed are methods of inspection control. In an embodiment of such a method, identification information associated with a workpiece processed by a processing tool is provided. Capacity and operation information pertaining to an inspection tool is also provided. It is determined whether the processing tool corresponds to an inspection result obtained during a preset time period. It is then determined whether the workpiece is to be inspected by the inspection tool according to the workpiece ID, capacity and operation information of the inspection tool, and the inspection result corresponding to the processing tool.
Various methods may take the form of program code embodied in a tangible media. When the program code is loaded into and executed by a machine, the machine becomes an apparatus for practicing the invention.
The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:
Exemplary embodiments of the invention are now described with reference to
In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration of specific embodiments. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that structural, logical and electrical changes may be made without departing from the spirit and scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense. The leading digit(s) of reference numbers appearing in the Figures corresponds to the Figure number, with the exception that the same reference number is used throughout to refer to an identical component which appears in multiple Figures.
In the inspection initialization process, it is determined whether the wafer lot is identified as an “inspection-required lot” according to a preset list of wafer lots. The designated lot may be determined according to the lot ID thereof, recipe used by tool for processing the wafer lot, or other relevant information.
In the inspection skipping process, it is determined whether the wafer lot is identified as a “skipping-required lot” according to a preset list of wafer lots. The designated lot may be determined according to the lot ID thereof, recipe used by tool for processing the wafer lot, or other relevant information.
The processing algorithm implemented for the inspection initialization process in control server 15 is detailed in the flowchart of
When a wafer lot is processed by one of tools 11a-11c, the control server is triggered to perform the inspection initialization process (step S23). The wafer lot is identified with a lot ID, associated with a record specifying an equipment ID of a processing tool by which the wafer lot has been processed. In step S24, the lot ID and the inspection-required table 191 are compared to determine whether the wafer lot is listed in the inspection-required table 191. If the lot ID is listed in the inspection-required table 191, the method proceeds to step S29, the corresponding wafer lot is added into the queue of the inspection tool 13, and otherwise, the method proceeds to step S25. In step S25, the lot ID is checked according to the sampling rate table 192 to determine whether the corresponding wafer lot meets sampling criteria. If the lot ID meets the sampling setting, the method proceeds to step S29, the corresponding wafer lot is put into the queue of the inspection tool 13, and otherwise, the method proceeds to step S26. In step S26, the lot ID and associated equipment ID are checked according to the key machine table 193 to determine whether the tool having processed the wafer lot corresponds to an inspection result during a preset time period, for example a 24-hour period. If the equipment ID associated with the lot ID corresponds to an inspection result obtained during a 24-hour period, the method proceeds to step S27, otherwise to step S29. In step S27, it is determined whether the number of queued lots exceeds the inspection capacity of the inspection tool according to inspection tool set table 194. The inspection capacity of the inspection tool is specified by a preset value stored in the inspection tool set table 194. If the number of queued lots exceeds the preset value, the method proceeds to step S26, otherwise to step S29. In step S28, the wafer lot skips the inspection step and is sent to a tool for processing. In step S29, the corresponding wafer lot is added into the queue of the inspection tool 13.
The processing algorithm implemented for the inspection skipping process in control server 15 is detailed in the flowchart of
The inspection skipping process is performed periodically. The time period for performing the inspection skipping process is predetermined. When the inspection skipping process is triggered, a wafer lot queued for the inspection tool is selected (step S32). The selection step may be executed according to characteristics corresponding to the wafer lot, such as priority setting, queue time record, or other setting. In step S33, it is determined whether the number of queued lots exceeds the inspection capacity of the inspection tool according to inspection tool set table 194. The inspection capacity of the inspection tool is specified by a preset value stored in the inspection tool set table 194. If the number of queued lots exceeds the preset value, the method proceeds to step S34, otherwise to an end. In step S34, the lot ID and the skipping-required table 195 are compared to determine whether the wafer lot is listed in the skipping-required table 195. If the lot ID is listed in the skipping-required table 195, the method proceeds to step S381, otherwise to step S35. In step S35, the lot ID and the inspection-required table 191 are compared to determine whether the wafer lot is listed in the inspection-required table 191. If the lot ID is listed in the inspection-required table 191, the method proceeds to step S385, otherwise the method proceeds to step S36. In step S36, the lot ID is checked according to the sampling rate table 192 to determine whether the corresponding wafer lot meets sampling criteria. If the lot ID meets the sampling setting, the method proceeds to step S385, the corresponding wafer lot queues up for inspection, otherwise the method proceeds to step SS381. In step S381, the wafer lot bypasses the inspection, and is sent to another processing tool for successive processing. In step S385, the wafer lot is queued for inspection.
While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. Those who are skilled in this technology can still make various alterations and modifications without departing from the scope and spirit of this invention. Therefore, the scope of the present invention shall be defined and protected by the following claims and their equivalents.
