This application relates generally to semiconductor devices and, more particularly, to circuit traces for an integrated circuit of a semiconductor device, specifically superconducting circuit traces.
An integrated circuit is a semiconductor device that has a substrate of a semiconductor material on which a series of layers are deposited using photolithographic techniques. The layers are doped, patterned and etched, so that electronic elements (e.g., resistances, capacitors, impedances, diodes, or transistors) are produced. Subsequently, other layers are deposited, which form the structure of interconnection layers necessary for electrical connections. The substrate may be made of a material such as Si, Ge, SiGe, GaAs, GaN or sapphire. The semiconductor device or chip may be made using technology such as metal-oxide-semiconductor field-effect transistor (MOSFET), bipolar or BiCMOS fabrication techniques. MOSFET technology may include complimentary metal-oxide-semiconductor (CMOS), P-channel metal-oxide-semiconductor (PMOS), N-channel metal-oxide-semiconductor (NMOS), UltraCMOS, silicon-on-insulator (SOI), or silicon-on-sapphire (SOS) variants.
Niobium (Nb) is a common Type II superconductor used for various superconducting applications. When one tries to build a typical semiconductor chip with thin Nb features, the Nb can be exposed to air, to liquids containing dissolved oxygen, or to high temperature oxidizing processes which cause it to oxidize to form Nb2O5, which is not a superconductor. This exposure alters or destroys the superconducting properties of the device. In addition, Nb transmission lines in a radio frequency (RF) device couple to each other. Hence, there is a need to reduce the penetration of external magnetic fields into an Nb wire or reduce the London Penetration Depth of the Nb wire or trace to reduce impedance caused by cross-talk or coupling and also to reduce variations in impedance based on process variability.
Niobium (Nb) is an excellent superconductor at low temperature (e.g., Tc ˜9K). But, Niobium oxide (e.g., NbOx, typically Nb2O5) is not a good superconductor. When superconducting devices are made using very thin Nb wires (e.g., sub-micron widths) via typical semiconductor processing, there is significant risk of oxidizing the surface of the Nb. This oxidation can happen in air (e.g., via native oxide formation), in cleaning chemistry, or in subsequent deposition processes. Depending on the thickness or diameter of the Nb wire and the depth of the oxidation, this can ruin the semiconductor device's superconducting properties and functionality. Hence, there is a need for more reliable and resilient applications of Nb traces in semiconductor devices.
The application, in various implementations, addresses deficiencies associated with existing Nb circuit traces in an integrated circuit of a semiconductor device. The application includes exemplary devices, systems and fabrication methods for providing Nb traces in a semiconductor device that are resistant to oxidation and other adverse effects.
This application describes exemplary techniques and devices that use Niobium Nitride (NbN) to protect an Nb trace in a semiconductor device. NbN is a higher temperature superconductor than Nb (e.g., 16K for NbN vs 9K for Nb). This, along with the idea of a NbN shell on the outside of the Nb traces protecting the Nb from oxidation during subsequent oxide processing, advantageously improves the performance of Nb trace superconducting devices.
Various implementations of the devices and methods described herein reduce variability of the superconducting properties of a Nb trace in a semiconductor chip by passivating the Nb trace with a self-limiting nitride that prevents oxidation of the Nb. In some implementations, the nitride formed on the surface of the Nb provides a superconductor that is superior to the Nb, resulting in a higher temperature superconducting shell and/or layer around the superconducting Nb and, thereby, resulting in superconducting properties arising in the trace starting at a higher temperature (such as 16K instead of 9K). In addition, the NbN shell around the outside of the Nb trace can reduce the London Penetration Depth and, thereby: reduce coupling between parallel Nb wires, reduce signal variability in the device, and reduce the need for ground wires to prevent coupling. Ultimately, such technical effects can result in smaller pitch semiconductor devices.
In one aspect, a semiconductor device includes an integrated circuit where the integrated circuit includes one or more layers forming electronic elements on a substrate of semiconductor material. The device also includes a first layer having a niobium trace connected to at least one of the electronic elements and a second layer having niobium nitride positioned adjacent to a portion of the niobium trace.
The second layer may be positioned above the first layer. The niobium nitride in the second layer may be formed via sputter deposition and/or a N2-based gas forming process. The device may include a third layer having niobium nitride positioned adjacent to a portion of the niobium trace, where the third layer is positioned below the first layer. The niobium nitride in the second layer and in the third layer may be formed via sputter deposition and/or a N2-based gas forming process. The niobium nitride may be positioned adjacent to a portion of the niobium trace within the first layer. In some implementations, the second layer is positioned below the first layer.
In another aspect, a semiconductor device includes an integrated circuit having one or more layers forming electronic elements on a substrate of semiconductor material and a first layer including a niobium nitride trace connected to at least one of the electronic elements.
In a further aspect, a method for manufacturing a semiconductor device having an integrated circuit includes: producing layers, in one or more stages, that form electronic elements on a semiconductor material substrate; forming a first layer including a niobium trace connected to at least one of the electronic elements; and forming a second layer including niobium nitride positioned adjacent to a portion of the niobium trace.
The method may include forming the second layer above the first layer. The forming of the niobium nitride in the second layer may be via sputter deposition and/or a N2-based gas forming process. The method may include forming a third layer below the first layer including niobium nitride adjacent to a portion of the niobium trace. The method may include forming the niobium nitride in the second layer and in the third layer via sputter deposition and/or a N2-based gas forming process. The method may include forming niobium nitride adjacent to a portion of the niobium trace within the first layer.
Any two or more of the features described in this specification, including in this summary section, may be combined to form implementations not specifically described in this specification.
The details of one or more implementations are set forth in the accompanying drawings and the following description. Other features and advantages will be apparent from the description and drawings, and from the claims.
Like reference numerals in different figures indicate like elements.
The application, in various aspects, addresses deficiencies associated with using Nb traces in an integrated circuit of a semiconductor device. The application includes exemplary devices including an NbN shell associated with an Nb trace and methods for fabrication of semiconductor devices including NbN shell and/or traces. In various implementations, device and techniques are implementations to encapsulate an Nb trace with Niobium Nitride (NbN), a stable, non-oxidizing superconductor.
The use of Niobium as a superconducting transmission line and/or trace is a very niche application. Most uses of Niobium in RF applications are for Superconducting RF (SRF) cavities. So, geometry and function are unique aspect of the implementations described herein. Utilizing a very narrow Niobium nitride trace as a thin superconducting trace in a semiconductor device is novel. Such SRF cavities, and generally most uses of Niobium, are less impacted by very thin layers of Niobium surface oxide. In addition, the processes used to treat such macro-cavities are very different from processes and/or devices describe herein that are used to treat a sub-micron width superconducting Nb wire and/or trace embedded in a silicon wafer. In addition, the device and methods described herein provide non-trivial technical solutions to prevent surface oxidation in a metal during semiconductor processing.
The niobium nitride (NbxNy or NbN) shell, cover, passivation, layer, and/or shield 104 may be formed in any of the layers of device 100 including, for example, layers 108 and 116, via sputter deposition. One approach is to deposit NbN on top of Nb and/or Nb trace 102 during sputter deposition. This would prevent oxidation of the top surface of the Nb during patterning and etching. NbN can be deposited on the bottom of the Nb layer via sputter deposition. This would prevent oxidation of the bottom surface of the Nb and/or Nb trace 102 via diffusion of oxygen from adjacent layers during subsequent thermal processing such as annealing.
The NbN shell 104 in layers 108 and 116 may be formed via a N2-based gas forming process. The process may also include H2 or Ar and potentially a He catalyst to remove any pre-existing native oxides and maximize the stability of the resulting NbN passivation layer and/or shell 104. This method has the advantage of protecting the side walls of the Nb transmission lines and/or traces 102. While this is not highly critical for the primary stretch of the superconducting wire (represented as layers M1 and M3 in the
As illustrated in
In an alternate implementation, device 100 may use NbN traces instead of Nb traces with NbN shells to provide electrical connections for electronic elements. The fabrication process may include co-sputtered deposition of blanket NbN and subsequent patterning of NbN, and feature NbN rather than Nb as the primary superconducting transmission line. This method and/or implementation has a technical advantage of improved superconducting properties. NbN has a Tc of 16K versus a Tc of 9.7K for Nb. This method and/or implementation also has the potential to create highly pure NbN because the NbN is deposited from the start with no opportunity for oxidation of the Nb. With respect to
The first through fifth process steps may be repeated to form any number of traces, posts, vias, or other elements including Nb 102 surrounded by NbN 104 shells in any number of layers of device 100. Various deposition techniques may be used as known to one of ordinary skill such as, without limitation, atomic layer deposition (ALD), plasma enhanced ALD, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), and the like.
Elements or steps of different implementations described may be combined to form other implementations not specifically set forth previously. Elements or steps may be left out of the systems or processes described previously without adversely affecting their operation or the operation of the system in general. Furthermore, various separate elements or steps may be combined into one or more individual elements or steps to perform the functions described in this specification.
Other implementations not specifically described in this specification are also within the scope of the following claims.