Claims
- 1. A method for debugging a target computer that utilizes virtual memory paging, the method comprising:
transferring physical memory data from the target computer to a host computer; and replicating virtual memory data from the physical memory data on the host computer.
- 2. The method as recited in claim 1, further comprising debugging a fault on the target computer by analyzing replicated data on the host computer.
- 3. The method as recited in claim 1, further comprising caching the replicated data in memory on the host computer.
- 4. The method as recited in claim 1, wherein the target computer includes an operating system that uses table-driven paged memory management.
- 5. The method as recited in claim 1, wherein:
the target computer includes a processor that has halted execution; and the virtual memory data is located in physical memory of the target computer
- 6. A host computing system, comprising:
a processor; memory; means for establishing a connection between the memory and memory of a target computer; a data retrieval component configured to transfer address data from memory of the target computer to the memory; an address translation component configured to replicate virtual memory addresses from the address data in the memory.
- 7. The host computing system as recited in claim 6, further comprising cache memory configured to store the replicated virtual memory addresses.
- 8. The host computing system as recited in claim 6, wherein the host-side address translation component is further configured to validate the replicated virtual memory addresses.
- 9. The host computing system as recited in claim 6, further comprising a memory management verifier that verifies that a processor of the target computing system has memory management enabled.
- 10. The host computing system as recited in claim 6, wherein the means for establishing a connection between the memory and memory of a target computer comprises hardware-assisted debug probes.
- 11. A method, comprising:
accessing address tables from physical memory of a target computer system; replicating the address tables on a host computing system; and using data contained in the address tables to derive virtual address data that was used on the target computer system.
- 12. The method as recited in claim 11, further comprising storing the address tables in memory on the host computer system.
- 13. The method as recited in claim 11, further comprising caching the virtual address data on the host computer system.
- 14. The method as recited in claim 11, wherein the virtual address data on the host computer system is identical to virtual address data on the target computer system.
- 15. The method as recited in claim 11, further comprising determining if memory management of a target computer system processor is enabled.
- 16. The method as recited in claim 11, further comprising performing the method only if memory management of a target computer system processor is enabled.
- 17. The method as recited in claim 11, wherein the accessing further comprises:
locating the address tables in physical memory of the target computer system; and reading the address tables from the target computer.
- 18. The method as recited in claim 11, further comprising validating the virtual address data to ensure it is identical to the virtual address data stored on the target computer system.
- 19. The method as recited in claim 11, further comprising debugging a fault that occurred on the target computer by analyzing the virtual address data on the host computer system.
- 20. A computer-readable medium containing processor-executable instructions that, when executed on a processor, perform the method of claim 11.
- 21. One or more computer-readable media containing computer-executable instructions that, when executed by a computer, perform the following steps:
transferring physical memory data contained of a target computer to a host computer; translating address data contained in the physical memory data to virtual addresses utilized by the target computer.
- 22. The one or more computer-readable media as recited in claim 21, further comprising computer-executable instructions that, when executed by a computer, perform the following steps:
locating address data in the physical memory of the target computer; and transferring only the address data to the host computer.
- 23. The one or more computer-readable media as recited in claim 21, further comprising computer-executable instructions that, when executed by a computer, caches data transferred from the target computer on the host computer.
- 24. The one or more computer-readable media as recited in claim 21, further comprising computer-executable instructions that, when executed by a computer, validating the transferred data to determine if the transferred data is identical to the contents of the physical memory.
- 25. The one or more computer-readable media as recited in claim 21, further comprising computer-executable instructions that, when executed by a computer, determining if memory management is enabled on a processor in the target computer prior to transferring data.
RELATED APPLICATIONS
[0001] The present application is a continuation of U.S. patent application Ser. No. 09/865,934 filed May 24, 2001, by the Applicants named herein and entitled “Systems and Methods For Replicating Virtual Memory On A Host Computer And Debugging Using Replicated Memory.” The present application is also related to U.S. Provisional Patent Application Serial No. 60/234,643 filed Sep. 22, 2000 by the Applicants named herein and entitled “Systems and Methods For Replicating Virtual Memory On A Host Computer And Debugging Using Replicated Memory.”
Provisional Applications (1)
|
Number |
Date |
Country |
|
60234643 |
Sep 2000 |
US |
Continuations (1)
|
Number |
Date |
Country |
Parent |
09865934 |
May 2001 |
US |
Child |
10826228 |
Apr 2004 |
US |