using associative or pseudo-associative address translation means

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G06F12/1027

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F12/00Accessing, addressing or allocating within memory systems or architectures

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G06F12/1027using associative or pseudo-associative address translation means

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Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus to facilitate atomic operations in victim cache
- Patent number 12,321,284
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with write miss merging
- Patent number 12,321,285
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient retrieval of sensor data while ensuring atomicity
- Patent number 12,314,184
- Issue date May 27, 2025
- PONY AI INC.
- Pingfan Meng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software-hardware memory management modes
- Patent number 12,314,187
- Issue date May 27, 2025
- Texas Instruments Incorporated
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transfer encryption mechanism
- Patent number 12,306,767
- Issue date May 20, 2025
- Intel Corporation
- Marcin Andrzej Chrapek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter operating system memory services over communication network c...
- Patent number 12,301,659
- Issue date May 13, 2025
- Micron Technology, Inc.
- Dmitri Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write merging on stores with different privilege levels
- Patent number 12,292,839
- Issue date May 6, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accessing a cache based on an address translation buffer result
- Patent number 12,287,739
- Issue date Apr 29, 2025
- Advanced Micro Devices, Inc.
- Jagadish B. Kotra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for migrating CPU state from an inoperable core to a spare core
- Patent number 12,277,041
- Issue date Apr 15, 2025
- Oracle International Corporation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory array page table walk
- Patent number 12,277,067
- Issue date Apr 15, 2025
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic management of larger pages during runtime
- Patent number 12,277,066
- Issue date Apr 15, 2025
- International Business Machines Corporation
- Dong Hui Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive configuration of address translation cache
- Patent number 12,277,068
- Issue date Apr 15, 2025
- Mellanox Technologies, Ltd.
- Gal Shalom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 12,265,477
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translating virtual memory addresses to physical memory addresses
- Patent number 12,265,475
- Issue date Apr 1, 2025
- MIPS Tech, LLC
- James Robinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for multi-banked victim cache with dual datapath
- Patent number 12,259,826
- Issue date Mar 25, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual memory management method and apparatus supporting physical...
- Patent number 12,259,823
- Issue date Mar 25, 2025
- Beijing ESWIN Computing Technology Co., Ltd.
- Weijie Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for address mapping and translation protection
- Patent number 12,253,958
- Issue date Mar 18, 2025
- Intel Corporation
- Ravi L. Sahita
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Management of IOMMU TLB entries for compute units of a SIMD process...
- Patent number 12,248,406
- Issue date Mar 11, 2025
- ALIBABA (CHINA) CO., LTD.
- Lide Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Paging in thin-provisioned disaggregated memory
- Patent number 12,242,376
- Issue date Mar 4, 2025
- Microsoft Technology Licensing, LLC
- Siamak Tavallaei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PC-based memory permissions
- Patent number 12,242,396
- Issue date Mar 4, 2025
- Apple Inc.
- Jeffry E. Gonion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
LBAT bulk update
- Patent number 12,235,764
- Issue date Feb 25, 2025
- Micron Technology, Inc.
- Steven R. Narum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Information translation device, method, system and computer readabl...
- Patent number 12,228,919
- Issue date Feb 18, 2025
- Industrial Technology Research Institute
- Yang-Ching Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors, methods, systems, and instructions to protect shadow st...
- Patent number 12,229,453
- Issue date Feb 18, 2025
- Intel Corporation
- Vedvyas Shanbhogue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing of data synchronization barrier instructions
- Patent number 12,229,561
- Issue date Feb 18, 2025
- Apple Inc.
- Madhu Sudan Hari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to enable a cache (DEVPIC) to store process sp...
- Patent number 12,222,873
- Issue date Feb 11, 2025
- Intel Corporation
- Rupin Vakharwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory interface for initalizing memory and method thereof
- Patent number 12,223,188
- Issue date Feb 11, 2025
- Samsung Electronics Co., Ltd.
- Raghu Vamsi Krishna Talanki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page retirement techniques for multi-page DRAM faults
- Patent number 12,216,539
- Issue date Feb 4, 2025
- Advanced Micro Devices, Inc.
- Sudhanva Gurumurthi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system including nonvolatile memory and method of controllin...
- Patent number 12,210,450
- Issue date Jan 28, 2025
- Kioxia Corporation
- Shinichi Kanno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-stalling, non-blocking translation lookaside buffer invalidation
- Patent number 12,210,459
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Daniel Brad Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation lookaside buffer probing prevention
- Patent number 12,204,458
- Issue date Jan 21, 2025
- SiFive, Inc.
- Bradley Gene Burgess
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
READ-AS-X PROPERTY FOR PAGE OF MEMORY ADDRESS SPACE
- Publication number 20250181515
- Publication date Jun 5, 2025
- ARM Limited
- Graeme Peter Barnes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-UNIFORM ALLOCATION OF SYMMETRIC MEMORY IN PARALLEL PROGRAMS
- Publication number 20250156314
- Publication date May 15, 2025
- NVIDIA Corporation
- Akhil Langer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speculative Address Translation Service Requests
- Publication number 20250147898
- Publication date May 8, 2025
- Western Digital Technologies, Inc.
- Shay Benisty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fine Grain Data Migration to or from Borrowed Memory
- Publication number 20250147897
- Publication date May 8, 2025
- Micron Technology, Inc.
- Dmitri Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processing of Data Synchronization Barrier Instructions
- Publication number 20250147767
- Publication date May 8, 2025
- Apple Inc.
- Madhu Sudan Hari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE
- Publication number 20250139019
- Publication date May 1, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMING INSTRUCTION FETCH PIPELINE SYNCHRONIZATION (IFPS) IN PRO...
- Publication number 20250130953
- Publication date Apr 24, 2025
- Ampere Computing LLC
- Bret Leslie Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATIONAL STORAGE DEVICE AND DATA PROCESSING SYSTEM INCLUDING C...
- Publication number 20250130954
- Publication date Apr 24, 2025
- SK HYNIX INC.
- Soo Jin KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Flushing Data using Mapping Page Ownership
- Publication number 20250123970
- Publication date Apr 17, 2025
- Dell Products L.P.
- Oran Baruch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY AND METHOD OF CONTROLLIN...
- Publication number 20250117325
- Publication date Apr 10, 2025
- KIOXIA Corporation
- Shinichi KANNO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-STALLING, NON-BLOCKING TRANSLATION LOOKASIDE BUFFER INVALIDATION
- Publication number 20250117338
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Brad WU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM
- Publication number 20250117340
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRE-FETCHING ADDRESS TRANSLATION FOR COMPUTATION OFFLOADING
- Publication number 20250117337
- Publication date Apr 10, 2025
- Samsung Electronics Co., Ltd.
- Aditya Madhusudan DESHPANDE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE VIRTUALIZATION
- Publication number 20250110893
- Publication date Apr 3, 2025
- ADVANCED MICRO DEVICES, INC.
- John Szeto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REMOTE ACCELERATION FOR DATA DEPENDENT ADDRESS CALCULATION
- Publication number 20250110877
- Publication date Apr 3, 2025
- ADVANCED MICRO DEVICES, INC.
- William L. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROARCHITECTURE AND INSTRUCTION SET ARCHITECTURE EXTENSIONS FOR E...
- Publication number 20250103509
- Publication date Mar 27, 2025
- Intel Corporation
- Ramya Prabhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ZERO LATENCY PREFETCHING IN CACHES
- Publication number 20250103503
- Publication date Mar 27, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Oluleye Olorode
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Translation Lookaside Buffer Entry Locking
- Publication number 20250094355
- Publication date Mar 20, 2025
- Apple Inc.
- Brett S. Feero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
- Publication number 20250094359
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL MEMORY PAGING SYSTEM AND TRANSLATION LOOKASIDE BUFFER WITH...
- Publication number 20250094356
- Publication date Mar 20, 2025
- SITARAM YADAVALLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...
- Publication number 20250094358
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR STORING DATA AND TAGS IN DIFFERENT MEMORY ARRAYS
- Publication number 20250061062
- Publication date Feb 20, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR INFLIGHT DATA FORWARDING AND INVALIDATION...
- Publication number 20250028645
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GLOBAL VIRTUAL ADDRESS SPACE ACROSS OPERATING SYSTEM DOMAIN
- Publication number 20250028632
- Publication date Jan 23, 2025
- MICRON TECNOLOGY, INC.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL MEMORY SUBSYSTEM AND A ONE-LEVEL PAGE TABLE ADDRESS TRANSLA...
- Publication number 20250013577
- Publication date Jan 9, 2025
- KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
- Muhamed Fawzi MUDAWAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION LOOKASIDE BUFFER PROBING PREVENTION
- Publication number 20250004950
- Publication date Jan 2, 2025
- SiFive, Inc.
- Bradley Gene Burgess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERVICING CPU DEMAND REQUESTS WITH INFLIGHT PREFETCHES
- Publication number 20240419602
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Oluleye Olorode
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING AND USING A TRANSLATION TABLE THAT ASSOCIATES ATTRIBUTE...
- Publication number 20240419604
- Publication date Dec 19, 2024
- International Business Machines Corporation
- Gabriel Zvi BenHanokh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PAGE TABLE HOOKS TO MEMORY TYPES
- Publication number 20240403225
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Samuel E. Bradshaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MANAGEMENT OPERATIONS USING STREAMING ENGINE
- Publication number 20240385840
- Publication date Nov 21, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Raymond Michael Zbiciak
- G06 - COMPUTING CALCULATING COUNTING

using associative or pseudo-associative address translation means

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and apparatus to facilitate atomic operations in victim cache

Victim cache with write miss merging

Efficient retrieval of sensor data while ensuring atomicity

Software-hardware memory management modes

Data transfer encryption mechanism

Inter operating system memory services over communication network c...

Write merging on stores with different privilege levels

Accessing a cache based on an address translation buffer result

Method for migrating CPU state from an inoperable core to a spare core

Memory array page table walk

Dynamic management of larger pages during runtime

Adaptive configuration of address translation cache

Hybrid victim cache and write miss buffer with fence operation

Translating virtual memory addresses to physical memory addresses

Methods and apparatus for multi-banked victim cache with dual datapath

Virtual memory management method and apparatus supporting physical...

System for address mapping and translation protection

Management of IOMMU TLB entries for compute units of a SIMD process...

Paging in thin-provisioned disaggregated memory

PC-based memory permissions

LBAT bulk update

Information translation device, method, system and computer readabl...

Processors, methods, systems, and instructions to protect shadow st...

Processing of data synchronization barrier instructions

Method and apparatus to enable a cache (DEVPIC) to store process sp...

Memory interface for initalizing memory and method thereof

Page retirement techniques for multi-page DRAM faults

Memory system including nonvolatile memory and method of controllin...

Non-stalling, non-blocking translation lookaside buffer invalidation

Translation lookaside buffer probing prevention

Patents Applicationslast 30 patents

READ-AS-X PROPERTY FOR PAGE OF MEMORY ADDRESS SPACE

NON-UNIFORM ALLOCATION OF SYMMETRIC MEMORY IN PARALLEL PROGRAMS

Speculative Address Translation Service Requests

Fine Grain Data Migration to or from Borrowed Memory

Processing of Data Synchronization Barrier Instructions

AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE

PERFORMING INSTRUCTION FETCH PIPELINE SYNCHRONIZATION (IFPS) IN PRO...

COMPUTATIONAL STORAGE DEVICE AND DATA PROCESSING SYSTEM INCLUDING C...

System and Method for Flushing Data using Mapping Page Ownership

MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY AND METHOD OF CONTROLLIN...

NON-STALLING, NON-BLOCKING TRANSLATION LOOKASIDE BUFFER INVALIDATION

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

PRE-FETCHING ADDRESS TRANSLATION FOR COMPUTATION OFFLOADING

CACHE VIRTUALIZATION

REMOTE ACCELERATION FOR DATA DEPENDENT ADDRESS CALCULATION

MICROARCHITECTURE AND INSTRUCTION SET ARCHITECTURE EXTENSIONS FOR E...

ZERO LATENCY PREFETCHING IN CACHES

Translation Lookaside Buffer Entry Locking

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

VIRTUAL MEMORY PAGING SYSTEM AND TRANSLATION LOOKASIDE BUFFER WITH...

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

TECHNIQUES FOR STORING DATA AND TAGS IN DIFFERENT MEMORY ARRAYS

METHODS AND APPARATUS FOR INFLIGHT DATA FORWARDING AND INVALIDATION...

GLOBAL VIRTUAL ADDRESS SPACE ACROSS OPERATING SYSTEM DOMAIN

VIRTUAL MEMORY SUBSYSTEM AND A ONE-LEVEL PAGE TABLE ADDRESS TRANSLA...

TRANSLATION LOOKASIDE BUFFER PROBING PREVENTION

SERVICING CPU DEMAND REQUESTS WITH INFLIGHT PREFETCHES

GENERATING AND USING A TRANSLATION TABLE THAT ASSOCIATES ATTRIBUTE...

PAGE TABLE HOOKS TO MEMORY TYPES

CACHE MANAGEMENT OPERATIONS USING STREAMING ENGINE