Patent Application
20180082622
The present disclosure relates generally to techniques for testing a display and, more particularly, to techniques for testing an electrically configurable display panel.
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Most modern electronic devices, such as computer monitors, televisions, vehicle infotainment systems, smart phones, and smart watches, utilize flat panel displays. Traditionally, most flat panel displays have employed liquid crystal display (LCD) technology. Although specific designs vary, LCDs typically include a layer of liquid crystal molecules disposed between two transparent electrodes and two polarizing filters. By controlling the voltage applied across the liquid crystal layer for each pixel, light can be allowed to pass through in varying amounts. Because the LCD pixels produce no light of their own, LCDs typically use a backlight, such as a fluorescent lamp or an array of light emitting diodes (LEDs) to produce a visible image. Advantageously, LCDs are relatively compact, inexpensive, easy to operate, and can be made in almost any size. However, disadvantageously, LCDs tend to have a limited viewing angle, relatively poor black levels because the liquid crystals cannot completely block all the light from passing through, uneven backlighting, and are relatively difficult to read in sunlight.
More recently, displays using organic light emitting diodes (OLED) have been replacing the more traditional flat panel displays. OLED displays use LEDs that include an emissive electroluminescent layer made from an organic compound that emits light in response to an electric current. Because an OLED display emits its own light and, thus, works without a backlight, it can display darker black levels and can be thinner and lighter than a comparable LCD. Disadvantageously, however, the organic materials used in OLEDs tend to degrade fairly quickly and, thus, have a typical lifetime of less than half of a comparable LCD. Furthermore, because the organic materials used to produce blue light degrade more quickly than the organic materials used to produce red and green light, the color balance of OLED displays typically shifts much more over time as compared to a comparable LCD.
In an effort to address some of the problems of LCD and OLED displays, micro LED (μLED) displays are an emerging flat panel display technology. μLED displays include arrays of microscopic arrays of LED that form individual pixel or subpixel elements. As compared to LCD and OLED technology, μLED displays offer greater contrast, faster response times and less energy consumption. Further, μLED displays are easier to read in direct sunlight and do not suffer from the shorter lifetimes of OLED displays. However, electrically configurable displays (such as μLED displays) use active matrixes of μLEDs, pixel drivers (commonly referred to as microdrivers), and arrays of row and column drivers all integrated on a routing backplane in a hybrid fashion. While this hybrid approach enables integration of state of the art technologies for μLEDs, microdrivers, and row and column drivers to yield a superior display technology, the approach relies on pick-and-place and bonding technologies that are prone to certain placement and bonding imperfections. The techniques disclosed herein are directed to addressing some of these concerns.
Various aspects of this disclosure may be better understood upon reading the following detailed description and upon reference to the drawings in which:
One or more specific embodiments will be described below. In an effort to provide a concise description of these embodiments, not all features of an actual implementation are described in the specification. It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another. Moreover, it should be appreciated that such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure.
As discussed above, μLED displays utilize display technologies that are superior to LCD and OLED displays in many ways. Nevertheless, because this approach relies upon pick-and-place and bonding technologies, the fabrication of μLED displays is prone to certain placement and bonding imperfections. Hence, current μLED displays are manufactured with redundant μLEDs, redundant μDs, and redundant column and row drivers, which then must be tested to determine if any defective elements exist. If so, some of the redundant components are activated and utilized. Unfortunately, known testing techniques require that all known components of the μLED display, including the μLEDs, μDs, and row and column drivers, be fabricated onto the display panel before any testing occurs. As a result, the cost of any unused components unnecessarily leads to additional cost of the μLED display. Furthermore, known testing techniques are performed in a serial fashion and, thus, can only identify whether a row under test includes a defective μD, but cannot pinpoint which μD is defective.
The present techniques described below are capable of identifying and pinpointing defective μDs and row/column drivers either before or after any μLEDs have been placed on the display. Using the architectures described below, the data line of the μLEDs, which is a unidirectional digital line in digital displays used for the transfer of RGB gray levels and driver configuration bits, may be a bidirectional digital line with an additional function of transferring the test output sequences upstream to the timing control (TCON) and/or into the main board. This upstream data flow can include information about the pin connectivity and the functional state of the μDs. Such data collection is a relatively fast process, since the test data is collected from all the μDs in the row under test in a parallel manner. As such, this yields access to the output of every μD in the active row, thus enabling the identification of specific defective μDs. Furthermore, the data lines may not only carry information about pin connectivity and functional state of the μDs, they may also contain information about the pin connectivity and function state of the active row driver in the row driver under test. As a result, the present techniques enable the detection and identification of specific defective row drivers as well.
Suitable electronic devices that may include a micro-LED (μ-LED) display and corresponding circuitry of this disclosure are discussed below with reference to
The CPU/GPU 12 of the electronic device 10 may perform various data processing operations, including generating and/or processing image data for display on the display 18, in combination with the storage device(s) 14. For example, instructions that can be executed by the CPU/GPU 12 may be stored on the storage device(s) 14. The storage device(s) 14 thus may represent any suitable tangible, computer-readable media. The storage device(s) 14 may be volatile and/or non-volatile. By way of example, the storage device(s) 14 may include random-access memory, read-only memory, flash memory, a hard drive, and so forth.
The electronic device 10 may use the communication interface(s) 16 to communicate with various other electronic devices or components. The communication interface(s) 16 may include input/output (I/O) interfaces and/or network interfaces. Such network interfaces may include those for a personal area network (PAN) such as Bluetooth, a local area network (LAN) or wireless local area network (WLAN) such as Wi-Fi, and/or for a wide area network (WAN) such as a long-term evolution (LTE) cellular network.
Using pixels containing an arrangement μ-LEDs, the display 18 may display images generated by the CPU/GPU 12. The display 18 may include touchscreen functionality to allow users to interact with a user interface appearing on the display 18. Input structures 20 may also allow a user to interact with the electronic device 10. For instance, the input structures 20 may represent hardware buttons. The energy supply 22 may include any suitable source of energy for the electronic device. This may include a battery within the electronic device 10 and/or a power conversion device to accept alternating current (AC) power from a power outlet.
As may be appreciated, the electronic device 10 may take a number of different forms. As shown in
The electronic device 10 may also take the form of a slate 40. Depending on the size of the slate 40, the slate 40 may serve as a handheld device such as a mobile phone. The slate 40 includes an enclosure 42 through which several input structures 20 may protrude. The enclosure 42 also holds the display 18. The input structures 20 may allow a user to interact with a GUI of the slate 40. For example, the input structures 20 may enable a user to make a telephone call. A speaker 44 may output a received audio signal and a microphone 46 may capture the voice of the user. The slate 40 may also include a communication interface 16 to allow the slate 40 to connect via a wired or wireless connection to another electronic device.
A notebook computer 50 represents another form that the electronic device 10 may take. It should be appreciated that the electronic device 10 may also take the form of any other computer, including a desktop computer. The notebook computer 50 shown in
A block diagram of the architecture of the μ-LED display 18 appears in
As noted above, the video TCON 66 may generate the data clock signal (DATA_CLK). An emission timing controller (TCON) 72 may generate an emission clock signal (EM_CLK). Collectively, these may be referred to as Row Scan Control signals, as illustrated in
In particular, the display panel 60 includes column drivers (CDs) 74, row drivers (RDs) 76, and micro-drivers (μDs or uDs) 78. The uDs 78 are arranged in an array 79. Each uD 78 drives a number of pixels 80 having μ-LEDs as subpixels 82. Each pixel 80 includes at least one red μ-LED, at least one green μ-LED, and at least one blue μ-LED to represent the image data 64 in RGB format. Although the uDs 78 of
A power supply 84 may provide a reference voltage (VREF) 86 to drive the μ-LEDs, a digital power signal 88, and an analog power signal 90. In some cases, the power supply 84 may provide more than one reference voltage (VREF) 86 signal. Namely, subpixels 82 of different colors may be driven using different reference voltages. As such, the power supply 84 may provide more than one reference voltage (VREF) 86. Additionally or alternatively, other circuitry on the display panel 60 may step the reference voltage (VREF) 86 up or down to obtain different reference voltages to drive different colors of μ-LED.
To allow the μDs 78 to drive the μ-LED subpixels 82 of the pixels 80, the column drivers (CDs) 74 and the row drivers (RDs) 76 may operate in concert. Each column driver (CD) 74 may drive the respective image data 70 signal for that column in a digital form. Meanwhile, each RD 76 may provide the data clock signal (DATA_CLK) and the emission clock signal (EM_CLK) at an appropriate to activate the row of μDs 78 driven by the RD 76. A row of uDs 78 may be activated when the RD 76 that controls that row sends the data clock signal (DATA_CLK). This may cause the now-activated uDs 78 of that row to receive and store the digital image data 70 signal that is driven by the column drivers (CDs) 74. The uDs 78 of that row then may drive the pixels 80 based on the stored digital image data 70 signal based on the emission clock signal (EM_CLK).
A block diagram shown in
When the pixel data buffer(s) 100 has received and stored the image data 70, the RD 76 may provide the emission clock signal (EM_CLK). A counter 102 may receive the emission clock signal (EM_CLK) as an input. The pixel data buffer(s) 100 may output enough of the stored image data 70 to output a digital data signal 104 represent a desired gray level for a particular subpixel 82 that is to be driven by the μD 78. The counter 102 may also output a digital counter signal 106 indicative of the number of edges (only rising, only falling, or both rising and falling edges) of the emission clock signal (EM_CLK) 98. The signals 104 and 106 may enter a comparator 108 that outputs an emission control signal 110 in an “on” state when the signal 106 does not exceed the signal 104, and an “off” state otherwise. The emission control signal 110 may be routed to driving circuitry (not shown) for the subpixel 82 being driven, which may cause light emission 112 from the selected subpixel 82 to be on or off. The longer the selected subpixel 82 is driven “on” by the emission control signal 110, the greater the amount of light that will be perceived by the human eye as originating from the subpixel 82.
A timing diagram 120, shown in
It should be noted that the steps between gray levels are reflected by the steps between emission clock signal (EM_CLK) edges. That is, based on the way humans perceive light, to notice the difference between lower gray levels, the difference between the amounts of light emitted between two lower gray levels may be relatively small. To notice the difference between higher gray levels, however, the difference between the amounts of light emitted between two higher gray levels may be comparatively much greater. The emission clock signal (EM_CLK) therefore may use relatively short time intervals between clock edges at first. To account for the increase in the difference between light emitted as gray levels increase, the differences between edges (e.g., periods) of the emission clock signal (EM_CLK) may gradually lengthen. The particular pattern of the emission clock signal (EM_CLK), as generated by the emission TCON 72, may have increasingly longer differences between edges (e.g., periods) so as to provide a gamma encoding of the gray level of the subpixel 82 being driven.
It should be appreciated that since each μD 78 is a small integrated circuit that is typically placed on the display panel 60 by a pick-and-place machine so that it can make the appropriate connections with the plurality of sub-pixels 72 which are similarly placed on the display panel 60. Occasionally, some of the μDs 78 do not function properly. Hence, as illustrated in
However, as mentioned above, while this redundancy scheme ultimately facilitates the production of a fully functional μLED display 18, any unused components, particularly redundant μLED pixels 80, unnecessarily increase the cost of the μLED display 18. The various testing techniques described below may be performed on the panel 18 prior to the placement and bonding of any of the μLEDs 80. Furthermore, the testing techniques described below are capable of pinpointing specific defective elements, such as defective μDs 78 and defective row drivers 76. Once the defective row drivers 76 and μDs 78 are detected, the μLED pixels 80 may be placed and bonded only on functional μDs 78 in rows that do not include a defective row driver 76. Indeed, as described in greater detail below, because the present testing techniques utilize a parallel as opposed to a serial testing architecture, not only are the present testing techniques capable of pinpointing specific defective row drivers 76 and μDs 78, they also require fewer test pins, thus leading to an overall reduction in pin count on the backplane of the display panel 18.
A first example of one of these testing techniques and the associated architecture is illustrated in
A second example of a testing technique and its related architecture is illustrated in
An example of third testing technique and its associated architecture is illustrated in
Regardless of which parallel testing technique is used, the support circuitry 62 and/or the processing circuitry coupled to the support circuitry 62 can determine which μDs 78 are defective. Once all of the rows have been tested, the data relating to the defective μDs 78 may be used to determine where to place μLEDs 80 so that they are placed and coupled only to non-defective μDs 78. This reduces the number of μLEDs 80 on the display 18 and, thus, reduces the overall cost of the display 18. Of course, if the μLEDs 80 were already placed and coupled to the respective μDs 78 prior to the testing, the data relating to the defective μDs 78 may be used to determine which portions of the array to use and which to disable due to the presence of defective elements.
The testing techniques that utilize the parallel architectures described above require fewer pins than the previous techniques that utilized a serial architecture. An example of such differences may be demonstrated by a comparison by the μD 78 having a serial testing architecture, as illustrated in
Conversely, referring now to the row driver 76 having a parallel architecture as illustrated in
While the testing techniques described above have been directed toward testing μD 78, it should be appreciated that similar testing techniques may be used to test the row drivers 76 or the column driver 74. An example, of a first technique for testing the row drivers 76 along with its associate architecture is illustrated in
An example of a second testing technique for row driver 76 and the corresponding architecture is illustrated in
As with the serial versus parallel μD 78 discussed above, providing a parallel testing technique and architecture for the row drivers 76 as compared to a serial testing technique and architecture requires fewer testing pins. An example of such differences can be seen by a comparison of the serial testing architecture for row driver 76 illustrated in
In comparison with the serial testing architecture, the parallel testing architecture in
For the μDs 78, the internal circuitry may include the circuitry shown by way of example in
The specific embodiments described above have been shown by way of example, and it should be understood that these embodiments may be susceptible to various modifications and alternative forms. It should be further understood that the claims are not intended to be limited to the particular forms disclosed, but rather to cover all modifications, equivalents, and alternatives falling within the spirit and scope of this disclosure. Moreover, although the foregoing discusses row drivers that send data to microdrivers and column drivers that control which micro driver in a row receives the data, it should be appreciated that the foregoing discussion about row drivers may be applied to column drivers and vice versa merely by rotating orientation of the display. Thus, recitations of columns and rows may be interchangeable in meaning herein.
This application claims the benefit of U.S. Provisional Application No. 62/398,399, filed on Sep. 22, 2016, the contents of which are herein expressly incorporated by reference for all purposes.
| Number | Date | Country | |
|---|---|---|---|
| 62398399 | Sep 2016 | US |
