Patent Application
20250044343
A current sense circuit may generate an output signal (e.g., a voltage) that is proportional to a current through a transistor (sometimes referred to as the main transistor) coupled to the input of the current sense circuit. The transistor whose current is sensed by the current sense circuit may have a different temperature coefficient than a smaller, sense transistor included within the current sense circuit. Because of the disparate temperature coefficients of the main transistor and the sense transistor, the magnitude of the output signal from the current sense circuit may have an error. The magnitude of the error may be a function of the magnitude of the current through the main transistor—a larger main transistor current causes a larger error in the output signal from the current sense circuit.
In an example, an integrated circuit includes a current sense circuit having an input, an output, and a correction current input terminal between the input and output. A first transistor has a first control input and a first terminal. The first terminal is coupled to the input of the current sense circuit. A second transistor has a second control input and a second terminal. The second control input is coupled to the first control input, and the second terminal is coupled to the correction current input terminal.
The same reference numbers or other reference designators are used in the drawings to designate the same or similar (either by function and/or structure) features.
As shown, transistors MN1 and MN2 are coupled between a supply voltage terminal 105 and a supply voltage reference terminal 107. The supply voltage terminal 105 provides a first supply voltage, e.g., from a voltage supply, not shown). The supply voltage terminal 107 provides a second supply voltage, e.g., electrical ground). For instance, the first supply voltage is larger than the second supply voltage. In this example, transistors MN1 and MN2 are n-channel field effect transistors (NFETs). In other examples, MN1 and MN2 may be implemented as different types of transistors. The source of transistor MN2 is coupled to the drain of transistor MN1 at a switching terminal 109. Controller 130 has control outputs 131 and 132. Control output 131 is coupled to the gate of transistor MN1 and provides voltage VGATE1 to the gate of transistor MN1. Control output 132 is coupled to the gate of transistor MN2 and provides voltage VGATE2 of the gate of transistor MN2. Controller 130 may include gate drivers for each of transistors MN1 and MN2, or gate drivers may be included between control outputs 131/132 and the gates of transistors MN1/MN2.
Load 140 is coupled to the switching terminal 109. Load 140 may be any type of load powered by system 100. In one example, load 140 includes a motor. In the example of a motor, the motor may be a three-phase motor, and the series combination of transistors MN1 and MN2 is a single phase of a three-phase inverter—the other two phases may be similarly constructed. In another example, load 140 is an audio device (e.g., a speaker), and system 100 is an audio amplifier. In yet other examples, system 100 may be a power converter (e.g., a switching voltage converter such as a buck converter, boost converter, buck-boost converter, etc.). In the examples of a power converter, load 140 may include one or more of an inductor, a capacitor, a circuit powered by the voltage provided by system 100, etc.
Current sense circuit 110 has an input 111, an output 112, and a correction current input terminal 113. As shown, correction current input terminal 113 is coupled to an output 122 of the corrector circuit 120. Input 111 of current sense circuit 110 is coupled to the switching terminal 109, and thereby to the source of transistor MN2 and to the drain of transistor MN1. Output 112 of current sense circuit 110 is coupled to a sense (SNS) input 133 of controller 130. Corrector circuit 120 includes an input 121 and the output 122. Input 121 of corrector circuit 120 is coupled to switching terminal 109. As described above, output 122 of corrector circuit 120 is coupled to the correction current input terminal 113.
Controller 130 can turn on and off each of transistors MN1 and MN2. Responsive to controller 130 turning on transistor MN2, a voltage (V_SW) on the switching terminal 109 is pulled upward towards the voltage on the supply voltage terminal 105 and current I_MN2 flows through transistor MN2. Responsive to controller 130 turning on transistor MN1, the voltage V_SW is pulled downward towards the voltage on the supply voltage reference terminal 107, and current I_MN1 flows through transistor MN1. Controller 130 does not turn on both transistors MN1 and MN2 at the same time. Accordingly, the voltage V_SW on the switching terminal 109 may be a square wave having a duty cycle implemented by controller 130.
Some applications benefit from sensing the magnitude of the current through either or both of the transistors MN1 and MN2. The examples described herein pertain to sensing the current I_MN1 through transistor MN1 but can be extended to sensing the current I_MN2 through transistor MN2. When transistor MN1 is on, the drain-to-source voltage (Vds) of transistor MN1 is equal to the product of current I_MN1 and the on-resistance (Rdson) of transistor MN1, that is, Vds=IMN1*Rdson. Thus, assuming a constant value of Rdson, the Vds of transistor MN1 is proportional to the transistor's drain current I_MN1. Using input 111, current sense circuit 110 senses the Vds of transistor MN1, which is proportional to current I_MN1. At output 112, current sense circuit 110 generates an output voltage V_SENSE, which is proportional to the Vds of transistor MN1 and thus proportional to current I_MN1.
Current sense circuit 110 determines current I_MN1 through transistor MN1 by measuring the transistor's Vds. As described above, the transistor's Vds is proportional to current I_MN1 as long as Rdson is a constant. However, a transistor's Rdson is a function of temperature. For example, the Rdson of transistor MN1 has a positive temperature coefficient. As the transistor's temperature increases, so does the transistor's Rdson. Thus, the Vds of transistor MN1 is a function of both current I_MN1 and Rdson. Thus, the temperature coefficient of Rdson introduces an error when using a measurement of Vds to sense current I_MN1.
The power dissipated by transistor MN1 is proportional to (IMN12*Rdson*θj), where θj is a package thermal coefficient (in units of, for example, degrees per watt). Within a relatively narrow range of current I_MN1, the error introduced by the temperature variation of Rdson may be small enough so as to not matter for some applications. However, for some applications (e.g., motor controllers or audio amplifiers), the current I_MN1 may vary through a wide range, and the error caused by the temperature dependence of Rdson may significantly affect the accuracy of the current sensing of transistor MN1 and the performance of the system. Corrector circuit 120 generates a correction current I_CORR at its output 122. Correction current I_CORR is supplied to current sense circuit 110 to modify the magnitude of its output voltage V_SENSE to reduce the error otherwise introduced into V_SENSE due to the temperature dependence on Rdson of transistor MN1.
Transistor MN3 is an NFET in the example of
Current sense circuit 110 operates as following, assuming no error is introduced by the temperature dependence of the Rdson of transistor MN1. The gate voltage VGATE1 provided to the gate of transistor MN1 is also provided to the gates of transistors MN4, MN5, and MN6. The drain current through a field effect transistor is, among other things, a function of the gate-to-source voltage (Vgs) of the transistor. Thus, the current through the serially-connected stack of transistors MN4-MN6 is a function of the Vgs of transistor MN1. The current through the serially-connected stack of transistors MN4-MN6 is the current through transistor MN3, and is labeled as current I_MN3 in
Because transistors MN4-MN6 are smaller than transistor MN1, the Rdson of each of transistors MN4-MN6 is proportionately larger than the Rdson of transistor MN1. Also, because transistors MN4-MN6 have a larger Rdson and because the voltage between the drain of transistor MN4 and the supply voltage reference terminal 107 is the same as the Vds of transistor MN1, current I_MN3 is proportional to, but substantially smaller than, current I_MN1 through transistor MN1. The magnitude of current I_MN3 may be a scaled down version of current I_MN1. For example, the scaling is by the relative size difference of MN1 compared to the sizes of transistors MN4-MN6. For example, if transistors MN4-MN6 are 5000 times smaller than transistor MN1, then current I_MN3 is 5000 times smaller than current I_MN1.
The current from the output 252 of OP AMP 250 through resistor R1 is labeled current I_R1. Ignoring the functionality of corrector circuit 120 and the correction current I_CORR it provides, current I_R1 is equal to current I_MN3. Accordingly, current I_R1 flows from the output 252 of OP AMP 250, through resistor R1, transistor MN3 (labeled as current I_MN3), and through the sense transistor circuit 230 to the supply voltage reference terminal 107. Because the current through the sense transistor circuit 230 is proportional to current I_MN1 being sensed, the current through resistor R1 is also proportional to current I_MN1. The reference voltage source VREF (‘VREF’ refers both to a circuit that generates the reference voltage as well as the reference voltage itself) provided to the positive input of OP AMP 252 is also provided at the negative input of OP AMP 250. Thus, the voltage at the output 252 of OP AMP 250, which is also the output 112 of the current sense circuit 110, is given as: V_SENSE=VREF+(I_R1*R1). Accordingly, V_SENSE is proportional to current I_R1. Because, as described above, current I_R1 is a function of current I_MN1, V_SENSE is proportional to current I_MN1 being sensed.
As described above, however, the Rdson of transistor MN1 is a function of the temperature of transistor MN1. Current I_MN1 through transistor MN1 self-heats the transistor, thereby causing the transistor's Rdson to increase as current I_MN1 increases. Transistors MN4-MN6 may be far enough away from transistor MN1 that the temperature of transistors MN4-MN6 is not impacted much by the self-heating that transistor MN1 experiences. Accordingly, the Rdson of transistors MN4-MN6 may not vary as much as the Rdson of transistor MN1. As a result of the different effect of temperature on Rdson of transistor MN1 versus transistors MN4-MN6, current I_MN3 through the sense transistor circuit 230 may not be proportional only to current I_MN1 but may also be a function I_MN12 and possibly higher order current terms as well.
The correction current input terminal 113 is coupled to resistor R1, the negative input of OP AMP 250, and the drain of transistor MN3. The output 122 of corrector circuit 122 is coupled to the correction current input terminal 113. Corrector circuit 120 receives voltage V_SW at its input 121. Voltage V_SW is the same voltage that current sense circuit 110 receives as an input to sense current I_MN1, as described above. Corrector circuit 120 generates the correction current I_CORR, and provides the correction current I_CORR at its output 122. In one example, corrector circuit 120 generates I_CORR based on the square of voltage V_SW. The current I_MN3 is the sum of currents I_CORR and I_R1. Accordingly,
Current I_CORR can be bidirectional depending on the direction of I_MN1 through transistor MN1. The magnitude of current I_MN3 is set by sense transistor circuit 230 based on the Vgs and Vds of transistor MN1, as described above. The magnitude of current I_CORR is set by corrector circuit 120 based on the magnitude of voltage V_SW (e.g., I_CORR∝V_SW2). With currents I_MN3 and I_CORR set by their respective circuits, current I_R1 through resistor R1 is forced to be the difference between I_MN3 and I_CORR. The correction current I_CORR that is injected into the correction current input terminal 113 affects the magnitude of the current I_R1 through the I2V stage 245 of the current sense circuit 110. Larger values of the correction current I_CORR causes decreases in current I_R1 through resistor R1 and thus smaller magnitudes of voltage V_SENSE produced by the current sense circuit 110.
Without corrector circuit 120, as the Vgs of transistor MN1 increases to produce larger levels of current I_MN1, the temperature of transistor MN1 rises. As the temperature of transistor MN1 rises, the value of Rdson of transistor MN1 also rises. The voltage V_SW is proportional to the product of current I_MN1 and Rdson. Increases in voltage V_SW thus may be, in part, due to the self-heating of transistor MN1. Current sense circuit 110 uses voltage V_SW as a proxy for current I_MN1. Current I_MN3 is a function of voltage V_SW, which may increase due, in part, to the self-heating of transistor MN1. An increase in current I_MN3 due to self-heating of transistor MN1 thus causes the voltage drop across resistor R1 to increase and thus the voltage V_SENSE to increase as well.
Corrector circuit 120, however, corrects the magnitude of voltage V_SENSE based on the square of voltage V_SW. For example, the current I_CORR from the corrector circuit 120 causes the current I_R1 through resistor R1 to decrease, thereby causing a decrease in voltage V_SENSE to a level that has substantially less error than would have been the case absent corrector circuit 120.
The negative input of OP AMP 310 is approximately equal to voltage V_SW, and thus source of transistor MN7 is approximately equal to voltage V_SW. Current source 312 provides a bias current through transistor MN7 for proper operation of transistor MN7. OP AMP 310 controls the voltage on the gate of transistor MN7 and thus sets the gate-to-source voltage of transistor MN7 to accommodate the magnitude of the current produced by current source 312. The voltage on the gate of transistor MN7 is the threshold voltage (Vt) of transistor MN7 above its source voltage. Thus, the gate voltage of transistor MN7 is (V_SW+Vt). Because the gates of transistors MN7 and MN8 are coupled together, the voltage on the gate of transistor MN8 also is (V_SW+Vt). The equation of the drain current (Id) of a field effect transistor is:
where K includes constants relative to transistor MN1. In one example, K=(k′/2)*W/L*(1+λVds), where k′ is the product of the charge-carrier effective mobility (μ0) and the gate oxide capacitance per unit area (Cox), and λVds is the channel-length modulation parameter.
Eq. (2) shows that the drain current through a field effect transistor is proportional to the square of the difference between the Vgs and Vt voltages for the transistor. The Vgs of transistor MN8 is (V_SW+Vt). The difference between the Vgs of transistor MN8 and its threshold voltage Vt is (V_SW+Vt)−Vt, which equals V_SW. Thus, the current I_CORR is proportional to the square of voltage V_SW.
In the example of
In this description, the term “couple” may cover connections, communications, or signal paths that enable a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action: (a) in a first example, device A is coupled to device B by direct connection; or (b) in a second example, device A is coupled to device B through intervening component C if intervening component C does not alter the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.
Also, in this description, the recitation “based on” means “based at least in part on.” Therefore, if X is based on Y, then X may be a function of Y and any number of other factors.
A device that is “configured to” perform a task or function may be configured (e.g., programmed and/or hardwired) at a time of manufacturing by a manufacturer to perform the function and/or may be configurable (or reconfigurable) by a user after manufacturing to perform the function and/or other additional or alternative functions. The configuring may be through firmware and/or software programming of the device, through a construction and/or layout of hardware components and interconnections of the device, or a combination thereof.
As used herein, the terms “terminal”, “node”, “interconnection”, “pin” and “lead” are used interchangeably. Unless specifically stated to the contrary, these terms are generally used to mean an interconnection between or a terminus of a device element, a circuit element, an integrated circuit, a device or other electronics or semiconductor component.
A circuit or device that is described herein as including certain components may instead be adapted to be coupled to those components to form the described circuitry or device. For example, a structure described as including one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and/or inductors), and/or one or more sources (such as voltage and/or current sources) may instead include only the semiconductor elements within a single physical device (e.g., a semiconductor die and/or integrated circuit (IC) package) and may be adapted to be coupled to at least some of the passive elements and/or the sources to form the described structure either at a time of manufacture or after a time of manufacture, for example, by an end-user and/or a third-party.
While the use of particular transistors is described herein, where appropriate, other transistors (or equivalent devices) may be used instead with little or no change to the remaining circuitry. For example, a field effect transistor (“FET”) (such as an n-channel FET (NFET) or a p-channel FET (PFET)), a bipolar junction transistor (BJT—e.g., NPN transistor or PNP transistor), an insulated gate bipolar transistor (IGBT), and/or a junction field effect transistor (JFET) may be used in place of or in conjunction with the devices described herein. The transistors may be depletion mode devices, drain-extended devices, enhancement mode devices, natural transistors or other types of device structure transistors. Furthermore, the devices may be implemented in/over a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN) or a gallium arsenide substrate (GaAs).
References may be made in the claims to a transistor's control input (also referred to as a control terminal) and its current terminals (also referred to as terminals). In the context of a FET, the control input is the gate, and the current terminals are the drain and source. In the context of a BJT, the control input is the base, and the current terminals are the collector and emitter.
References herein to a FET being “ON” or “enabled” means that the conduction channel of the FET is present and drain current may flow through the FET. References herein to a FET being “OFF” or “disabled” means that the conduction channel is not present so drain current does not flow through the FET. An “OFF” FET, however, may have current flowing through the transistor's body-diode.
Circuits described herein are reconfigurable to include additional or different components to provide functionality at least partially similar to functionality available prior to the component replacement. Components shown as resistors, unless otherwise stated, are generally representative of any one or more elements coupled in series and/or parallel to provide an amount of impedance represented by the resistor shown. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in series between the same two nodes as the single resistor or capacitor.
While certain elements of the described examples are included in an integrated circuit and other elements are external to the integrated circuit, in other example embodiments, additional or fewer features may be incorporated into the integrated circuit. In addition, some or all of the features illustrated as being external to the integrated circuit may be included in the integrated circuit and/or some features illustrated as being internal to the integrated circuit may be incorporated outside of the integrated. As used herein, the term “integrated circuit” means one or more circuits that are: (i) incorporated in/over a semiconductor substrate; (ii) incorporated in a single semiconductor package; (iii) incorporated into the same module; and/or (iv) incorporated in/on the same printed circuit board.
Uses of the phrase “ground” in the foregoing description include a chassis ground, an Earth ground, a floating ground, a virtual ground, a digital ground, a common ground, and/or any other form of ground connection applicable to, or suitable for, the teachings of this description. In this description, unless otherwise stated, “about,” “approximately” or “substantially” preceding a parameter means being within +/−10 percent or +/−5 percent or +/−1 percent of that parameter or, if the parameter is zero, a reasonable range of values around zero.
Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.
