Number | Name | Date | Kind |
---|---|---|---|
4901259 | Watkins | Jan 1990 | |
4922445 | Mizoue et al. | May 1990 | |
4967386 | Maeda et al. | Oct 1990 | |
4991176 | Dahbura et al. | Feb 1991 | |
5004978 | Morris, Jr. et al. | Apr 1991 | |
5291495 | Udell, Jr. | Mar 1994 | |
5479414 | Keller et al. | Dec 1995 |
Entry |
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Chang, "An Alorithm for Selecting an Optimum Set of Diagnostic Tests", IEEE Transactions on Electronic Computers, vol. EC-14, No. 5, pp. 706-711. |
Yau et al., "Multiple Fault Detection for Combinational Logic Circuits", IEEE Transactions on Computers, vol. C-24, No. 3, Mar. 1975, pp. 233-242. |
C. E. Leiserson and J. B. Saxe, "Retiming Synchronous Circuitry," in Algorithmica, vol. 6, pp. 5-35, 1991. |