TEST MODULE FOR WAFER

Abstract

A test module for wafer including a test load board, a spring pin socket, a substrate, and a plurality of probes is provided. The test load board has a plurality of first contacts. The spring pin socket in which a plurality of pogo pins is arranged is disposed on the test load board. The substrate is fixed on the spring pin socket. The substrate has a plurality of second contacts, and the pogo pins are electrically connected between the first contacts and the second contacts respectively. The plurality of probes is disposed on the substrate to electrically contact a wafer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic view of an ATE.

FIG. 2 is a schematic view of the test module for wafer according to an embodiment of the present invention.

FIG. 3 is a schematic view of the test module for wafer according to another embodiment of the present invention.

FIG. 4 is a schematic view of the test module for wafer according to still another embodiment of the present invention.

Claims

1. A test module for wafer, comprising: a test load board, having a plurality of first contacts;a spring pin socket, disposed on the test load board, comprising a plurality of pogo pins disposed therein;a substrate, fixed on the spring pin socket, comprising a plurality of second contacts, wherein the pogo pins are electrically connected between the first contacts and the second contacts respectively; anda plurality of probes, disposed on the substrate, for electrically contacting a wafer.

2. The test module for wafer according to claim 1, further comprising a plurality of solder balls respectively disposed on the second contacts for electrically contacting the pogo pins.

3. The test module for wafer according to claim 1, wherein the substrate comprises a build-up circuit board or a laminated circuit board.

4. The test module for wafer according to claim 1, wherein the test load board comprises a printed circuit board (PCB).

5. The test module for wafer according to claim 1, wherein the wafer comprises a chip and the substrate is used for chip packaging.

6. A test module for wafer, comprising: a test load board, comprising a plurality of first contacts;a spring pin socket, disposed on the test load board, comprising a plurality of pogo pins disposed therein;a substrate, fixed on the spring pin socket, comprising a plurality of second contacts, wherein the pogo pins are electrically connected between the first contacts and the second contacts respectively; anda plurality of bumps, disposed on the substrate, for electrically contacting a wafer.

7. The test module for wafer according to claim 6, further comprising a plurality of solder balls respectively disposed on the second contacts for electrically contacting the pogo pins.

8. The test module for wafer according to claim 6, wherein the substrate comprises a build-up circuit boards or a laminated circuit board.

9. The test module for wafer according to claim 6, wherein the test load board comprises a printed circuit board (PCB).

10. The test module for wafer according to claim 6, wherein the wafer comprises a chip and the substrate is used for chip packaging.

11. A test module for wafer, comprising: a test load board, comprising a plurality of first contacts;a spring pin socket, disposed on the test load board, comprising a plurality of pogo pins disposed therein;a substrate, fixed on the spring pin socket, comprising a plurality of second contacts, wherein the pogo pins are electrically connected between the first contacts and the second contacts respectively; andan anisotropic conductive adhesive, disposed on the substrate, for electrically contacting a wafer.

12. The test module for wafer according to claim 11, further comprising a plurality of solder balls respectively disposed on the second contacts for electrically contacting the pogo pins.

13. The test module for wafer according to claim 11, wherein the substrate comprises a build-up circuit board or a laminated circuit board.

14. The test module for wafer according to claim 11, wherein the test load board comprises a printed circuit board (PCB).

15. The test module for wafer according to claim 11, wherein the wafer comprises a chip and the substrate is used for chip packaging.